LTC2356-12/LTC2356-14
Serial 12-Bit/14-Bit, 3.5Msps
Sampling ADCs with Shutdown
FEATURES
■
■
■
■
■
■
■
■
■
■
■
DESCRIPTIO
3.5Msps Conversion Rate
74.1dB SINAD at 14-Bits, 71.1dB SINAD at 12-Bits
Low Power Dissipation: 18mW
3.3V Single Supply Operation
2.5V Internal Bandgap Reference can be Overdriven
3-Wire SPI-Compatible Serial Interface
Sleep (13µW) Shutdown Mode
Nap (4mW) Shutdown Mode
80dB Common Mode Rejection
±1.25V
Bipolar Input Range
Tiny 10-Lead MSOP Package
The LTC
®
2356-12/LTC2356-14 are 12-bit/14-bit, 3.5Msps
serial ADCs with differential inputs. The devices draw
only 5.5mA from a single 3.3V supply and come in a tiny
10-lead MSOP package. A Sleep shutdown feature further
reduces power consumption to 13µW. The combination of
speed, low power and tiny package makes the LTC2356-12/
LTC2356-14 suitable for high speed, portable applications.
The 80dB common mode rejection allows users to elimi-
nate ground loops and common mode noise by measuring
signals differentially from the source.
The devices convert –1.25V to 1.25V bipolar inputs differ-
entially. The absolute voltage swing for A
IN+
and
A
IN–
extends from ground to the supply voltage.
The serial interface sends out the conversion results during
the 16 clock cycles following a CONV rising edge for
compatibility with standard serial interfaces. If two addi-
tional clock cycles for acquisition time are allowed after the
data stream in between conversions, the full sampling rate
of 3.5Msps can be achieved with a 63MHz clock.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
APPLICATIO S
■
■
■
■
■
■
Communications
Data Acquisition Systems
Uninterrupted Power Supplies
Multiphase Motor Control
Multiplexed Data Acquisition
RFID
BLOCK DIAGRA
10µF 3.3V
LTC2356-14
A
IN+
A
IN–
1
7
V
DD
+
S&H
14-BIT ADC
14-BIT LATCH
8
SDO
THD, 2nd, 3rd (dB)
2
–
V
REF
2.5V
REFERENCE
THREE-
STATE
SERIAL
OUTPUT
PORT
14
3
10µF
4
10
TIMING
LOGIC
9
6
11
2356 BD
CONV
GND
5
SCK
EXPOSED PAD
U
THD, 2nd and 3rd vs Input Frequency
for Differential Input Signals
–50
–56
–62
–68
–74
–80
–86
–92
–98
–104
0.1
1
10
FREQUENCY (MHz)
100
2356 G02
W
U
THD
2nd
3rd
2356f
1
LTC2356-12/LTC2356-14
ABSOLUTE
(Notes 1, 2)
AXI U
RATI GS
PACKAGE/ORDER I FOR ATIO
ORDER PART
NUMBER
TOP VIEW
A
IN+
1
A
IN–
2
V
REF
3
GND 4
GND 5
10
9
8
7
6
CONV
SCK
SDO
V
DD
GND
Supply Voltage (V
DD
) ................................................. 4V
Analog and V
REF
Input Voltages
(Note 3) ....................................–0.3V to (V
DD
+ 0.3V)
Digital Input Voltages ................. – 0.3V to (V
DD
+ 0.3V)
Digital Output Voltage .................. – 0.3V to (V
DD
+ 0.3V)
Power Dissipation .............................................. 100mW
Operation Temperature Range
LTC2356C-12/LTC2356C-14 ................... 0°C to 70°C
LTC2356I-12/LTC2356I-14 ................ – 40°C to 85°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
11
LTC2356CMSE-12
LTC2356IMSE-12
LTC2356CMSE-14
LTC2356IMSE-14
MSE PART MARKING
LTCWN
LTCWN
LTCVF
LTCVF
MSE PACKAGE
10-LEAD PLASTIC MSOP
T
JMAX
= 125°C,
θ
JA
= 150°C/ W
EXPOSED PAD (PIN 11) IS GND
MUST BE SOLDERED TO PCB
Order Options
Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking:
http://www.linear.com/leadfree/
Consult factory for parts specified with wider operating temperature ranges.
CO VERTER CHARACTERISTICS
PARAMETER
Resolution (No Missing Codes)
Integral Linearity Error
Offset Error
Gain Error
Gain Tempco
(Notes 4, 5, 18)
(Notes 4, 18)
(Note 4, 18)
CONDITIONS
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. With internal reference. V
DD
= 3.3V
LTC2356-12
MIN TYP MAX
●
●
●
●
LTC2356-14
MIN TYP MAX
14
–4
–30
–80
±0.5
±2
±10
±15
±1
4
30
80
UNITS
Bits
LSB
LSB
LSB
ppm/°C
ppm/°C
12
–2
–10
–40
±0.25
±1
±5
±15
±1
2
10
40
Internal Reference (Note 4)
External Reference
A ALOG I PUT
SYMBOL PARAMETER
V
IN
V
CM
I
IN
C
IN
t
ACQ
t
AP
t
JITTER
CMRR
The
●
denotes the specifications which apply over the full operating temperature range,
otherwise specifications are at T
A
= 25°C. With internal reference. V
DD
= 3.3V
CONDITIONS
3.1V
≤
V
DD
≤
3.6V
●
MIN
TYP
–1.25 to 1.25
0 to V
DD
MAX
UNITS
V
V
Analog Differential Input Range (Notes 3, 8, 9)
Analog Common Mode + Differential
Input Range (Note 10)
Analog Input Leakage Current
Analog Input Capacitance
Sample-and-Hold Acquisition Time
Sample-and-Hold Aperture Delay Time
Sample-and-Hold Aperture Delay Time Jitter
Analog Input Common Mode Rejection Ratio
●
1
13
39
1
0.3
(Note 19)
(Note 6)
●
f
IN
= 1MHz, V
IN
= 0V to 3V
f
IN
= 100MHz, V
IN
= 0V to 3V
–60
–15
2
U
µA
pF
ns
ns
ps
dB
dB
2356f
W
U
U
W W
W
U
U
U
LTC2356-12/LTC2356-14
DY A IC ACCURACY
SYMBOL
SINAD
THD
SFDR
IMD
PARAMETER
Signal-to-Noise Plus
Distortion Ratio
Total Harmonic
Distortion
Spurious Free
Dynamic Range
Intermodulation
Distortion
Code-to-Code
Transition Noise
Full Power Bandwidth
Full Linear Bandwidth
The
●
denotes the specifications which apply over the full operating temperature range,
otherwise specifications are at T
A
= 25°C with external reference = 2.55V. V
DD
= 3.3V. Single-ended A
IN+
signal drive with A
IN–
= 1.5V
DC. Differential signal drive with V
CM
= 1.5V at A
IN+
and A
IN–
CONDITIONS
100kHz Input Signal (Note 19)
1.4MHz Input Signal (Note 19)
100kHz First 5 Harmonics (Note 19)
1.4MHz First 5 Harmonics (Note 19)
100kHz Input Signal (Note 19)
1.4MHz Input Signal (Note 19)
0.625V
P-P
1.4MHz Summed with 0.625V
P-P
1.56MHz into A
IN+
and Inverted into A
IN–
V
REF
= 2.5V (Note 18)
V
IN
= 2.5V
P-P
, SDO = 11585LSB
P-P
(Note 15)
S/(N + D)
≥
68dB
●
●
I TER AL REFERE CE CHARACTERISTICS
PARAMETER
V
REF
Output Voltage
V
REF
Output Tempco
V
REF
Line Regulation
V
REF
Output Resistance
V
REF
Settling Time
External V
REF
Input Range
CONDITIONS
I
OUT
= 0
The
●
denotes the specifications which apply over the
full operating temperature range, otherwise specifications are at T
A
= 25°C. V
DD
= 3.3V
MIN
TYP
2.5
15
V
DD
= 3.1V to 3.6V, V
REF
= 2.5V
Load Current = 0.5mA
C
REF
= 10µF
2.55
600
0.2
2
V
DD
MAX
UNITS
V
ppm/°C
µV/V
Ω
ms
V
DIGITAL I PUTS A D DIGITAL OUTPUTS
SYMBOL
V
IH
V
IL
I
IN
C
IN
V
OH
V
OL
I
OZ
C
OZ
I
SOURCE
I
SINK
PARAMETER
High Level Input Voltage
Low Level Input Voltage
Digital Input Current
Digital Input Capacitance
High Level Output Voltage
Low Level Output Voltage
Hi-Z Output Leakage D
OUT
Hi-Z Output Capacitance D
OUT
Output Short-Circuit Source Current
Output Short-Circuit Sink Current
V
OUT
= 0V, V
DD
= 3.3V
V
OUT
= V
DD
= 3.3V
CONDITIONS
V
DD
= 3.6V
V
DD
= 3.1V
V
IN
= 0V to V
DD
The
●
denotes the specifications which apply over the
full operating temperature range, otherwise specifications are at T
A
= 25°C. V
DD
= 3.3V
MIN
●
●
●
U
U
U
W U
U
LTC2356-12
MIN TYP MAX
68
71.1
71.1
–86
–82
86
82
–82
0.25
50
5
–76
LTC2356-14
MIN TYP MAX
70
74.1
72.3
–86
–82
86
82
–82
1
50
5
–78
UNITS
dB
dB
dB
dB
dB
dB
dB
LSB
RMS
MHz
MHz
U
TYP
MAX
0.6
±10
UNITS
V
V
µA
pF
V
V
V
µA
pF
mA
mA
2.4
5
V
DD
= 3.3V, I
OUT
= – 200µA
V
DD
= 3.1V, I
OUT
= 160µA
V
DD
= 3.1V, I
OUT
= 1.6mA
V
OUT
= 0V to V
DD
●
●
●
2.5
2.9
0.05
0.10
1
20
15
0.4
±10
2356f
3
LTC2356-12/LTC2356-14
POWER REQUIRE E TS
SYMBOL
V
DD
I
DD
PARAMETER
Supply Voltage
Supply Current
The
●
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (Note 17)
CONDITIONS
Active Mode
Nap Mode
Sleep Mode (LTC2356-12)
Sleep Mode (LTC2356-14)
Active Mode with SCK in Fixed State (Hi or Lo)
●
●
P
D
Power Dissipation
The
●
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. V
DD
= 3.3V
SYMBOL
f
SAMPLE(MAX)
t
THROUGHPUT
t
SCK
t
CONV
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
8
t
9
t
10
t
12
PARAMETER
CONDITIONS
Maximum Sampling Rate per Channel
(Conversion Rate)
Minimum Sampling Period (Conversion + Acquisiton Period)
Clock Period
Conversion Time
Minimum High or Low SCLK Pulse Width
CONV to SCK Setup Time
Nearest SCK Edge Before CONV
Minimum High or Low CONV Pulse Width
SCK↑ to Sample Mode
CONV↑ to Hold Mode
16th SCK↑ to CONV≠ Interval (Affects Acquisition Period)
Delay from SCK to Valid Data
SCK↑ to Hi-Z at SDO
Previous SDO Bit Remains Valid After SCK
V
REF
Settling Time After Sleep-to-Wake Transition
●
●
TI I G CHARACTERISTICS
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
All voltage values are with respect to GND.
Note 3:
When these pins are taken below GND or above V
DD
, they will be
clamped by internal diodes. This product can handle input currents greater
than 100mA below GND or greater than V
DD
without latchup.
Note 4:
Offset and full-gain specifications are measured for a single-ended
A
IN+
input with A
IN–
grounded and using the internal 2.5V reference.
Note 5:
Integral linearity is tested with an external 2.55V reference and is
defined as the deviation of a code from the straight line passing through
the actual endpoints of a transfer curve. The deviation is measured from
the center of quantization band.
Note 6:
Guaranteed by design, not subject to test.
Note 7:
Recommended operating conditions.
Note 8:
The analog input range is defined for the voltage difference
between A
IN+
and A
IN–
. Performance is specified with A
IN–
= 1.5V DC while
driving A
IN+
.
Note 9:
The absolute voltage at A
IN+
and A
IN–
must be within this range.
Note 10:
If less than 3ns is allowed, the output data will appear one clock
cycle later. It is best for CONV to rise half a clock before SCK, when
running the clock at rated speed.
4
U W
MIN
3.1
TYP
3.3
5.5
1.1
4
4
18
MAX
3.6
8
1.5
15
12
UNITS
V
mA
mA
µA
µA
mW
UW
MIN
3.5
TYP
MAX
UNITS
MHz
ns
ns
SCLK cycles
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
(Note 16)
(Note 6)
(Note 6)
(Notes 6, 10)
(Note 6)
(Note 6)
(Note 6)
(Notes 6, 11)
(Notes 6, 7, 13)
(Notes 6, 12)
(Notes 6, 12)
(Notes 6, 12)
(Note 14)
●
15.872
16
2
3
0
4
4
1.2
45
286
10000
18
8
6
2
2
Note 11:
Not the same as aperture delay. Aperture delay is smaller (1ns)
because the 2.2ns delay through the sample-and-hold is subtracted from
the CONV to Hold mode delay.
Note 12:
The rising edge of SCK is guaranteed to catch the data coming
out into a storage latch.
Note 13:
The time period for acquiring the input signal is started by the
16th rising clock and it is ended by the rising edge of convert.
Note 14:
The internal reference settles in 2ms after it wakes up from Sleep
mode with one or more cycles at SCK and a 10µF capacitive load.
Note 15:
The full power bandwidth is the frequency where the output code
swing drops to 3dB with a 2.5V
P-P
input sine wave.
Note 16:
Maximum clock period guarantees analog performance during
conversion. Output data can be read with an arbitrarily long clock.
Note 17:
V
DD
= 3.3V, f
SAMPLE
= 3.5Msps.
Note 18:
The LTC2356-14 is measured and specified with 14-bit resolution
(1LSB = 152µV) and the LTC2356-12 is measured and specified with
12-bit resolution (1LSB = 610µV).
Note 19:
The sampling capacitor at each input accounts for 4.1pF of the
input capacitance.
2356f
LTC2356-12/LTC2356-14
TYPICAL PERFOR A CE CHARACTERISTICS
SINAD vs Input Frequency
77
74
71
68
SINAD (dB)
THD, 2nd, 3rd (dB)
65
62
59
56
53
50
0.1
1
10
FREQUENCY (MHz)
100
2356 G01
SFDR vs Input Frequency
92
86
80
SFDR (dB)
74
68
62
SNR (dB)
56
50
0.1
1
10
FREQUENCY (MHz)
100kHz Sine Wave 8192 Point
FFT Plot
0
–10
–20
–30
MAGNITUDE (dB)
MAGNITUDE (dB)
–40
–50
–60
–70
–80
–90
–100
–110
–120
0
250K 500K 750K 1M 1.25M 1.5M 1.75M
FREQUENCY (Hz)
2356 G05
U W
T
A
= 25°C, V
DD
= 3.3V (LTC2356-14).
THD, 2nd and 3rd vs Input Frequency
–50
–56
–62
–68
–74
–80
–86
–92
–98
–104
0.1
1
10
FREQUENCY (MHz)
100
2356 G02
THD
2nd
3rd
SNR vs Input Frequency
77
74
71
68
65
62
59
56
53
100
2356 G03
50
0.1
1
10
FREQUENCY (MHz)
100
2356 G04
1.4MHz Sine Wave 8192 Point
FFT Plot
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
0
250K 500K 750K 1M 1.25M 1.5M 1.75M
FREQUENCY (Hz)
2356 G06
2356f
5
嵌入式系统
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
