TECHNICAL DATA
IN74LS161
Synchronous 4 Bit Counters; Binary,
Direct Reset
This synchronous, presettable counter features an internal carry
look-ahead for application in high-speed counting designs.
Synchronous operation is provided by having all flip-flops clocked
simultaneously so that the outputs change conicident with each other
when so instructed by the count-enable inputs and internal gating.
This mode of operation eliminates the output counting spikes that
are normally associated with asynchronous (ripple clock) counters. A
buffered clock input triggers the four flip-flops on the rising (positive-
going) edge of the clock input wave form.
This counter is fully programmable; that is the outputs may be
preset to either level. As presetting is synchronous setting up a low
level at the load input disables the counter and causes the outputs to
agree with the setup data after the next clock pulse regardless of the
levels of the enable inputs.
The carry look-ahead circuitry provides for cascading counters for
n-bit synchronous applications without additional gating. Instrumental
in accomplishiing this function are two counter-enable inputs and a
ripple carry output. Both countenable inputs (ENABLE P and
ENABLE T) must be high to count, and ENABLE T is fed forward
to enable the ripple carry output. The ripple carry output thus
enabled will produce a high-level output pulse with a duration
approximately equal to the high level portion of the Q
A
output. The
high-level overflow ripple carry pulse can be enable successive
cascaded stages. Transitions at the ENPor ENT are allowed
regardless of the level of the clock input.
•
Internal Look-Ahead for Fast Counting
•
Carry Output for n-Bit Cascading
•
Synchronous Counting
•
Synchronously Programmable
•
Load Control Line
•
Diode-Clamped Inputs
ORDERING INFORMATION
IN74LS161N Plastic
IN74LS161D SOIC
T
A
= 0° to 70° C for all
packages
PIN ASSIGNMENT
LOGIC DIAGRAM
PIN 16 =V
CC
PIN 8 = GND
1
IN74LS161
FUNCTION TABLE
Inputs
Reset
L
H
H
H
H
H
Load
X
L
H
H
H
X
Enable
P
X
X
X
L
H
X
Enable
T
X
X
L
X
H
X
Clock
X
Q0
L
P0
Outputs
Q1
L
P1
Q2
L
P2
Q3
L
P3
Function
Reset to “0”
Preset Data
No count
No count
Count
No count
No change
No change
Count up
No change
X=don’t care
P0,P1,P2,P3 = logic level of Data inputs
Ripple Carry Out = Enable T
•
Q0
•
Q1
•
Q2
•
Q3
MAXIMUM RATINGS
*
Symbol
V
CC
V
IN
V
OUT
Tstg
*
Parameter
Supply Voltage
Input Voltage
Output Voltage
Storage Temperature Range
Value
7.0
7.0
5.5
-65 to +150
Unit
V
V
V
°C
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
IH
V
IL
I
OH
I
OL
f
clock
t
w(clock)
t
w(reset)
t
su
t
h
T
A
Supply Voltage
High Level Input Voltage
Low Level Input Voltage
High Level Output Current
Low Level Output Current
Clock frequency
Width of clock pulse
Width of reset pulse
Data inputs P0, P1, P2, P3
Setup time
Hold time at any input
Ambient Temperature Range
Enable P or T
Load
0
25
20
20
20
20
3
0
+70
ns
°C
ns
Parameter
Min
4.75
2.0
0.8
-0.4
8.0
25
Max
5.25
Unit
V
V
V
mA
mA
MHz
ns
ns
2
IN74LS161
DC ELECTRICAL CHARACTERISTICS
over full operating conditions
Guaranteed Limit
Symbol
V
IK
V
OH
V
OL
I
IH
Parameter
Input Clamp Voltage
High Level Output Voltage
Low Level Output Voltage
High Level Input Current
Test Conditions
V
CC
= min, I
IN
= -18 mA
V
CC
= min, I
OH
= -0.4 mA
V
CC
= min, I
OL
= 4 mA
V
CC
= min, I
OL
= 8 mA
V
CC
= max
V
IN
=2.7 V
Data or enable P
Load, clock or
enable T
Reset
V
CC
= max
V
IN
=7.0 V
Data or enable P
Load, clock or
enable T
Reset
I
IL
Low Level Input Current
V
CC
= max
V
IN
=0.4 V
Data or enable P
Load, clock or
enable T
Reset
-20
2.7
0.4
0.5
20
40
20
0.1
0.2
0.1
-0.4
-0.8
mA
mA
µA
Min
Max
-1.5
Unit
V
V
V
I
O
I
CC
Output Short Circuit Current
Supply
Current
All outputs high
All outputs low
V
CC
= max, V
O
= 0 V
(Note 1)
V
CC
= max (Note 2)
V
CC
= max (Note 3)
-100
31
32
mA
mA
Note 1: Not more than one output should be shorted at a time, and the duration should not exceed one second.
Note 2: I
CCH
is measured with the load high, then again with the load low, with all other inputs high and all
outputs open.
Note 3: I
CCL
is measured with the clock input high, then again with the clock input low, with all other inputs low
and all outputs open.
3
IN74LS161
AC ELECTRICAL CHARACTERISTICS
(T
A
=25°C, V
CC
= 5.0 V, C
L
= 15 pF, R
L
= 2 kΩ, t
r
=15
ns, t
f
= 6.0 ns)
Symbol
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PHL
Parameter
Propagation Delay, Clock to Ripple carry
Propagation Delay, Clock to Ripple carry
Propagation Delay, Clock (load input high) to Any Q
Propagation Delay, Clock (load input high) to Any Q
Propagation Delay, Clock (load input low) to Any Q
Propagation Delay, Clock (load input low) to Any Q
Propagation Delay, Enable T to Ripple carry
Propagation Delay, Enable T to Ripple carry
Propagation Delay, Reset to Any Q
Min
Max
35
35
24
27
24
27
14
14
28
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
Figure 1. Switching Waveform
Figure 2. Switching Waveform
Figure 3. Switching Waveform
Figure 4. Switching Waveform
4
IN74LS161
NOTES A. C
L
includes probe and jig capacitance.
B. All diodes are 1N916 or 1N3064.
Figure 5. Test Circuit
Sequence illustrated in waveforms:
1. Reset outputs to zero.
2. Preset to binary twelve.
3. Count to thirteen, fourteen, fifteen, zero, one, and two.
4. Inhibit.
Figure 7. Timing Diagram
5
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