PCMCIA Flash Memory Card
FLG Series
PCMCIA Flash Memory Card
General Description
256KILOBYTE through 5 MEGABYTE (Intel based)
Features
WEDC’s FLG Series Flash memory cards offer low/medium
density linear Flash solid state storage solutions for code and
data storage, high performance disk emulation and execute in
place (XIP) applications in mobile PC and dedicated
(embedded) equipment.
FLG series cards conform to PCMCIA international standard.
The card’s control logic provides the system interface and
controls the internal Flash memories. Card can be
read/written in byte-wide or word-wide mode which allows
for flexible integration into various systems. Combined with
file management software, such as Flash Translation Layer
(FTL), FLG Flash cards provide removable high-performance
disk emulation.
The FLG series cards contain separate 2kB EEPROM
memory for Card Information Structure (CIS) which can be
used for easy identification of card characteristics.
The WEDC FLG series is based on Intel 28F010 or 28F020
Flash memories.
Note: Standard options include attribute memory. Cards
without attribute memory are available. Cards are also
available with or without a hardware write protect switch.
•
Low cost Low/Medium Density Linear Flash
Card
•
Supports 5V systems with 12V VPP.
•Based
on Intel CMOS Components
•Fast
Read Performance
- 150ns Maximum Access Time
•
x8/ x16 Data Interface
•
Quick-Pulse Programming Algorithm
- typical 10µs Byte-Program
•
100,000 Erase/Program Cycles
•
PC Card Standard Type I Form Factor
Architecture Overview
WEDC’s FLG series is designed to support from 2 to 20, 1Mb or 2MB components, providing a wide range of
density options. Cards are based on the 28F010 (1Mb) or 28F020 components which work with 5V Vcc / 12V Vpp
applications. Device codes are
B4h
and
BDh
respectively. Systems should be able to recognize both codes. Cards
utilizing the1Mb components provide densities ranging from 256KB to 2.5MB in 256KB increments, cards utilizing
2Mb components provide densities ranging from 512KB to 5MB in 512KB increments.
In support of the PC Card 95 standard for word wide access devices are paired. Write, read and erase operations
can be performed as either a word or byte wide operation . By multiplexing A0, CE1# and CE2#, 8-bit hosts can
access all data on data lines DQ0 - DQ7. The FLG series cards conform to the PC Card Standard (PCMCIA) and
JEIDA, providing electrical and physical compatibility. The PC Card form factor offers an industry standard pinout
and mechanical outline, allowing density upgrades without system design changes.
WEDC’s standard cards are shipped with WEDC’s Logo. Cards are also available with blank housings (no Logo).
The blank housings are available in both a recessed (for label) and flat housing. Please contact WEDC sales
representative for further information on Custom artwork.
PC Card Products
White Electronic Designs
One Research Drive Westborough, MA 01581
http://www.whiteedc.com
July 28, 1999
1
FLG Series
Block Diagram
Vcc
Vpp2
Device Pair 9
Vpp1
Device 19
CSH9
Device 18
CSL9
Array Address
Bus A1-A17(18)
ADDRESS
BUFFER
ADDRESS BUS
A1-A21(22)
Vcc
Control
Address
Bus
C9
High
C0
C9
Low
C0
Ctrl
Att enable
Control Logic
PCMCIA
Interface
WE#
OE#
CE2#
CE1#
REG#
A0
WP
CSH9
CSH0
Device Pair 1
CSL9
Device 3
CSH1
Device 2
CSL1
CSL0
Device Pair 0
Device 1
CSH0
Device 0
CSL0
Attrib. Mem
CIS
EEPROM 2kB
WR#
DATA
BUS
Q8-Q15
DATA
BUS
Q0-Q7
RD#
Vcc
Q0-Q7
control
Vcc
I/O buffer
DATA
BUS
D8-D15
DATA
BUS
D0-D7
28F010 - max 2.5MB
28F020 - max 5MB
SUPPORTED COMPONENTS (max 20 X):
CD1#
CD2#
GND
WAIT#
BVD1
BVD2
Vcc
Vcc
Device type Manuf ID Device ID
28F010
28F020
89
H
89
H
B4
H
BD
H
VS1
VS2
open
open
PC Card Products
White Electronic Designs
One Research Drive Westborough, MA 01581
http://www.whiteedc.com
July 28, 1999
2
FLG Series
Pinout
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
Signal name
GND
DQ3
DQ4
DQ5
DQ6
DQ7
CE1#
A10
OE#
A11
A9
A8
A13
A14
WE#
RDY/BSY#
Vcc
Vpp1
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
WP
GND
I/O
I/O
I/O
I/O
I/O
I/O
I
I
I
I
I
I
I
I
I
O
Function
Ground
Data bit 3
Data bit 4
Data bit 5
Data bit 6
Data bit 7
Card enable 1
Address bit 10
Output enable
Address bit 11
Address bit 9
Address bit 8
Address bit 13
Address bit 14
Write Enable
Ready/Busy
Supply Voltage
Prog. Voltage
Address bit 16
Address bit 15
Address bit 12
Address bit 7
Address bit 6
Address bit 5
Address bit 4
Address bit 3
Address bit 2
Address bit 1
Address bit 0
Data bit 0
Data bit 1
Data bit 2
Write Potect
Ground
Active
Pin
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
Signal name
GND
CD1#
DQ11
DQ12
DQ13
DQ14
DQ15
CE2#
VS1
RFU
RFU
A17
A18
A19
A20
A21
Vcc
Vpp2
A22
A23
A24
A25
VS2
RST
Wait#
RFU
REG#
BVD2
BVD1
DQ8
DQ9
DQ10
CD2#
GND
I/O
O
I/O
I/O
I/O
I/O
I
I
O
Function
Ground
Card Detect 1
Data bit 11
Data bit 12
Data bit 13
Data bit 14
Data bit 15
Card Enable 2
Voltage Sense 1
Reserved
Reserved
Address bit 17
Address bit 18
Address bit 19
Address bit 20
Address bit 21
Supply Voltage
Prog. Voltage
Address bit 22
Address bit 23
Address bit 24
Address bit 25
Voltage Sense 2
Card Reset
Extended Bus cycle
Reserved
Attrib Mem Select
Bat. Volt. Detect 2
Bat. Volt. Detect 1
Data bit 8
Data bit 9
Data bit 10
Card Detect 2
Ground
Active
LOW
LOW
LOW
LOW
N.C.
LOW
N.C.
I
I
I
I
I
256KB(2)
512KB(2)
1MB(2)
2MB(2)
4MB(2,3)
I
I
I
I
I
I
I
I
I
I
I
I/O
I/O
I/O
O
I
I
I
I
O
I
O
I
O
O
I/O
I/O
O
O
8MB(2,3)
N.C.
N.C.
N.C.
N.C.
N.C.
LOW(1)
(1)
(1)
HIGH
LOW
Notes:
1) Wait#, BVD1 and BVD2 are driven high for compatibility
2) Shows density for which specified address bit is MSB. Higher order address bits are no connects (i.e. 4MB A21 is MSB A22 - A25 are NC).
3) For the 3MB card the memory will wrap at the 4MB boundary, for the 5MB card the memory will wrap at the 8MB boundary.
Mechanical
1.0mm
±
0.05
(0.039”)
Interconnect area
1.6mm
±
0.05
(0.063”)
10.0mm MIN
(0.400”)
3.0mm MIN
Substrate area
54.0mm
±
0.10
(2.126”)
1.0mm
±
0.05
(0.039”)
10.0mm MIN
(0.400”)
85.6mm
±
0.20
(3.370”)
3.3mm
±
T1 (0.130”)
T1=0.10mm interconnect area
T1=0.20mm substrate area
PC Card Products
White Electronic Designs
One Research Drive Westborough, MA 01581
http://www.whiteedc.com
July 28, 1999
3
FLG Series
Card Signal Description
Symbol
Type
INPUT
A0 - A25
DQ0 - DQ15
CE1#, CE2#
OE#
WE#
RDY/BSY#
CD1#, CD2#
WP
INPUT/OUTPUT
INPUT
INPUT
INPUT
N.C.
OUTPUT
OUTPUT
VPP1
VPP2
VCC
GND
REG#
RST
WAIT#
BVD1, BVD2
VS1, VS2
RFU
N.C.
INPUT
Name and Function
ADDRESS INPUTS:
A0 through A25 enable direct addressing of up to
64MB of memory on the card. Signal A0 is not used in word access mode.
The memory will wrap at the card density boundary (see PINOUT, note 3).
The system should not try to access memory beyond the card density.
A25 is the most significant bit. A23 – A25 are not connected.
DATA INPUT/OUTPUT:
DQ0 THROUGH DQ15 constitute the bi-
directional databus. DQ0 – DQ7 constitute the lower (even) byte and DQ8
– DQ15 the upper (odd) byte. DQ15 is the MSB.
CARD ENABLE 1 AND 2:
CE1# enables even byte accesses, CE2#
enables odd byte accesses. Multiplexing A0, CE1# and CE2# allows 8-bit
hosts to access all data on DQ0 - DQ7.
OUTPUT ENABLE:
Active low signal gating read data from the memory
card.
WRITE ENABLE:
Active low signal gating write data to the memory card.
READY/BUSY OUTPUT:
Indicates status of internally timed erase or
program algorithms. This signal is not connected.
CARD DETECT 1 and 2:
Provide card insertion detection. These signals
are internally connected to ground on the card. The host shall monitor
these signals to detect card insertion (pulled-up on host side).
WRITE PROTECT:
Write protect reflects the status of the Write Protect
switch on the memory card. WP set to high = write protected, providing
internal hardware write lockout to the Flash array.
If card does not include optional write protect switch, this signal will be
pulled low internally indicating write protect = "off".
PROGRAM/ERASE POWER SUPPLY:
Provides programming voltages
12.0V for lower byte (D0 – D7) memory components.
PROGRAM/ERASE POWER SUPPLY:
Provides programming voltages
12.0V for upper byte (D8 – D15) memory components.
CARD POWER SUPPLY:
(5.0V).
CARD GROUND
ATTRIBUTE MEMORY SELECT :
Active low signal, enables access to
Attribute Memory Plane, occupied by Card Information Structure and Card
Registers.
RESET:
Active high signal for placing cards in Power-on default state.
This signal is not connected.
WAIT:
This signal is pulled high internally for compatibility. No wait states
are generated.
BATTERY VOLTAGE DETECT:
These signals are pulled high to maintain
SRAM card compatibility.
VOLTAGE SENSE:
Notifies the host socket of the card's VCC
requirements. VS1 and VS2 are open to indicate a 5V card.
RESERVED FOR FUTURE USE
NO INTERNAL CONNECTION TO CARD:
pin may be driven or left
floating
N.C.
OUTPUT
OUTPUT
OUTPUT
PC Card Products
White Electronic Designs
One Research Drive Westborough, MA 01581
http://www.whiteedc.com
July 28, 1999
4
FLG Series
Functional Truth Table
READ function
Common Memory
Attribute Memory
Function Mode
Standby Mode
Byte Access (8 bits)
Word Access (16 bits)
Odd-Byte Only Access
WRITE function
*
Standby Mode
Byte Access (8 bits)
Word Access (16 bits)
Odd-Byte Only Access
/CE2 /CE1
H
H
H
L
H
L
L
L
L
H
H
H
H
L
L
H
L
L
L
H
A0
X
L
H
X
X
X
L
H
X
X
/OE
X
L
L
L
L
X
H
H
H
H
/WE
X
H
H
H
H
X
L
L
L
L
/REG D15-D8
D7-D0
X
High-Z
High-Z
H
High-Z
Even-Byte
H
High-Z
Odd-Byte
H
Odd-Byte Even-Byte
H
Odd-Byte
High-Z
X
H
H
H
H
X
X
X
Even-Byte
X
Odd-Byte
Odd-Byte Even-Byte
Odd-Byte
X
/REG D15-D8
D7-D0
X
High-Z
High-Z
L
High-Z
Even-Byte
L
High-Z Not Valid
L
Not Valid Even-Byte
L
Not Valid
High-Z
X
L
L
L
L
X
X
X
X
X
X
Even-Byte
X
Even-Byte
X
*
Require proper programming voltages (Vpp1, Vpp2). Program or Erase with an invalid Vpp should not be attempted.
Absolute Maximum Ratings (1)
Operating Temperature TA (ambient)
Commercial
Industrial
Storage Temperature
Commercial
Industrial
Voltage on any pin relative to VSS
VCC supply Voltage relative to VSS
Notes:
(1) Stress greater than those listed under “Absolute
Maximum ratings” may cause permanent damage to
the device. This is a stress rating only and
functional operation at these or any other conditions
greater than those indicated in the operational
sections of this specification is not implied.
Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
0°C to +60 °C
-40°C to +85 °C
-30°C to +80 °C
-40°C to +85 °C
-0.5V to VCC+0.5V
-0.5V to +7.0V
PC Card Products
White Electronic Designs
One Research Drive Westborough, MA 01581
http://www.whiteedc.com
July 28, 1999
5
FLG Series
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