EMIF03-SIM06F3
3-line IPAD™, EMI filter including ESD protection
Datasheet
production data
Description
The EMIF03-SIM06F3 chip is a highly integrated
audio filter device designed to suppress EMI/RFI
noise in all systems subjected to electromagnetic
interface.
The filter included ESD protection circuitry, which
prevents damage to the protected device when
subjected to ESD surges up to 15 kV.
Figure 1. Pin configuration (bump side)
1
2
3
A
Flip-chip package
(11 bumps)
Features
EMI symmetrical (I/O) low-pass filter
High efficiency in ESD protection
Lead-free package
Very thin package
High reliability offered by monolithic integration
High reduction of parasitic elements through
integration and wafer level packaging
C
B
Complies with the following standards:
IEC 61000-4-2 level 4
– ± 15 kV (air discharge)
– ± 8 kV (contact discharge)
IEC 61000-4-2 level 1
– ± 2 kV (air discharge)
– ± 2 kV (contact discharge)
D
Figure 2. Functional schematic
10000
W
R4
100
W
R1
47 W
R2
100
W
R3
A2
GND
D1
D2
D3
A1
B1
C1
A3
B3
C3
Application
Where EMI filtering in ESD sensitive equipment is
required:
Mobile phones and communication systems
Computers, printers and MCU boards
C2
GND
A2 and C2 bumps must be conneced together on the PCB
December 2013
This is information on a product in full production.
DocID024459 Rev 1
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www.st.com
7
Characteristics
EMIF03-SIM06F3
1
Characteristics
Table 1. Absolute maximum ratings (T
amb
= 25 °C)
Symbol
Parameter
Internal pins (A1, B1, C1):
ESD discharge IEC 61000-4-2
(1)
, level 1
Air discharge
Contact discharge
External pins (A3, B3, C3, D1, D2, D3):
ESD discharge IEC 61000-4-2
(1)
, level 4
Air discharge
Contact discharge
Operating temperature range
Storage temperature range
Value
Unit
V
PP
2
2
kV
20
20
- 40 to + 85
- 55 to 150
T
op
T
stg
1. Measurements done on IEC 61000-4-2 test bench. For further details see Application note
AN3353, “IEC 61000-4-2 standard testing”.
Figure 3. Electrical characteristics (definitions)
Symbol
V
BR
=
I
RM
=
V
RM
=
V
CL
=
I
PP
=
C
line
=
R
I/O =
P arameter
Breakdown voltage
Leakage current @ VRM
Stand-off voltage
Clamping voltage
Peak pulse current
Line capacitance
Series resistance between
input and ouptput
V
CL
PP
Table 2. Electrical characteristics (T
amb
= 25 °C)
Symbol
I
RM
V
BR
R1
,
R3
R2
R4
C
line
V
RM
= 3 V
I
R
= 1 mA
Tolerance ±20%
Tolerance ±20%
Tolerance ±20%
V
line
= 0 V, V
osc
= 30 mV, F = 10 MHz
(measured under zero light conditions)
8
6
100
47
10
10
12
k
pF
Test conditions
Min.
Typ.
Max.
50
Unit
nA
V
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DocID024459 Rev 1
EMIF03-SIM06F3
Characteristics
Figure 4. Attenuation versus frequency
0
-5
-10
-15
-20
-25
S21(dB)
Figure 5. Analog crosstalk versus frequency
0
-10
-20
-30
-40
-50
XTalk (dB)
-30
-60
-35
-40
1M
3M
Data
Rst
F(Hz)
10M
30M
Clk
F(Hz)
-70
300M
1G
3G
1M
3M
10M
Data-D1
Data-Rst
Rst-D3
100M
30M
100M
300M
Data-Clk
Rst-D2
1G
3G
Figure 6. ESD response to IEC 61000-4-2
(+8 kV contact discharge)
10.0 V / Div
Figure 7. ESD response to IEC 61000-4-2
(-8 kV contact discharge)
20.0 V / Div
1
V
CL
: Peak clamping voltage
2
V
CL
:clamping voltage @ 30 ns
3
V
CL
:clamping voltage @ 60 ns
4
V
CL
:clamping voltage @ 100 ns
1
-21.1 V
2
-10.5 V
3
-9.9 V
4
-6.8 V
1
22.6 V
2
14.0 V
3
11.1 V
4
6.8 V
1
V
CL
: Peak clamping voltage
2
V
CL
:clamping voltage @ 30 ns
3
V
CL
:clamping voltage @ 60 ns
4
V
CL
:clamping voltage @ 100 ns
20 ns / Div
20 ns / Div
Figure 8. Line capacitance versus applied voltage
C(pF)
16
14
12
10
8
6
4
2
bias (V)
0
0
2
4
D2 GND
6
8
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Package information
EMIF03-SIM06F3
2
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
®
specifications, grade definitions and product status are available at:
www.st.com.
ECOPACK
®
is an ST trademark.
Figure 9. Flip-Chip package dimensions
Æ
255 ± 40 µm
500 µm ± 50
400 ± 30 µm
1140 ± 30 µm
170 µm
170 µm
400 ± 30 µm
1540 ± 30 µm
Figure 10. Footprint recommendations
Figure 11. Marking
Copper pad Diameter:
220 µm recommended
260 µm maximum
Solder mask opening:
300 µm minimum
Dot, ST logo
ECOPACK® grade
Solder stencil opening:
220 µm recommended
xx = marking
z = manufacturing location
yww = datecode
(y = year
ww = week)
x x z
y ww
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DocID024459 Rev 1
EMIF03-SIM06F3
Figure 12. Tape and reel specification
Dot identifying Pin A1 location
2.0
0.20
Package information
Ø 1.50
4.0
1.65
8.0
0.59
1.28
4.0
All dimensions are typical values in mm
User direction of unreeling
Note:
More information is available in the application notes:
AN2348, “IPAD™ 400 µm Flip Chip: package description and recommendations for use”
AN1751, “EMI filters: recommendations and measurements”
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