2. TVS devices are normally selected according to the working peak reverse voltage (V
RWM
), which should be equal or greater than the DC
or continuous peak operating voltage level.
3. V
BR
is measured at pulse test current I
T
.
4. Parametrics are the same for the Pb−Free packages, which are suffixed with a “G’’.
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2
SMS05C, SMS12C, SMS15C, SMS24C
TYPICAL PERFORMANCE CURVES
(T
J
= 25°C unless otherwise specified)
PEAK PULSE DERATING IN % OF PEAK POWER
OR CURRENT @ TA = 25
°
C
100
% OF PEAK PULSE CURRENT
90
80
70
60
50
40
30
20
10
0
0
25
50
75
100
125
150
175
200
100
90
80
70
60
50
40
30
20
10
0
0
20
40
t, TIME (ms)
60
80
t
P
t
r
PEAK VALUE I
RSM
@ 8
ms
PULSE WIDTH (t
P
) IS DEFINED
AS THAT POINT WHERE THE
PEAK CURRENT DECAY = 8
ms
HALF VALUE I
RSM
/2 @ 20
ms
T
A
, AMBIENT TEMPERATURE (°C)
Figure 1. Pulse Derating Curve
50
V
C
, CLAMPING VOLTAGE (V)
45
40
35
30
25
20
15
10
5
0
0
5
10
15
20
25
SMS05C
300
JUNCTION CAPACITANCE (pF)
250
200
Figure 2. 8
×
20
ms
Pulse Waveform
SMS24C
8 x 20
ms
PULSE WAVEFORM
f = 1.0 MHz
SMS15C
SMS12C
SMS05C
150
100
50
0
0
5
SMS12C
SMS15C
10
15
SMS24C
20
25
I
PP
, PEAK PULSE CURRENT (A)
V
BR
, REVERSE VOLTAGE (V)
Figure 3. Clamping Voltage vs. Peak Pulse Current
Figure 4. Junction Capacitance vs. Reverse Voltage
Figure 5. ESD Pulse IEC 61000−4−2
(8.0 kV Contact)
Figure 6. SMS15CT1 ESD Response for IEC
61000−4−2 (+8.0 kV Contact)
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3
SMS05C, SMS12C, SMS15C, SMS24C
TYPICAL COMMON ANODE APPLICATIONS
A 5 TVS junction common anode design in a TSOP−6
package protects four separate lines using only one package.
This adds flexibility and creativity to PCB design especially
when board space is at a premium. A simplified example of
SMS05C Series Device applications is illustrated below.
A
KEYBOARD
TERMINAL
PRINTER
ETC.
B
I/O
C
D
E
FUNCTIONAL
DECODER
GND
SMS05C SERIES DEVICE
Figure 7. Computer Interface Protection
V
DD
V
GG
ADDRESS BUS
RAM
ROM
DATA BUS
I/O
CPU
CLOCK
CONTROL BUS
GND
SMS05C SERIES DEVICE
Figure 8. Microprocessor Protection
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4
SMS05C, SMS12C, SMS15C, SMS24C
PACKAGE DIMENSIONS
TSOP−6
CASE 318G−02
ISSUE U
D
H
6
5
4
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM
LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR
GATE BURRS SHALL NOT EXCEED 0.15 PER SIDE. DIMENSIONS D
AND E1 ARE DETERMINED AT DATUM H.
5. PIN ONE INDICATOR MUST BE LOCATED IN THE INDICATED ZONE.
DIM
A
A1
b
c
D
E
E1
e
L
L2
M
MIN
0.90
0.01
0.25
0.10
2.90
2.50
1.30
0.85
0.20
0°
MILLIMETERS
NOM
MAX
1.00
1.10
0.06
0.10
0.38
0.50
0.18
0.26
3.00
3.10
2.75
3.00
1.50
1.70
0.95
1.05
0.40
0.60
0.25 BSC
10°
−
L2
E
GAUGE
PLANE
NOTE 5
e
0.05
A1
ON Semiconductor
and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
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P.O. Box 5163, Denver, Colorado 80217 USA
Phone:
303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax:
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Email:
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Order Literature:
http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
ÉÉ
ÉÉ
1
2
E1
3
L
b
M
C
DETAIL Z
SEATING
PLANE
A
c
DETAIL Z
RECOMMENDED
SOLDERING FOOTPRINT*
0.60
6X
3.20
0.95
6X
0.95
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
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