Freescale Semiconductor
Technical Data
Document Number: MRF18030B
Rev. 7, 5/2006
RF Power Field Effect Transistors
N - Channel Enhancement - Mode Lateral MOSFETs
Designed for GSM and EDGE base station applications with frequencies
from 1800 to 2000 MHz. Suitable for FM, TDMA, CDMA and multicarrier
amplifier applications. Specified for GSM 1930 - 1990 MHz.
•
Typical GSM Performance:
Power Gain - 14 dB (Typ) @ 30 Watts
Efficiency - 50% (Typ) @ 30 Watts
•
Capable of Handling 5:1 VSWR, @ 26 Vdc, 30 Watts CW Output Power
Features
•
Internally Matched for Ease of Use
•
High Gain, High Efficiency and High Linearity
•
Integrated ESD Protection
•
Designed for Maximum Gain and Insertion Phase Flatness
•
Excellent Thermal Stability
•
Low Gold Plating Thickness on Leads, 40μ″ Nominal.
•
RoHS Compliant
•
In Tape and Reel. R3 Suffix = 250 Units per 32 mm,13 inch Reel.
MRF18030BLR3
MRF18030BLSR3
1930- 1990 MHz, 30 W, 26 V
GSM/GSM EDGE
LATERAL N - CHANNEL
RF POWER MOSFETs
CASE 465E - 04, STYLE 1
NI - 400
MRF18030BLR3
CASE 465F - 04, STYLE 1
NI - 400S
MRF18030BLSR3
Table 1. Maximum Ratings
Rating
Drain- Source Voltage
Gate- Source Voltage
Total Device Dissipation @ T
C
= 25°C
Derate above 25°C
Storage Temperature Range
Case Operating Temperature
Operating Junction Temperature
Symbol
V
DSS
V
GS
P
D
T
stg
T
C
T
J
Value
- 0.5, +65
- 0.5, +15
83.3
0.48
- 65 to +150
150
200
Unit
Vdc
Vdc
W
W/°C
°C
°C
°C
Table 2. Thermal Characteristics
Characteristic
Thermal Resistance, Junction to Case
Symbol
R
θJC
Value
2.1
Unit
°C/W
Table 3. ESD Protection Characteristics
Test Conditions
Human Body Model
Machine Model
Class
2 (Minimum)
M3 (Minimum)
©
Freescale Semiconductor, Inc., 2006. All rights reserved.
MRF18030BLR3 MRF18030BLSR3
1
RF Device Data
Freescale Semiconductor
Table 4. Electrical Characteristics
(T
C
= 25°C, 50 ohm system unless otherwise noted)
Characteristic
Off Characteristics
Drain- Source Breakdown Voltage
(V
GS
= 0 Vdc, I
D
= 20
μAdc)
Zero Gate Voltage Drain Current
(V
DS
= 26 Vdc, V
GS
= 0 Vdc)
Gate- Source Leakage Current
(V
GS
= 5 Vdc, V
DS
= 0 Vdc)
On Characteristics
Gate Threshold Voltage
(V
DS
= 10 Vdc, I
D
= 100
μAdc)
Gate Quiescent Voltage
(V
DS
= 26 Vdc, I
D
= 250 mAdc)
Drain- Source On - Voltage
(V
GS
= 10 Vdc, I
D
= 1 Adc)
Forward Transconductance
(V
DS
= 10 Vdc, I
D
= 1 Adc)
Dynamic Characteristics
Reverse Transfer Capacitance
(1)
(V
DS
= 26 Vdc
±
30 mV(rms)ac @ 1 MHz, V
GS
= 0 Vdc)
Functional Tests
(In Freescale Test Fixture)
(2)
Output Power, 1 dB Compression Point
(V
DD
= 26 Vdc, I
DQ
= 250 mA, f = 1930 - 1990 MHz)
Common- Source Amplifier Power Gain @ 30 W
(V
DD
= 26 Vdc, I
DQ
= 250 mA, f = 1930 - 1990 MHz)
Drain Efficiency @ 30 W
(V
DD
= 26 Vdc, I
DQ
= 250 mA, f = 1930 - 1990 MHz)
Input Return Loss @ 30 W
(V
DD
= 26 Vdc, I
DQ
= 250 mA, f = 1930 - 1990 MHz)
1. Part internally matched both on input and output.
2. Device specifications obtained on a Production Test Fixture.
P1dB
G
ps
η
IRL
27
13
46.5
—
30
14
50
- 12
—
—
—
-9
W
dB
%
dB
C
rss
—
1.3
—
pF
V
GS(th)
V
GS(Q)
V
DS(on)
g
fs
2
2
—
—
3
3.9
0.29
2
4
4.5
0.4
—
Vdc
Vdc
Vdc
S
V
(BR)DSS
I
DSS
I
GSS
65
—
—
—
—
—
—
1
1
Vdc
μAdc
μAdc
Symbol
Min
Typ
Max
Unit
MRF18030BLR3 MRF18030BLSR3
2
RF Device Data
Freescale Semiconductor
V
GG
R2
R3
C7
R1
C8
Z9
C4
+
V
DD
C9
RF
INPUT
Z4
Z1
C1
Z2
C2
Z3
DUT
Z5
Z6
C3
Z7
C6
Z8
RF
OUTPUT
C5
C1
C2
C3
C4, C5
C6, C7, C8
C9
R1
R2, R3
Z1
1.8 pF, 100B Chip Capacitor
0.8 pF, 100B Chip Capacitor
0.8 pF, 100B Chip Capacitor
1.2 pF, 100B Chip Capacitors
8.2 pF, 100B Chip Capacitors
220
mF,
63 V Electrolytic Capacitor
1.0 kΩ, 1/8 W Chip Resistor (0805)
10 kΩ, 1/8 W Chip Resistors (0805)
0.496″ x 0.087″ Microstrip
Z2
Z3
Z4
Z5
Z6
Z7
Z8
Z9
1.022″ x 0.087″ Microstrip
0.257″ x 0.633″ Microstrip
0.189″ x 0.394″ Microstrip
0.335″ x 0.394″ Microstrip
0.616″ x 0.087″ Microstrip
0.845″ x 0.087″ Microstrip
0.366″ x 0.087″ Microstrip
≈0.500″
x 0.087″ Microstrip
Figure 1. 1930 - 1990 MHz Test Fixture Schematic
VBIAS
R2 R3
C7
C1
C2
CUTOUT AREA
C5
C3
R1
C8
C4
C9
VSUPPLY
C6
Ground
(bias)
MRF18030B
Ground
(supply)
Freescale has begun the transition of marking Printed Circuit Boards (PCBs) with the Freescale Semiconductor
signature/logo. PCBs may have either Motorola or Freescale markings during the transition period. These changes will have
no impact on form, fit or function of the current product.
Figure 2. 1930 - 1990 MHz Test Fixture Component Layout
MRF18030BLR3 MRF18030BLSR3
RF Device Data
Freescale Semiconductor
3
TYPICAL CHARACTERISTICS
16
15
G ps , POWER GAIN (dB)
14
13
12
11
10
1850
V
DD
= 26 Vdc
I
DQ
= 250 mA
T = 25_C
1900
G
ps
@ 15 W
G
ps
@ 30 W
0
Pout , OUTPUT POWER (WATTS)
IRL, INPUT RETURN LOSS (dB)
−5
−10
−15
−20
−25
−30
2050
40
35
30
25
20
15
10
5
0
1880
1900
1920
1940
1960
1980
2000
2020
0.5 W
V
DD
= 26 Vdc
I
DQ
= 250 mA
T = 25_C
P
in
= 2 W
1W
IRL @ 30 W
IRL @ 15 W
0.25 W
1950
f, FREQUENCY (MHz)
2000
f, FREQUENCY (MHz)
Figure 3. Wideband Gain and IRL at 30 W and
15 W Output Power
Figure 4. Output Power versus Frequency
16
15
G ps , POWER GAIN (dB)
14
13
12
11
10
I
DQ
= 400 mA
G ps , POWER GAIN (dB)
300 mA
200 mA
15
14
13
12
11
10
9
100
0.1
V
DD
= 26 Vdc
I
DQ
= 250 mA
f = 1960 MHz
1
10
100
P
out
, OUTPUT POWER (WATTS)
T = 25_C
55_C
85_C
100 mA
V
DD
= 26 Vdc
f = 1960 MHz
T = 25_C
0.1
1
10
P
out
, OUTPUT POWER (WATTS)
Figure 5. Power Gain versus Output Power
Figure 6. Power Gain versus Output Power
15
14
G ps , POWER GAIN (dB)
13
12
11
I
DQ
= 250 mA
f = 1960 MHz
T = 25_C
1
10
P
out
, OUTPUT POWER (WATTS)
16
15
G ps , POWER GAIN (dB)
14
13
12
h
11
10
100
0.1
1
V
DD
= 26 Vdc
I
DQ
= 250 mA
f = 1960 MHz
T = 25_C
10
G
ps
60
50
40
30
20
10
0
100
η
, DRAIN EFFICIENCY (%)
30 V
28 V
26 V
V
DD
= 22 V
24 V
10
P
out
, OUTPUT POWER (WATTS)
Figure 7. Power Gain versus Output Power
Figure 8. Power Gain and Efficiency versus
Output Power
MRF18030BLR3 MRF18030BLSR3
4
RF Device Data
Freescale Semiconductor
Z
o
= 25
Ω
f = 2110 MHz
Z
load
f = 1710 MHz
f = 2110 MHz
f = 1710 MHz
Z
source
V
DD
= 26 V, I
DQ
= 250 mA, P
out
= 30 W (CW)
f
MHz
1710
1785
1805
1840
1880
1960
1990
2110
Z
source
Ω
2.92 - j8.24
3.84 - j9.75
4.15 - j10.38
4.04 - j10.22
6.12 - j12.29
6.20 - j12.29
8.61 - j12.10
15.19 - j11.85
Z
load
Ω
4.18 - j9.06
4.59 - j9.46
4.98 - j9.06
6.10 - j7.63
5.83 - j6.89
5.55 - j6.33
5.93 - j6.66
3.82 - j5.33
Z
source
= Test circuit impedance as measured from
gate to ground.
Z
load
= Test circuit impedance as measured
from drain to ground.
Device
Under Test
Output
Matching
Network
Input
Matching
Network
Z
source
Z
load
Figure 9. Series Equivalent Source and Load Impedance
MRF18030BLR3 MRF18030BLSR3
RF Device Data
Freescale Semiconductor
5
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