TSC87C51/52
Introduction to TSC87C51/C52 OTP Microcontrollers
Introduction
The Microcontroller market is moving very fast, surprisingly the OTP market is even faster due to the following reasons:
D
Time to market for new systems is the key answer to be on the leading edge and to continue to grow.
D
Late orders coming from end customers or need for customized versions to better serve the market.
That’s why the OTP market represents already more than 15% of the total volume.
Now TEMIC introduces brand new products –completing its existing offering– to better serve your needs. You can have
access to the TSC87C51 and TSC87C52 One–Time–Programmable C51 microcontrollers and speed up your market
penetration while preserving a low system cost.
These products have been qualified in order to be compatible with the Industry standard from Intel as TEMIC is one of
the three major Intel licensed manufacturer.
TEMIC will continue to expand its global offering with also the compatible Mask ROM products which are still being
supported with new improvements. These product always guarantee full compatibility with C51 Intel architecture.
Therefore, it is easy qualify TEMIC products in your existing or new applications.
Thank you to get access to the TEMIC C51 OTP family through all the documentation and support like this design guide
which is providing all the information on the products the way to implement them in the application and how to program
them.
TEMIC Microcontrollers Overview
In the 8–bit microcontroller market, the 80C51 architecture has become an industry standard in embedded applications.
Introduced in the early’s 1980’s by TEMIC/Matra MHS under Intel License, the 80C51 is still a market leader.
For over 15 years, TEMIC has been a leading provider of 80C51 microcontrollers to major embedded markets. Today,
TEMIC is ranked number 3 in worldwide sales of 80C51 devices, representing over 20% market share. This unsurpassed
experience is at the service of TEMIC customers in every application.
TEMIC now enlarges its product range by adding one time programmable (OTP) versions of standard products and the
highly increased number of product derivatives for applications mainly targeted in the Communication and Computer
area.
Also the market is in need for a more powerful solution to meet the requirements of increasingly sophisticated embedded
applications. High growth markets, including applications in communication, automotive and personal computing are
driving these requirements. Therefore TEMIC has introduced in 1996 the first two products of the Intel–licensed
TSC80251 8–bit extended architecture.
MATRA MHS
Rev. A
–
10 September 1997
1
TSC87C51/52
C51 Standard Microcontrollers selection table
Max
Speed
(MHz)
Device
ROM
(byte)
RAM
(byte)
I/0
Serial
Interfaces
16–bit
Timers
WD
Other
Features
General Purpose Microcontrollers – 5 Volt
TSC80C31
TSC80C51
TSC87C51
80C32
80C52
TSC87C52
80C154
83C154
83C154D
–
4K
4 K OTP
–
8K
8 K OTP
–
16 K
32 K
128
128
128
256
256
256
256
256
256
44
44
44
44
36
36
36
36
36
32
32
32
32
32
32
32
32
32
UART
UART
UART
UART
UART
UART
UART
UART
UART
2
2
2
3
3
3
3
3
3
D
D
D
SR, ST
SR, ST
SR, ST
SR, ST
SR, ST
SR, ST
SR, ST
SR, ST
SR, ST
General Purpose – Low Voltage: 3 Volt, up to 20 MHz !
TSC80C31–L
TSC80C51–L
TSC87C51–L
80C32–L
80C52...–L
TSC87C52–L
80C154–L
83C154...–L
83C154D...–L
–
4K
4 K OTP
–
8K
8 K OTP
–
16 K
32 K
128
128
128
256
256
256
256
256
256
20
20
16
16
16
16
16
16
16
32
32
32
32
32
32
32
32
32
UART
UART
UART
UART
UART
UART
UART
UART
UART
2
2
2
3
3
3
3 (WD)
3 (WD)
3 (WD)
D
D
D
SR, ST
SR, ST
SR, ST
SR, ST
SR, ST
SR, ST
SR, ST
SR, ST
SR, ST
General Purpose – Very Low Voltage: 1.8 Volt
TSC80CL31
TSC80CL51
–
4K
128
128
4
4
32
32
UART
UART
2
2
SR, ST
SR, ST
WD: Watchdog Timer
SR: Secret ROMencrypted ROM option to secure the ROM against piracy.
ST: Secret Tag a 64–Bit identifier can be customized in order to serialize each microcontroller with a unique number.
C51 OTP Product features by supplier
In this chapter you will find the benchmark between the TEMIC products and other suppliers on the market of C51 OTP
microcontrollers.
This will help you to ensure the compatibility of the TEMIC product in your application after you have exactly listed the
features which are being used.
You can note that the standard features are not listed in this table
MATRA MHS
Rev. A
–
10 September 1997
2
TSC87C51/52
87C51 OTP product features by supplier
Feature
Power off Flag
UART : Automatic
Address Recognition
UART : Framing er-
ror Detection
Power–Down output
using external inter-
rupt
ALE disabling
ONCE mode
EPROM lock bits
Four levels priority
interrupt
Full static design
(Frequency down to
0 Mhz)
Supply voltage
5V
3V
Speed
12/16 MHz
24 MHz
33 MHz
40 MHz
Range
0°C to 70°C
–40°C to 85°C
Package
PDIL 40
PLCC 44
PQFP 44
TQFP 44
Power consumption
(Max., 5V)
Active (mA)
Idle (mA)
PD (µA)
TEMIC
TSC80C51
No
No
No
No
TEMIC
TSC87C51
Yes
No
Yes
No
INTEL
87C51
Yes
Yes
Yes
Yes
Philips
87C51
No
No
No
No
LG
GMS80C7004
No
No
No
No
Atmel
AT89C51
No
No
No
No
Windbond
W87E51
No
No
No
No
Yes
No
NA
No
Yes
Yes
Yes
Yes
2
No
Yes
Yes
Yes
Yes
Yes
No
No
No
Yes
No
No
No
No
Yes
No
Yes
No
Yes
Yes
No
Yes
No
No
Yes
No
Yes
Yes
Yes
Yes
Yes
2
Yes
No
Yes
No
Yes
No
Yes
Yes
Yes
No
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
2
Yes
Yes
Yes
No
Yes
Yes
No
No
Yes
Yes
No
No
Yes
Yes
No
No
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
3
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
Yes
Yes
No
No
Yes
Yes
No
No
Yes
Yes
Yes
Yes
Yes
Yes
No
No
(at 16 MHz)
25
6.5
30
(at 16 MHz)
25
8.5
50
(at 16 MHz)
38
9.5
75
(at 16 MHz)
32
5
50
(at 12 MHz)
21
18
50
(at 12 MHz)
25
6.5
100
(at 20 MHz)
50
7
50
1 No clock out generation
2 Under study, no yet available.
3 except 33 Mhz
NA: Not Available
MATRA MHS
Rev. A
–
10 September 1997
3
TSC87C51/52
87C52 OTP product features by supplier
Siemens
Feature
TEMIC
80C52
TEMIC
TSC87C52
INTEL
87C52
Philips
87C52
C501–1E
LG
GMS80C701
Power off Flag
Enhanced Timer 2
UART : Automatic
Address Recogni-
tion
UART : Framing er-
ror Detection
Power–Down output
using external inter-
rupt
ALE disabling
ONCE mode
EPROM lock bits
Full static design
(Frequency down to
0 Mhz)
Supply voltage
5V
3V
Speed
12/16 MHz
24 MHz
33 MHz
40 MHz
Range
0°C to 70°C
–40°C to 85°C
Package
PDIL 40
PLCC 44
PQFP 44
TQFP 44
Power consumption
(Max., 5V)
Active (mA)
Idle (mA)
PD (µA)
1 No clock out generation
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
Yes
Yes
No
No
Yes
Yes
No
No
Yes
Yes
Yes
Yes
Yes
Yes
No
No
Yes
Yes
Yes
Yes
Yes
Yes
3
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
2
Yes
Yes
Yes
No
Yes
Yes
No
No
Yes
Yes
No
No
Yes
Yes
No
No
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
2
Yes
No
Yes
No
Yes
No
Yes
Yes
Yes
No
No
No
No
Yes
Yes
No
Yes
Yes
Yes
No
No
No
No
Yes
1
No
No
Yes
No
No
No
No
Atmel
AT89C52
Windbond
W87E52
No
No
Yes
No
Yes
Yes
No
No
No
No
No
No
No
No
Yes
No
NA
Yes
Yes
Yes
Yes
2
Yes
Yes
Yes
Yes
No
No
No
Yes
No
No
No
Yes
Yes
No
Yes
Yes
Yes
No
No
Yes
Yes
(at 16 MHz)
25
8.5
50
(at 16 MHz)
25
8.5
50
(at 16 MHz)
38
9.5
75
(at 16 MHz)
32
5
50
(at 12 MHz)
21
18
50
(at 12 MHz)
25
6.5
100
(at 20 MHz)
50
7
50
2 Under study, no yet available.
3 except 33 MHz
NA: Not Available
MATRA MHS
Rev. A
–
10 September 1997
4
TSC87C51/52
Glossary
Power off Flag
This flag is used by the software to make the difference between a power on reset and a reset exiting from power down.
In the power down mode, the crystal is stopped and the microcontroller power consumption is closed to zero. This flag
is useful for low power application using the power down mode.
Enhanced Timer 2
Two new features are added to the timer 2 :
D
Configuration as an up/down counter
D
Clock out generation
UART : Automatic Address Recognition
Two new features are added to the UART. These features lower the software task during multi mode operation :
D
Automatic Address Recognition ; in this mode the address recognition is done by hardware rather than by software.
D
Framing error Detection; a new bit warn the software that one stop bit is missing.
Power–Down output using external interrupt
With this feature an external interrupt can cause a recover from power down mode ; otherwise, only a reset can restart
the microcontroller. this feature provides more flexibility for low power systems.
ALE disabling
The “Address Latch Enable” is activated at a constant rate of 1/6 the oscillator frequency, except during an external data
memory access at which one ALE pulse is skipped. When no external RAM and ROM access is required, the ALE is not
necessary and can generated noise and EMI. With the ALE disable, this signal is only generated under software when
it is required.
ONCE mode
The ON–Circuit Emulation (ONCE) mode facilitates testing and debugging of the system using the microcontroller
without having to remove the device from the circuit. In this mode, the device is placed on an inactive state and an
emulator or test CPU can be used to drive the circuit.
EPROM lock bits
The program lock bits protect the program memory from software piracy.
Four levels interrupt priority
The initial 8051 architecture has two levels interrupt priority. A second Interrupt Priority register has been added,
increasing the number of priority levels to four. This feature provides more flexibility to real time systems.
Full Static Design
This allows to reduce the system power consumption by bringing the clock frequency down to any value, even 0 Mhz
(DC), without loss of data.
MATRA MHS
Rev. A
–
10 September 1997
5
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