19-2956; Rev 1; 10/09
KIT
ATION
EVALU
BLE
AVAILA
Multichannel, 16-Bit, 200ksps Analog-to-Digital
Converters
General Description
The MAX1167/MAX1168 low-power, multichannel, 16-
bit analog-to-digital converters (ADCs) feature a suc-
cessive-approximation ADC, integrated +4.096V
reference, a reference buffer, an internal oscillator,
automatic power-down, and a high-speed SPI™/
QSPI™/MICROWIRE™-compatible interface. The
MAX1167/MAX1168 operate with a single +5V analog
supply and feature a separate digital supply, allowing
direct interfacing with +2.7V to +5.5V digital logic.
The MAX1167/MAX1168 consume only 3.6mA (AV
DD
=
DV
DD
= +5V) at 200ksps when using an external reference.
AutoShutdown™ reduces the supply current to 185µA at
10ksps and to less than 10µA at reduced sampling rates.
The MAX1167 includes a 4-channel input multiplexer, and
the MAX1168 accepts up to eight analog inputs.
In addition, digital signal processor (DSP)-initiated con-
versions are simplified with the DSP frame-sync input and
output featured in the MAX1168. The MAX1168 includes
a data-bit transfer input to select between 8-bit-wide or
16-bit-wide data-transfer modes. Both devices feature a
scan mode that converts each channel sequentially or
one channel continuously.
Excellent dynamic performance and low power, com-
bined with ease of use and an integrated reference, make
the MAX1167/MAX1168 ideal for control and data-acqui-
sition operations or for other applications with demanding
power consumption and space requirements. The
MAX1167 is available in a 16-pin QSOP package and the
MAX1168 is available in a 24-pin QSOP package. Both
devices are guaranteed over the commercial (0°C to
+70°C) and extended (-40°C to +85°C) temperature
ranges. Use the MAX1168 evaluation kit to evaluate the
MAX1168.
♦
16-Bit Resolution, No Missing Codes
♦
+5V Single-Supply Operation
♦
Adjustable Logic Level (+2.7V to +5.25V)
♦
Input Voltage Range: 0 to V
REF
♦
Internal (+4.096V) or External (+3.8V to AV
DD
)
Reference
♦
Internal Track/Hold, 4MHz Input Bandwidth
♦
Internal or External Clock
♦
SPI/QSPI/MICROWIRE-Compatible Serial
Interface, MAX1168 Performs DSP-Initiated
Conversions
♦
8-Bit-Wide or 16-Bit-Wide Data-Transfer Mode
(MAX1168 Only)
♦
4-Channel (MAX1167) or 8-Channel (MAX1168)
Input Mux
Scan Mode Sequentially Converts Multiple
Channels or One Channel Continuously
♦
Low Power
3.6mA at 200ksps
1.85mA at 100ksps
185µA at 10ksps
0.6µA in Full Power-Down Mode
♦
Small Package Size
16-Pin QSOP (MAX1167)
24-Pin QSOP (MAX1168)
Features
MAX1167/MAX1168
Applications
Motor Control
Industrial Process Control
Industrial I/O Modules
Data-Acquisition Systems
Thermocouple Measurements
Accelerometer Measurements
PART
MAX1167BCEE
MAX1167BEEE
MAX1168BCEG
MAX1168BEEG
Ordering Information
TEMP RANGE
0°C to +70°C
-40°C to +85°C
0°C to +70°C
-40°C to +85°C
PIN-
PACKAGE
16 QSOP
16 QSOP
24 QSOP
24 QSOP
INL
(LSB)
±3
±3
±3
±3
Pin Configurations appear at end of data sheet.
SPI/QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
AutoShutdown is a trademark of Maxim Integrated Products, Inc.
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
Multichannel, 16-Bit, 200ksps Analog-to-Digital
Converters
MAX1167/MAX1168
ABSOLUTE MAXIMUM RATINGS
AV
DD
to AGND .........................................................-0.3V to +6V
DV
DD
to DGND.........................................................-0.3V to +6V
DGND to AGND.....................................................-0.3V to +0.3V
AIN_, REF, REFCAP to AGND..................-0.3V to (AV
DD
+ 0.3V)
SCLK,
CS,
DSEL, DSPR, DIN to DGND ...................-0.3V to +6V
DOUT, DSPX,
EOC
to DGND...................-0.3V to (DV
DD
+ 0.3V)
Maximum Current into Any Pin............................................50mA
Continuous Power Dissipation (T
A
= +70°C)
16-Pin QSOP (derate 8.3mW/°C above +70°C)...........667mW
24-Pin QSOP (derate 9.5mW/°C above +70°C)...........762mW
Operating Temperature Ranges
MAX116_ _ CE_ ..................................................0°C to +70°C
MAX116_ _ EE_ ...............................................-40°C to +85°C
Maximum Junction Temperature .....................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(AV
DD
= DV
DD
= +4.75V to +5.25V, f
SCLK
= 4.8MHz external clock (50% duty cycle), 24 clocks/conversion (200ksps), external V
REF
= +4.096V, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C.)
PARAMETER
DC ACCURACY
(Note 1)
Resolution
Relative Accuracy (Note 2)
Differential Nonlinearity
Transition Noise
Offset Error
Gain Error
Offset Drift
Gain Drift
Signal-to-Noise Plus Distortion
Signal-to-Noise Ratio
Total Harmonic Distortion
Spurious-Free Dynamic Range
Full-Power Bandwidth
Full-Linear Bandwidth
Channel-to-Channel Isolation
CONVERSION RATE
Conversion Time
Acquisition Time
Serial Clock Frequency
t
CONV
t
ACQ
f
SCLK
Internal clock, no data transfer,
single conversion (Note 5)
External clock
(Note 6)
External clock, data transfer and conversion
External clock, data transfer only
729
0.1
4.8
9
5.52
3.75
ns
MHz
7.07
μs
SINAD
SNR
THD
SFDR
-3dB point
SINAD > 85dB
(Note 4)
88
(Note 3)
85
86
DYNAMIC SPECIFICATIONS (1kHz sine wave, 4.096V
P-P
)
(Note 1)
88.5
88.5
-100
101
4
10
96
-88
dB
dB
dB
dB
MHz
kHz
dB
(Note 3)
INL
DNL
MAX116_B
MAX116_B
(16 bit, no missing codes over temperature)
RMS
noise
External reference
Internal reference
16-bit
NMC
16
±1.8
+0.7
0.7
0.8
±0.1
±0.01
1
±1.2
±10
±0.2
±3
+1.75
Bits
LSB
LSB
LSB
RMS
mV
%FSR
ppm/°C
ppm/°C
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
2
_______________________________________________________________________________________
Multichannel, 16-Bit, 200ksps Analog-to-Digital
Converters
ELECTRICAL CHARACTERISTICS (continued)
(AV
DD
= DV
DD
= +4.75V to +5.25V, f
SCLK
= 4.8MHz external clock (50% duty cycle), 24 clocks/conversion (200ksps), external V
REF
= +4.096V, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C.)
PARAMETER
Internal Clock Frequency
Aperture Delay
Aperture Jitter
SYMBOL
f
INTCLK
t
AD
t
AJ
8-bit-wide data-transfer mode
16-bit-wide data-transfer mode
Internal clock, single conversion, 8-bit-wide
data-transfer mode
Sample Rate (Note 7)
f
S
Internal clock, single conversion, 16-bit-
wide data-transfer mode
Internal clock, scan mode, 8-bit-wide data-
transfer mode (four conversions)
External clock, scan mode, 16-bit-wide
data-transfer mode (four conversions)
Duty Cycle
ANALOG INPUT (AIN_)
Input Range
Input Capacitance
EXTERNAL REFERENCE
Input Voltage Range
V
REF
(Note 8)
V
AIN
_ = 0
Input Current
INTERNAL REFERENCE
Reference Voltage
Reference Short-Circuit Current
Reference Temperature
Coefficient
Reference Wake-Up Time
t
RWAKE
V
REF
= 0
0.7
DV
DD
0.3
DV
DD
Digital inputs = 0 to DV
DD
±0.1
0.2
15
±1
DIGITAL INPUTS (SCLK,
CS,
DSEL, DSPR, DIN) (DV
DD
= +2.7V to +5.25V)
Input High Voltage
Input Low Voltage
Input Leakage Current
Input Hysteresis
Input Capacitance
V
IH
V
IL
I
IN
V
HYST
C
IN
V
V
μA
V
pF
V
REFIN
I
REFSC
4.042
4.096
13
±25
5
4.136
V
mA
ppm/°C
ms
I
REF
SCLK idle
CS
= DV
DD
, SCLK idle
3.8
34
0.1
0.1
μA
AV
DD
- 0.2
V
V
AIN
_
C
AIN
_
0
45
V
REF
V
pF
45
4.17
3.125
89
68
103
82
55
%
ksps
Internal clock
CONDITIONS
MIN
3.2
TYP
4.0
15
<50
200.00
150.00
MAX
UNITS
MHz
ns
ps
MAX1167/MAX1168
_______________________________________________________________________________________
3
Multichannel, 16-Bit, 200ksps Analog-to-Digital
Converters
MAX1167/MAX1168
ELECTRICAL CHARACTERISTICS (continued)
(AV
DD
= DV
DD
= +4.75V to +5.25V, f
SCLK
= 4.8MHz external clock (50% duty cycle), 24 clocks/conversion (200ksps), external V
REF
= +4.096V, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
DV
DD
-
0.4
0.8
0.4
±0.1
15
4.75
2.70
200ksps
100ksps
Analog Supply Current (Note 9)
I
AVDD
10ksps
1ksps
External reference
Internal reference
External reference
Internal reference
External reference
Internal reference
External reference
Internal reference
200ksps
Digital Supply Current
I
DVDD
DOUT =
all zeros
100ksps
10ksps
1ksps
CS
= DV
DD
,
SCLK = 0,
DIN = 0,
DSPR = DV
DD
Internal reference and
reference buffer on
between conversions
Internal reference on,
reference buffer off
between conversions
2.7
3.6
1.4
2.7
0.14
1.8
0.014
1.7
0.87
0.45
0.045
0.005
0.66
mA
0.20
1.3
mA
mA
5.25
5.25
3.3
4.2
±10
TYP
MAX
UNITS
DIGITAL OUTPUT (DOUT, DSPX,
EOC)
(DV
DD
= +2.7V to +5.25V)
Output High Voltage
Output Low Voltage
Three-State Output Leakage
Current
Three-State Output Capacitance
POWER SUPPLIES
Analog Supply
Digital Supply
AV
DD
DV
DD
V
V
V
OH
V
OL
I
L
C
OUT
I
SOURCE
= 0.5mA
I
SINK
= 10mA, DV
DD
= +4.75V to +5.25V
I
SINK
= 1.6mA, DV
DD
= +2.7V to +5.25V
CS
= DV
DD
CS
= DV
DD
V
V
μA
pF
Power-Down Supply Current
I
AVDD
+
I
DVDD
Shutdown Supply Current
Power-Supply Rejection Ratio
I
AVDD
+
I
DVDD
PSRR
CS
= DV
DD
, SCLK = 0, DIN = 0,
DSPR = DV
DD
, full power-down
AV
DD
= DV
DD
= 4.75V to 5.25V, full-scale
input (Note 10)
0.6
63
10
μA
dB
4
_______________________________________________________________________________________
Multichannel, 16-Bit, 200ksps Analog-to-Digital
Converters
TIMING CHARACTERISTICS (Figures 1, 2, 8, and 16)
(AV
DD
= DV
DD
= +4.75V to +5.25V,
f
SCLK
= 4.8MHz external clock (50% duty cycle), 24 clocks/conversion (200ksps), external
V
REF
= +4.096V, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C.)
PARAMETER
Acquisition Time
SCLK to DOUT Valid
CS
Fall to DOUT Enable
CS
Rise to DOUT Disable
CS
Pulse Width
CS
to SCLK Setup
CS
to SCLK Hold
SCLK High Pulse Width
SCLK Low Pulse Width
SCLK Period
DIN to SCLK Setup
DIN to SCLK Hold
CS
Falling to DSPR Rising
DSPR to SCLK Falling Setup
DSPR to SCLK Falling Hold
SYMBOL
t
ACQ
t
DO
t
DV
t
TR
t
CSW
t
CSS
t
CSH
t
CH
t
CL
t
CP
t
DS
t
DH
t
DF
t
FSS
t
FSH
SCLK rise
SCLK fall (DSP)
SCLK rise
SCLK fall (DSP)
SCLK rise
SCLK fall (DSP)
SCLK rise
SCLK fall (DSP)
Duty cycle 45% to 55%
Duty cycle 45% to 55%
Conversion
Data transfer
Conversion
Data transfer
C
DOUT
= 30pF
C
DOUT
= 30pF
C
DOUT
= 30pF
100
100
0
93
50
93
50
209
50
0
100
100
0
CONDITIONS
External clock (Note 6)
MIN
729
50
80
80
TYP
MAX
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MAX1167/MAX1168
_______________________________________________________________________________________
5
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