NCX8193
Audio jack detection and configuration with false detection
prevention
Rev. 2 — 21 November 2014
Product data sheet
1. General description
The NCX8193 is an advanced audio jack accessory detector and controller.
It supports 3-pole and 4-pole connectors and detects the insertion of plugs into jacks
using a fault detection technique. An internal microphone bias line switch allows a codec
or application processor to control the audio jack configuration. The device supports a
broad variety of after-market headphones.
2. Features and benefits
Fail-safe headset and headphone detection
Low-power standby mode
Click free switching
Low THD and noise microphone pass through channel
Send/End button detection
Low ON resistance: 0.9
(typical) at a supply voltage of 2.8 V
ESD protection:
HBM JEDEC JDS-001 Class 3B exceeds 8 kV
Operating ambient temperature
40C
to +85C
3. Applications
Headphones with integrated microphone and remote control buttons
4. Ordering information
Table 1.
Ordering information
Package
Temperature range
NCX8193GU
40 C
to +85
C
Name
XQFN10
Description
plastic, extremely thin quad flat package; no leads;
10 terminals; body 1.8
1.4
0.5 mm
Version
SOT1160-2
Type number
5. Marking
Table 2.
Marking codes
Marking code
q8
Type number
NCX8193GU
NXP Semiconductors
NCX8193
Audio jack detection and configuration with false detection prevention
6. Functional diagram
J_DET is pulled up to V
CC
in Sleep mode; J_DET is connected to I
1
in Active mode.
Fig 1.
Simplified schematic
NCX8193
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 2 — 21 November 2014
2 of 21
NXP Semiconductors
NCX8193
Audio jack detection and configuration with false detection prevention
7. Pinning information
7.1 Pinning
Fig 2.
Pin configuration
7.2 Pin description
Table 3.
Symbol
V
CC(IO)
DET
EN
n.c.
V
CC
S/E
MIC
J_MIC
GND
J_DET
Pin description
Pin
1
2
3
4
5
6
7
8
9
10
Type
Power
O
I
n.c.
Power
O
I/O
I/O
ground
I/O
Description
digital interface input/output supply voltage; headphone mode bias supply
plug detect; Plug inserted: DET = LOW; unplugged: DET = HIGH
microphone bias path switch SWM control. closed: EN = HIGH; open: EN = LOW
not connected (preferably connected GND)
core supply (e.g. battery)
keypress-detect; key press: S/E = HIGH; NO key press: S/E = LOW
microphone bias connection audio codec side
microphone bias connection audio headset side
ground
plug detection bias and logic level input
NCX8193
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 2 — 21 November 2014
3 of 21
NXP Semiconductors
NCX8193
Audio jack detection and configuration with false detection prevention
8. Functional description
The simplified schematic of the NCX8193 is shown in
Figure 1.
If no plug is inserted, J_DET is pulled-up to V
CC
via a 1.2 M resistor. Once J_DET is
pulled below 400 mV, the pull-up resistor is switched out and J_DET is connected to a
variable current source. The current source slowly increases its output current. If J_DET
remains lower than 300 mV, DET is set LOW to indicate that a plug has been inserted.
In case DET is set LOW, when EN is HIGH, J_DET is connected to the current source and
the integrated button press detection circuit on J_MIC is active. The button press
detection uses a trigger level of 780 mV. It enables a 1.8 V bias voltage in combination
with an R
bias
, matching the series resistance of the microphone, to detect button presses.
Not only call-end button press but also forward and reverse button press event levels can
be passed from J_MIC to MIC. The codec or processor decodes according to the
individual button pressed. Refer to
Figure 3
and
Figure 4
for details.
Fig 3.
Simplified status diagram of NCX8193
NCX8193
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 2 — 21 November 2014
4 of 21
NXP Semiconductors
NCX8193
Audio jack detection and configuration with false detection prevention
(1) J_DET = V
CC
; microphone path is open.
(2) J_DET = I
1
; microphone path is open.
(3) J_DET = I
1
; microphone path is closed.
Fig 4.
Table 4.
Basic headset plug-in detection
Simplified status diagram signal and functional conditions
[1]
States
Sleep
Detect
L
X
L
Z
H
L
Moisture
0.3 V
X
L
Z
H
L
Plug-in
audio signal
L
L
Z
L
L
Active
audio signal
H
> 780 mV
J_MIC
L
L
J_MIC pressed
audio signal
H
< 780 mV
J_MIC
L
H
I/O
Input
I/O
I/O
Output
Output
[1]
[2]
J_DET
EN
J_MIC
MIC
DET
S/E
H
X
L
Z
H
[2]
L
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
In case an unplug event is detected, DET remains LOW for 40 ms before returning to HIGH.‘
NCX8193
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 2 — 21 November 2014
5 of 21
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