电子工程世界电子工程世界电子工程世界

关键词

搜索

型号

搜索

5962-8853801PA

产品描述Operational Amplifiers - Op Amps DUAL PREC JFET-INPUT IC
产品类别模拟混合信号IC    放大器电路   
文件大小189KB,共9页
制造商ADI(亚德诺半导体)
官网地址https://www.analog.com
下载文档 详细参数 全文预览

5962-8853801PA在线购买

供应商 器件名称 价格 最低购买 库存  
5962-8853801PA - - 点击查看 点击购买

5962-8853801PA概述

Operational Amplifiers - Op Amps DUAL PREC JFET-INPUT IC

5962-8853801PA规格参数

参数名称属性值
Product AttributeAttribute Value
制造商
Manufacturer
ADI(亚德诺半导体)
产品种类
Product Category
Operational Amplifiers - Op Amps
RoHSN
安装风格
Mounting Style
Through Hole
封装 / 箱体
Package / Case
CDIP-8
Number of Channels2 Channel
GBP - Gain Bandwidth Product3.5 MHz
SR - Slew Rate10 V/us
Ib - Input Bias Current0.0001 uA
Vos - Input Offset Voltage1 mV
工作电源电流
Operating Supply Current
8.5 mA
最小工作温度
Minimum Operating Temperature
- 55 C
最大工作温度
Maximum Operating Temperature
+ 125 C
ShutdownNo Shutdown
系列
Packaging
Tube
Amplifier TypeGeneral Purpose Amplifier
高度
Height
3.56 mm (Max)
长度
Length
10.29 mm (Max)
产品
Product
Operational Amplifiers
Supply TypeDual
类型
Type
General Purpose Amplifier
宽度
Width
7.87 mm (Max)
Dual Supply Voltage+/- 15 V
Maximum Dual Supply Voltage+/- 22 V
Pd-功率耗散
Pd - Power Dissipation
500 mW (1/2 W)
PSRR - Power Supply Rejection Ratio85.85 dB (Max)
工厂包装数量
Factory Pack Quantity
48
Voltage Gain dB103.52 dB

文档预览

下载PDF文档
a
FEATURES
High Slew Rate: 10 V/ s Min
Fast Settling Time: 0.9 s to 0.1% Type
Low Input Offset Voltage Drift: 10 V/ C Max
Wide Bandwidth: 3.5 MHz Min
Temperature-Compensated Input Bias Currents
Guaranteed Input Bias Current: 18 nA Max (125 C)
Bias Current Specified Warmed Up over Temperature
Low Input Noise Current: 0.01 pA/
÷
Hz
Type
High Common-Mode Rejection Ratio 86 dB Min
Pin Compatible with Standard Dual Pinouts
Models with MIL-STD-883 Class B Processing Available
Dual Precision JFET-Input
Operational Amplifier
OP215
GENERAL DESCRIPTION
The OP215 offers the proven JFET-input performance advantages
of high speed and low input bias current with the tracking and
convenience advantages of a dual op amp configuration.
Low input offset voltages, low input currents, and low drift are
featured in these high-speed amplifiers.
On-chip zener-zap trimming is used to achieve low V
OS,
while a
bias-current compensation scheme gives a low input bias current
at elevated temperature. Thus, the OP215 features an input bias
current of 1.4 nA at 70∞C ambient (not junction) temperature
which greatly extends the application usefulness of this device.
Applications include high-speed amplifiers for current output
DACs, active filters, sample-and-hold buffers, and photocell
amplifiers. For additional precision JFET op amps, see the
OP249 and AD712 data sheets.
V+
Q5
J5
Q6
R3
NULL
Q7
R8
J8 J7
R7
Q10
NULL
Q9
J6
Q19
NOTE
R7, R8 ARE ELECTRONICALLY ADJUSTED
ON-CHIP FOR MINIMUM OFFSET VOLTAGE
R1
Q8
NOMINV
INPUT+
J1
J2
–INV J11
INPUT
Q1
Q12
Q11
J4
7.4
pF
V–
R9
R4
R5
3.6
k
Q16
Q3
Q4
Q24
C2
Q17
7.4pF
Q2
OUTPUT
Q18
R6
3.6k
J10
Q14
J9
Q15
Q21
Q20
R11
Q23
Q25
R10
R13
Q22
R2
J3
C1
Q13
R12
Figure 1. Simplified Schematic (1/2 OP215)
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2002

 
EEWorld订阅号

 
EEWorld服务号

 
汽车开发圈

 
机器人开发圈

About Us 关于我们 客户服务 联系方式 器件索引 网站地图 最新更新 手机版

站点相关: 大学堂 TI培训 Datasheet 电子工程 索引文件: 1622  637  2681  1515  2533  33  13  54  31  51 

器件索引   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

北京市海淀区中关村大街18号B座15层1530室 电话:(010)82350740 邮编:100190

电子工程世界版权所有 京B2-20211791 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号 Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved