NCP1032
Low Power PWM Controller
with On-Chip Power Switch
and Startup Circuits for
Telecom Systems
The NCP1032 is a miniature high−voltage monolithic switching
converter with on−chip power switch and startup circuits. It
incorporates in a single IC all the active power control logic and
protection circuitry required to implement, with minimal external
components several switching regulator applications, such as a
secondary side bias supply or a low power DC−DC converter. This
converter is ideally suited for 24 V and 48 V telecom and medical
isolated power supply applications. The NCP1032 can be configured
in any single−ended topology such as forward or flyback converter.
The NCP1032 is targeted for applications requiring up to 3 W.
The internal error amplifier allows the NCP1032 to be easily
configured for secondary or primary side regulation operation in
isolated and non−isolated configurations. The fixed frequency
oscillator is optimized for operation up to 1 MHz and is capable of
external frequency synchronization, providing additional design
flexibility. In addition, the NCP1032 incorporates undervoltage and
overvoltage line detectors, programmable cycle−by−cycle current
limit, internal soft−start, and thermal shutdown to protect the
controller under fault conditions.
Features
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MARKING
DIAGRAMS
WDFN8
MN SUFFIX
CASE 511BH
1032 = Specific Device Marking
x = A or B
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
1032x
ALYW
G
G
1
PIN CONNECTIONS
GND
C
T
V
FB
COMP
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
On Chip High 200 V Power Switch Circuit and Startup Circuit
Internal Startup Regulator with Auxiliary Winding Override
Programmable Oscillator Frequency Operation up to 1 MHz
External Frequency Synchronization Capability
Frequency Fold−down Under Fault Conditions
Trimmed
±
2% Internal Reference
Programmable Cycle−by−Cycle Current Limit
Internal Soft−Start
Active Leading Edge Blanking Circuit
Line Under and Over Voltage Protection
Over Temperature Protection
These are Pb−Free Devices
GND
WDFN8 (Top View)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 20 of this data sheet.
Typical Applications
POE (Power Over Ethernet)/PD. Refer to Application Note AND8247
Secondary Side Bias Supply for Isolated DC−DC Converters
Stand Alone Low Power DC−DC Converter
Low Power Bias Supply
Low Power Boost Converter
Medical Isolated Power Supplies
Bias Supply for Telecom Systems. Refer to App Note AND8119/D
©
Semiconductor Components Industries, LLC, 2014
1
October, 2016 − Rev. 3
Publication Order Number:
NCP1032/D
ÇÇ
ÇÇ
ÇÇ
ÇÇ
Ç
Ç
Ç
Ç
V
DRAIN
V
CC
UV/OV
CL
NCP1032
VIN
D1
Cin
2.2
mF
VOUT
COUT
22
mF
D2
CVCC
2.2
mF
R3
VDRAIN
VCC
CL
RCL
CC
NCP 1032
COMP
GND
CT
VFB
R2
RC
CP
R1
UV/OV
R4
CCT
Figure 1. Typical Application – Dual Output Auxiliary Regulated Isolated Flyback
PGND
Internal Bias
I1
LEB
2 kW
RT
2 kW
Duty
Cycle
= 75%
I2
3.0 V/
3.5 V
Delay
Q
CLR
S
30 ns
One Shot
PWM
COMP
−
+
3.5 V
NUVLO
UVBAR
NLOWVCC
NUV
HIVCC
NOV
Thermal Trip
LEBOUT
VDRAIN
UVBAR
150 kW
Driver
NUVLO
+
−
5.7 V
12.5 mA
nstart
6.6 V
VCC
UVBAR
Fault
NLOWVCC
7.6 V
HIVCC
10.2 V
Internal Bias
2 kW
NSS
LEBOUT
NCL
Q
SET
R
FB
COMP
2 kW
Error
Amplifier
−
+
2.5 V
ISET
2 kW
OV
Comp
−
2.24 V +
+
−
UV
Comp
OV/UV
2 kW
NOV
NUV
Fault
IN1 Logic
IN2
IN3
IN4 OUT2
IN5 OUT3
IN6
IN7
Internal Bias
Fault
nstart
Current
Limit
SS
Fault
1.0 V
(all pins except VDRAIN pin are protected by 10 V ESD diodes)
Figure 2. NCP1032 Simplified Block Diagram
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2
NCP1032
Table 1. FUNCTIONAL PIN DESCRIPTION
Pin
1
2
Name
GND
C
T
Function
IC Ground
Oscillator Frequency
Selection
Ground reference pin for the circuit.
An external capacitor connected to this pin sets the oscillator frequency up to 1 MHz. The
oscillator can be synchronized to a higher frequency by charging or discharging CT to trip the
internal 3.0 V/3.5 V comparators. If a fault condition exists, the power switch is disabled and
the frequency is reduced.
The regulated voltage is scaled down to 2.5 V by means of a resistor divider. Regulation is
achieved by comparing the scaled voltage to an internal 2.5 V reference.
The output of the internal error amplifier. External compensation network between COMP
and VFB pin is required for stable operation.
A resistor R
CL
connected between this pin and ground sets the peak current value of the
current limit. If the CL pin is left open, the current limit value is set to its initial maximum value
of approximately 12 mA (C
LIM_MAX
). Programmable current limit threshold, together with
internal soft−start feature effectively limits the primary transformer high current peaks during
startup phase.
Input line voltage is scaled down using an external resistor divider. The minimum operating
Vin voltage is achieved when the voltage on UV/OV pin reaches UV threshold 1.0 V. The
maximum operating voltage is then limited by 2.4 V on UV/OV pin. A device version without
OV protection feature is available, see ordering information section.
Supplies power to the internal control circuitry. Connect an external capacitor for energy
storage during startup. The Vcc voltage should not exceed 16 V during operation.
Connects the power switch and startup circuit to the primary transformer windings.
This is the thermal flag for the IC and should be soldered to the ground plane.
Description
3
4
5
V
FB
COMP
CL
Feedback Signal Input
Error Amplifier
Compensation
Current Limit Threshold
Selection
6
UV/OV
Input Line Undervoltage
and Overvoltage
Shutdown
Powers the Internal
Circuitry
Drain Connection
Thermal Flag
7
8
EP
V
CC
V
DRAIN
EP
Table 2. MAXIMUM RATINGS
Rating
Power Switch and Startup Circuits Voltage
VCC Power Supply Voltage
Power Supply Voltage on all Pins, except VDRAIN and VCC
Drain Current Peak During Transformer Saturation
Thermal Resistance Junction−to−Air –W DFN8 3x3, case 511BH
(100 sq mm, 2oz) (Note 4)
(500 sq mm, 2oz) (Note 4)
(100 sq mm,2oz,) (Note 5)
Maximum Junction Temperature
Storage Temperature Range
ESD Capability, Human Body Model Pins 1−7 (Note 1)
ESD Capability, Machine Model Pins 1−7 (Note 1)
Pin 8 is connected to the high voltage startup and power switch which is protected to
the maximum drain voltage
Symbol
BVdss
V
CC
V
IO
I
DS(pk)
R
qJA
Value
−0.3 to +200
−0.3 to +16
−0.3 to +10
1.0
109
64
44
150
−60 to +150
4.0
400
200
°C
°C
kV
V
V
Unit
V
V
V
A
°C/W
T
JMAX
T
STG
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. This device series contains ESD protection and passes the following tests:
Human Body Model (HBM)
±
2.0 kV per JEDEC standard: JESD22−A114.
Machine Model (MM)
±
200 V per JEDEC standard: JESD22−A115.
2. This device contains latch−up protection and it exceeds
±
100 mA per JEDEC standard: JESD78 class II
3. Moisture Sensitivity Level (MSL): 1 per IPC/JEDEC standard: J−STD−020A
4. EIA JEDEC 51.3, single layer PCB with added heat spreader
5. EIA JEDEC 51.7, four layer PCB with added heat spreader
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NCP1032
Table 3. ELECTRICAL CHARACTERISTICS
(For typical values Tj = 25°C, for min/max values Tj = −40°C to +125°C, V
DRAIN
= 48 V, V
CC
= 12 V, unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
SUPPLY SECTION AND VCC MANAGEMENT
V
CC_ON
V
CC_MIN
V
CC_RST
I
CC1
I
CC2
I
CC3
Vcc Voltage at Which the Switcher
Starts Operation
Minimum Operating VCC After Turn on
at Which HV Current Source Restarts
Vcc Undervoltage Lockout Voltage
Internal IC Consumption
Power Switch Enabled
Internal IC Consumption
Power Switch Disabled
Internal IC Consumption
Power Switch Disabled
V
CC
Increasing
V
CC
Decreasing
V
CC
Decreasing, V
FB
= V
COMP
MOSFET is switching at 300 kHz
No Fault condition, V
FB
= 2.7 V
Fault condition,
V
FB
= 2.7 V, V
UV/OV
< 1.0 V
9.9
7.40
6.75
2.0
−
−
10.2
7.55
6.95
2.9
2.0
0.75
10.5
7.7
7.15
4.0
2.5
1.5
V
V
V
mA
mA
mA
POWER SWITCH CIRCUIT
R
DSON
Power Switch Circuit On−State
Resistance
Power Switch Circuit and Startup
Breakdown Voltage
Power Switch Circuit and Startup
Circuit Off−State Leakage Current
Switching Characteristics − Rise Time
Switching Characteristics − Fall Time
I
D
= 100 mA
T
J
= 25°C
T
J
= 125°C
I
DS_OFF
= 100
mA,
V
UV_OV
< 1.0 V
Tj = 25°C
V
DRAIN
= 200 V, V
UV_OV
< 1.0 V
T
J
= 25°C
T
J
= −40°C to 125°C
V
DS
= 48 V, R
L
= 480
W,
Time
(10%−90%)
V
DS
= 48 V, R
L
= 480
W,
Time
(90%−10%)
W
−
−
200
4.2
4.9
−
5.1
8.0
−
V
mA
−
−
−
−
20
20
7
10
25
30
−
−
ns
ns
BVdss
I
DS_OFF
t
R
t
f
INTERNAL STARTUP CURRENT SOURCE
I
START1
HV Current Source
Vcc = 0 V,
Tj = 25°C
Tj = −40°C to 125°C
Vcc = V
CC_ON −
0.2 V
Tj = 25°C
Tj = −40°C to 125°C
I
START2
= 0.5 mA,
Vcc = V
CC_ON
− 0.2 V, Tj = 25°C
mA
10.0
9.0
9.0
8.0
−
12.0
−
11.0
−
16.3
14.0
15.0
mA
13.0
16.0
V
−
I
START2
HV Current Source
V
start_min
Minimum Startup Voltage
ERROR AMPLIFIER
V
REF
Reference Voltage
V
COMP
= V
FB
, Follower Mode
T
J
= 25°C
T
J
= −40°C to 125°C
V
CC
= 8 V to 16 V, T
J
= 25°C
V
FB
= 2.3 V
V
FB
= 2.3 V
V
FB
= 2.7 V
I
SRC
= 0
mA,
V
FB
= 2.3 V
I
SNK
= 0
mA,
V
FB
= 2.7 V
(Note 6)
(Note 6)
V
2.45
2.40
−
−
80
500
3.95
−
−
−
2.5
2.5
1.0
70
95
700
4.17
91
80
1.0
2.55
2.60
3.0
150
125
900
4.5
200
−
−
mV
nA
mA
mA
V
mV
dB
MHz
REG
LINE
I
VFB
I
SRC
I
SNK
V
C_MAX
V
C_MIN
A
VOL
GBW
Line Regulation
Input Bias Current
COMP Source Current
COMP Sink Current
COMP Maximum Voltage
COMP Minimum Voltage
Open Loop Voltage Gain
Gain Bandwidth Product
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NCP1032
Table 3. ELECTRICAL CHARACTERISTICS
(For typical values Tj = 25°C, for min/max values Tj = −40°C to +125°C, V
DRAIN
= 48 V, V
CC
= 12 V, unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
CURRENT LIMIT AND PWM COMPARATOR
C
LIM_MAX
C
LIM_MIN
T
PLH
T
ON_MIN
T
ss
Max Current Limit Threshold
Min Current Limit Threshold
Propagation Delay
Min On Time Pulse Width
Soft−Start Duration
CL pin Floating, T
J
= 25°C,
(di/dt = 0.5 A/ms)
R
CL
= 20 kW, T
J
= 25°C,
(di/dt = 0.1 A/ms)
from Current Limit Detection to the
Drain OFF State (Note 6)
FSW = 300 kHz (Note 6)
(Note 6)
mA
420
−
−
−
−
512
57
100
240
2.0
600
mA
−
−
−
−
ns
ns
ms
LINE UNDER/OVERVOLTAGE PROTECTIONS
V
uv
V
UV_hys
Iuv
V
OV
V
ov_hys
Undervoltage Lockout Threshold
Undervoltage Lockout Hysteresis
Input Bias Current
Overvoltage Lockout Threshold
Overvoltage Lockout Hysteresis
V
FB
= 2.3 V
V
FB
= V
COMP,
Vin increasing (Note 7)
V
FB
= V
COMP,
Vin decreasing
0.95
−
−
2.3
−
1.067
70
0
2.41
158
1.18
−
1
2.5
−
V
mV
mA
V
mV
TEMPERATURE MANAGEMENT
TSD
Thermal Shutdown
Hysteresis in Shutdown
INTERNAL OSCILLATOR
f
OSC1
Oscillation Frequency, 300 kHz
C
T
= 560 pF (Note 8)
T
J
= 25°C
T
J
= −40°C to 125°C
C
T
= 100 pF, T
J
= 25°C
V
CT
= 3.25 V
V
CT
= 3.25 V
−
−
70
kHz
275
270
−
−
300
−
960
172
517
3.492
2.992
76.5
−
−
80
325
335
−
−
kHz
mA
mA
V
V
%
(Note 6)
(Note 6)
165
20
°C
°C
f
OSC2
I
CT_C
I
CT_D
V
R_pk
V
R_VLY
DC
MAx
Oscillation Frequency, 960 kHz
Timing Charge Current
Timing Discharge Current
Oscillator Ramp Peak Voltage
Oscillator Ramp Valley
Maximum Duty Cycle
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
6. Guaranteed by design and characterized
7. The OV/UV option is disabled on the NCP1032B version
8. Oscillator frequency can be externally synchronized to the maximum frequency of the device
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