19-0377; Rev 1; 12/97
KIT
ATION
EVALU
E
BL
AVAILA
16-Bit, 85ksps ADC with 10µA Shutdown
_______________General Description
The MAX195 is a 16-bit successive-approximation ana-
log-to-digital converter (ADC) that combines high
speed, high accuracy, low power consumption, and a
10µA shutdown mode. Internal calibration circuitry cor-
rects linearity and offset errors to maintain the full rated
performance over the operating temperature range with-
out external adjustments. The capacitive-DAC architec-
ture provides an inherent 85ksps track/hold function.
The MAX195, with an external reference (up to +5V),
offers a unipolar (0V to V
REF
) or bipolar (-V
REF
to V
REF
)
pin-selectable input range. Separate analog and digital
supplies minimize digital-noise coupling.
The chip select (CS) input controls the three-state serial-
data output. The output can be read either during conver-
sion as the bits are determined, or following conversion at
up to 5Mbps using the serial clock (SCLK). The end-of-
conversion (EOC) output can be used to interrupt a
processor, or can be connected directly to the convert
input (CONV) for continuous, full-speed conversions.
The MAX195 is available in 16-pin DIP, wide SO, and
ceramic sidebraze packages.
____________________________Features
o
16 Bits, No Missing Codes
o
90dB SINAD
o
9.4µs Conversion Time
o
10µA (max) Shutdown Mode
o
Built-In Track/Hold
o
AC and DC Specified
o
Unipolar (0V to V
REF
) and Bipolar (-V
REF
to V
REF
)
Input Range
o
Three-State Serial-Data Output
o
Small 16-Pin DIP, SO, and Ceramic SB Packages
MAX195
______________Ordering Information
PART
MAX195BCPE
MAX195BCWE
MAX195ACDE
MAX195BC/D
MAX195BEPE
MAX195BEWE
MAX195AEDE
MAX195AMDE
MAX195BMDE
TEMP. RANGE
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-55°C to +125°C
-55°C to +125°C
PIN-PACKAGE
16 Plastic DIP
16 Wide SO
16 Ceramic SB
Dice*
16 Plastic DIP
16 Wide SO
16 Ceramic SB
16 Ceramic SB**
16 Ceramic SB**
________________________Applications
Portable Instruments
Audio
Industrial Controls
Robotics
Multiple Transducer Measurements
Medical Signal Acquisition
Vibrations Analysis
Digital Signal Processing
*
Dice are specified at T
A
= +25°C, DC parameters only.
**
Contact factory for availability and processing to MIL-STD-883.
________________Functional Diagram
13
12
MAIN DAC
__________________Pin Configuration
TOP VIEW
BP/UP/SHDN 1
CLK 2
SCLK 3
VDDD 4
DOUT 5
DGND 6
EOC 7
CS 8
16 VDDA
15 VSSA
14 AGND
AIN
REF
Σ
CALIBRATION
DACs
SAR
2
CLK
SCLK
CONV
BP/UP/SHDN
CS
RESET
3
9
1
8
10
CONTROL LOGIC
COMPARATOR
4
6
11
16
14
15
VDDD
DGND
VSSD
VDDA
AGND
VSSA
MAX195
13 AIN
12 REF
11 VSSD
10 RESET
9
CONV
MAX195
5
THREE-STATE BUFFER
7
EOC
DOUT
DIP/Wide SO/Ceramic SB
________________________________________________________________
Maxim Integrated Products
1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800.
For small orders, phone 408-737-7600 ext. 3468.
16-Bit, 85ksps ADC with 10µA Shutdown
MAX195
ABSOLUTE MAXIMUM RATINGS
VDDD to DGND .....................................................................+7V
VDDA to AGND......................................................................+7V
VSSD to DGND.........................................................+0.3V to -6V
VSSA to AGND .........................................................+0.3V to -6V
VDDD to VDDA, VSSD to VSSA ..........................................±0.3V
AIN, REF ....................................(VSSA - 0.3V) to (VDDA + 0.3V)
AGND to DGND ..................................................................±0.3V
Digital Inputs to DGND...............................-0.3V, (VDDA + 0.3V)
Digital Outputs to DGND............................-0.3V, (VDDA + 0.3V)
Continuous Power Dissipation (T
A
= +70°C)
Plastic DIP (derate 10.53mW/°C above +70°C) ............842mW
Wide SO (derate 9.52mW/°C above +70°C)..................762mW
Ceramic SB (derate 10.53mW/°C above +70°C)...........842mW
Operating Temperature Ranges
MAX195_C_E ........................................................0°C to +70°C
MAX195_E_E .....................................................-40°C to +85°C
MAX195_MDE..................................................-55°C to +125°C
Storage Temperature Range .............................-65°C to +160°C
Lead Temperature (soldering, 10sec) .............................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDDD = VDDA = +5V, VSSD = VSSA = -5V, f
CLK
= 1.7MHz, V
REF
= +5V, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical
values are at T
A
= +25°C.)
PARAMETER
ACCURACY
(Note 1)
Resolution
Differential Nonlinearity
Integral Nonlinearity
Unipolar/Bipolar Offset Error
Unipolar/Bipolar Offset Tempco
Unipolar Full-Scale Error
Bipolar Full-Scale Error
Full-Scale Tempco
Power-Supply Rejection
Ratio (VDDA and VSSA only)
ANALOG INPUT
Input Range
Input Capacitance
Unipolar
Bipolar
Unipolar
Bipolar
0
-V
REF
250
125
V
REF
V
REF
V
pF
VDDA = 4.75V to 5.25V, V
REF
= 4.75V
VSSA = -5.25V to -4.75V, V
REF
= 4.75V
65
65
V
REF
= 4.75V
V
REF
= 4.75V
0.1
RES
DNL
INL
MAX195A
MAX195B
MAX195A
MAX195B
MAX195A, V
REF
= 4.75V
MAX195B, V
REF
= 4.75V
0.4
±0.0075
±0.018
16
±1
±2
±0.003
±0.004
±3
±4
Bits
LSB
%FSR
LSB
ppm/°C
%FSR
%FSR
ppm/°C
dB
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DYNAMIC PERFORMANCE
(f
s
= 85kHz, bipolar range AIN = -5V to +5V, 1kHz) (Note 1)
Signal-to-Noise plus Distortion
Ratio (Note 2)
Total Harmonic Distortion (up to
the 5th harmonic) (Note 2)
Peak Spurious Noise (Note 2)
Conversion Time
Clock Frequency
(Notes 3, 4)
Serial Clock Frequency
t
CONV
f
CLK
f
SCLK
SINAD
THD
T
A
= +25°C
T
A
= +25°C
T
A
= +25°C
16 (t
CLK
)
9.4
1.7
5
87
90
-97
-90
-90
dB
dB
dB
µs
MHz
MHz
2
_______________________________________________________________________________________
16-Bit, 85ksps ADC with 10µA Shutdown
ELECTRICAL CHARACTERISTICS (continued)
(VDDD = VDDA = +5V, VSSD = VSSA = -5V, f
CLK
= 1.7MHz, V
REF
= +5V, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical
values are at T
A
= +25°C.)
PARAMETER
CLK,
CS, CONV, RESET,
SCLK
Input High Voltage
CLK,
CS, CONV, RESET,
SCLK
Input Low Voltage
CLK,
CS, CONV, RESET,
SCLK
Input Capacitance (Note 3)
CLK,
CS, CONV, RESET,
SCLK
Input Current
BP/UP/SHDN
Input High Voltage
BP/UP/SHDN
Input Low Voltage
BP/UP/SHDN
Input Current, High
BP/UP/SHDN
Input Current, Low
BP/UP/SHDN
Mid Input Voltage
BP/UP/SHDN Voltage,
Floating
BP/UP/SHDN Max Allowed
Leakage, Mid Input
DIGITAL OUTPUTS
(DOUT,
EOC)
Output Low Voltage
Output High Voltage
DOUT Leakage Current
Output Capacitance (Note 2)
POWER REQUIREMENTS
VDDD
VSSD
VDDA
VSSA
VDDD Supply Current
VSSD Supply Current
VDDA Supply Current
VSSA Supply Current
I
DDD
I
SSD
I
DDA
I
SSA
By supply-rejection test
By supply-rejection test
VDDD = VDDA = 5.25V, VSSD = VSSA = -5.25V
VDDD = VDDA = 5.25V, VSSD = VSSA = -5.25V
VDDD = VDDA = 5.25V, VSSD = VSSA = -5.25V
VDDD = VDDA = 5.25V, VSSD = VSSA = -5.25V
4.75
-5.25
4.75
-5.25
2.5
0.9
3.8
3.8
5.25
-4.75
5.25
-4.75
4
2
5
5
V
V
V
V
mA
mA
mA
mA
V
OL
V
OH
I
LKG
VDDD = 4.75V, I
SINK
= 1.6mA
VDDD = 4.75V, I
SOURCE
= 1mA
DOUT = 0 or 5V
VDDD - 0.5
±10
10
0.4
V
V
µA
pF
V
IH
V
IL
I
IH
I
IL
V
IM
V
FLT
BP/UP/SHDN = open
BP/UP/SHDN = open
-100
BP/UP/SHDN = VDDD
BP/UP/SHDN = 0V
-4.0
1.5
VDDD - 1.5
2.75
+100
Digital inputs = 0 or 5V
VDDD - 0.5
0.5
4.0
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DIGITAL INPUTS
(CLK,
CS, CONV, RESET,
SCLK, BP/UP/SHDN)
V
IH
V
IL
VDDD = 5.25V
VDDD = 4.75V
2.4
0.8
10
±10
V
V
pF
µA
V
V
µA
µA
V
V
nA
MAX195
3
_______________________________________________________________________________________
16-Bit, 85ksps ADC with 10µA Shutdown
MAX195
ELECTRICAL CHARACTERISTICS (continued)
(VDDD = VDDA = +5V, VSSD = VSSA = -5V, f
CLK
= 1.7MHz, V
REF
= +5V, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical
values are at T
A
= +25°C.)
PARAMETER
Power Dissipation
VDDD Shutdown Supply Current
(Note 5)
VSSD Shutdown Supply Current
VDDA Shutdown Supply Current
VSSA Shutdown Supply Current
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
I
DDD
I
SSD
I
DDA
I
SSA
SYMBOL
CONDITIONS
VDDD = VDDA = 5.25V, VSSD = VSSA = -5.25V
VDDD = VDDA = 5.25V, VSSD = VSSA = -5.25V,
BP/UP/SHDN = 0V
VDDD = VDDA = 5.25V, VSSD = VSSA = -5.25V,
BP/UP/SHDN = 0V
VDDD = VDDA = 5.25V, VSSD = VSSA = -5.25V,
BP/UP/SHDN = 0V
VDDD = VDDA = 5.25V, VSSD = VSSA = -5.25V,
BP/UP/SHDN = 0V
1.6
0.1
0.1
0.1
MIN
TYP
MAX
80
5
5
5
5
UNITS
mW
µA
µA
µA
µA
POWER REQUIREMENTS (cont.)
Accuracy and dynamic performance tests performed after calibration.
Guaranteed by design, not tested.
Tested with 50% duty cycle. Duty cycles from 25% to 75% at 1.7MHz are acceptable.
See
External Clock
section.
Measured in shutdown mode with CLK and SCLK low.
TIMING CHARACTERISTICS
(VDDD = VDDA = +5V, VSSD = VSSA = -5V, unless otherwise noted.)
PARAMETER
CONV
Pulse Width
CONV
to CLK Falling
Synchronization (Note 2)
CONV
to CLK Rising
Synchronization (Note 2)
Data Access Time
Bus Relinquish Time
CLK to
EOC
High
CLK to
EOC
Low
CLK to DOUT Valid
SCLK to DOUT Valid
CS
to SCLK Setup Time
CS
to SCLK Hold Time
Acquisition Time
Calibration Time
RESET
to CLK Setup Time
RESET
to CLK Hold Time
Start-Up Time (Note 6)
T = +25°C
SYMBOL CONDITIONS
A
TYP
t
CW
t
CC1
t
CC2
t
DV
t
DH
t
CEH
t
CEL
t
CD
t
SD
t
CSS
t
CSH
t
AQ
t
CAL
t
RCS
t
RCH
t
SU
Exiting
shutdown
50
14,000 x t
CLK
C
L
= 50pF
C
L
= 10pF
C
L
= 50pF
C
L
= 50pF
C
L
= 50pF
C
L
= 50pF
100
20
75
-10
2.4
8.2
-40
120
T
A
= 0°C to
+70°C
MIN
MAX
20
10
40
80
40
300
300
350
140
100
20
75
-10
2.4
8.2
-40
120
T
A
= -40°C to
+85°C
MIN
MAX
30
10
40
80
40
300
300
375
160
100
20
75
-10
2.4
8.2
-40
120
T
A
= -55°C to
+125°C
MIN
MAX
35
10
40
90
40
350
350
400
160
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ms
ns
ns
µs
Note 6:
Settling time required after deasserting shutdown to achieve less than 0.1LSB additional error.
4
_______________________________________________________________________________________
16-Bit, 85ksps ADC with 10µA Shutdown
______________________________________________________________Pin Description
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
NAME
BP/UP/SHDN
CLK
SCLK
VDDD
DOUT
DGND
EOC
CS
CONV
RESET
VSSD
REF
AIN
AGND
VSSA
VDDA
FUNCTION
Bipolar/Unipolar/Shutdown Input. Three-state input selects bipolar or unipolar input range, or shutdown.
0V = shutdown, +5V = unipolar, floating = bipolar.
Conversion Clock Input
Serial Clock Input is used to shift data out between conversions. May be asynchronous to CLK.
+5V Digital Power Supply
Serial Data Output, MSB first
Digital Ground
End-of-Conversion/Calibration Output—normally low. Rises one clock cycle after the beginning of conversion
or calibration and falls one clock cycle after the end of either. May be used as an output framing signal.
Chip-Select Input—active low. Enables the serial interface and the three-state data output (DOUT).
Convert-Start Input—active low. Conversion begins on the falling edge after
CONV
goes low if the input
signal has been acquired; otherwise, on the falling clock edge after acquisition.
Reset Input. Pulling
RESET
low places the ADC in an inactive state. Rising edge resets control logic and
begins calibration.
-5V Digital Power Supply
Reference Input, 0 to 5V
Analog Input, 0 to V
REF
unipolar or ±V
REF
bipolar range
Analog Ground
-5V Analog Power Supply
+5V Analog Power Supply
MAX195
_______________Detailed Description
The MAX195 uses a successive-approximation register
(SAR) to convert an analog input to a 16-bit digital
code, which outputs as a serial data stream. The data
bits can be read either during the conversion, at the
CLK clock rate, or between conversions asynchronous
with CLK at the SCLK rate (up to 5Mbps).
The MAX195 includes a capacitive digital-to-analog
converter (DAC) that provides an inherent track/hold
input. The interface and control logic are designed for
easy connection to most microprocessors (µPs), limiting
the need for external components. In addition to the
SAR and DAC, the MAX195 includes a serial interface, a
sampling comparator used by the SAR, ten calibration
DACs, and control logic for calibration and conversion.
The DAC consists of an array of 16 capacitors with
binary weighted values plus one “dummy LSB” capaci-
tor (Figure 1). During input acquisition in unipolar
mode, the array’s common terminal is connected to
AGND and all free terminals are connected to the input
signal (AIN). After acquisition, the common terminal is
disconnected from AGND and the free terminals are
disconnected from AIN, trapping a charge proportional
to the input voltage on the capacitor array.
The free terminal of the MSB (largest) capacitor is con-
nected to the reference (REF), which pulls the common
terminal (connected to the comparator) positive.
Simultaneously, the free terminals of all other capaci-
tors in the array are connected to AGND, which drives
the comparator input negative. If the analog input is
near V
REF
, connecting the MSB’s free terminal to REF
only pulls the comparator input slightly positive.
However, connecting the remaining capacitor’s free ter-
minals to ground drives the comparator input well
below ground, so the comparator input is negative, the
comparator output is low, and the MSB is set high. If
the analog input is near ground, the comparator output
is high and the MSB is low.
Following this, the next largest capacitor is disconnect-
ed from AGND and connected to REF, and the com-
parator determines the next bit. This continues until all
bits have been determined. For a bipolar input range,
the MSB capacitor is connected to REF rather than AIN
during input acquisition, which results in an input range
of V
REF
to -V
REF
.
5
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