74AUP2G80
Rev. 9 — 18 August 2017
Low-power dual D-type flip-flop; positive-edge trigger
Product data sheet
1
General description
The 74AUP2G80 provides the dual positive-edge triggered D-type flip-flop. Information
on the data input is transferred to the Q output on the LOW-to-HIGH transition of the
clock pulse. The input pin D must be stable one setup time prior to the LOW-to-HIGH
clock transition for predictable operation.
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall
times across the entire V
CC
range from 0.8 V to 3.6 V.
This device ensures a very low static and dynamic power consumption across the entire
V
CC
range from 0.8 V to 3.6 V.
This device is fully specified for partial power-down applications using I
OFF
. The I
OFF
circuitry disables the output, preventing a damaging backflow current through the device
when it is powered down.
2
Features and benefits
•
Wide supply voltage range from 0.8 V to 3.6 V
•
High noise immunity
•
Complies with JEDEC standards:
–
JESD8-12 (0.8 V to 1.3 V)
–
JESD8-11 (0.9 V to 1.65 V)
–
JESD8-7 (1.2 V to 1.95 V)
–
JESD8-5 (1.8 V to 2.7 V)
–
JESD8-B (2.7 V to 3.6 V)
•
ESD protection:
–
HBM JESD22-A114F Class 3A exceeds 5 000 V
–
MM JESD22-A115-A exceeds 200 V
–
CDM JESD22-C101E exceeds 1 000 V
•
Low static power consumption; I
CC
= 0.9 μA (maximum)
•
Latch-up performance exceeds 100 mA per JESD78 Class II
•
Inputs accept voltages up to 3.6 V
•
Low noise overshoot and undershoot < 10 % of V
CC
•
I
OFF
circuitry provides partial Power-down mode operation
•
Multiple package options
•
Specified from -40 °C to +85 °C and -40 °C to +125 °C
Nexperia
Low-power dual D-type flip-flop; positive-edge trigger
74AUP2G80
3
Ordering information
Package
Temperature
range
Name
VSSOP8
XSON8
XSON8
XSON8
XQFN8
XSON8
XSON8
Table 1. Ordering information
Type number
Description
Version
74AUP2G80DC
74AUP2G80GT
74AUP2G80GF
74AUP2G80GD
74AUP2G80GM
74AUP2G80GN
74AUP2G80GS
-40 °C to +125 °C
-40 °C to +125 °C
-40 °C to +125 °C
-40 °C to +125 °C
-40 °C to +125 °C
-40 °C to +125 °C
-40 °C to +125 °C
plastic very thin shrink small outline package; 8 leads; SOT765-1
body width 2.3 mm
plastic extremely thin small outline package; no leads; SOT833-1
8 terminals; body 1 x 1.95 x 0.5 mm
extremely thin small outline package; no leads;
8 terminals; body 1.35 x 1 x 0.5 mm
SOT1089
plastic extremely thin small outline package; no leads; SOT996-2
8 terminals; body 3 x 2 x 0.5 mm
plastic, extremely thin quad flat package; no leads;
8 terminals; body 1.6 x 1.6 x 0.5 mm
extremely thin small outline package; no leads;
8 terminals; body 1.2 x 1.0 x 0.35 mm
extremely thin small outline package; no leads;
8 terminals; body 1.35 x 1.0 x 0.35 mm
SOT902-2
SOT1116
SOT1203
4
Marking
Marking code
p80
p80
pT
p80
p80
pT
pT
[1]
Table 2. Marking codes
Type number
74AUP2G80DC
74AUP2G80GT
74AUP2G80GF
74AUP2G80GD
74AUP2G80GM
74AUP2G80GN
74AUP2G80GS
[1]
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5
Functional diagram
1D
1CP
2D
2CP
1Q
D
CP
2Q
D
CP
001aah894
001aah893
Figure 1. Logic symbol
74AUP2G80
Figure 2. IEC logic symbol
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 9 — 18 August 2017
2 / 25
Nexperia
Low-power dual D-type flip-flop; positive-edge trigger
74AUP2G80
CP
C
C
C
C
D
TG
C
C
TG
C
C
Q
TG
C
TG
C
mna651
Figure 3. Logic diagram (one flip-flop)
6
Pinning information
6.1 Pinning
74AUP2G80
1CP
1
8
V
CC
1D
2
7
1Q
74AUP2G80
1CP
1D
2Q
GND
1
2
3
4
001aaf308
2Q
3
6
2D
8
7
6
5
V
CC
1Q
2D
2CP
GND
4
5
2CP
001aaf309
Transparent top view
Figure 4. Pin configuration SOT765-1
Figure 5. Pin configuration SOT833-1, SOT1089,
SOT1116 and SOT1203
74AUP2G80
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 9 — 18 August 2017
3 / 25
Nexperia
Low-power dual D-type flip-flop; positive-edge trigger
74AUP2G80
74AUP2G80
terminal 1
index area
V
CC
1
8
74AUP2G80
1CP
1D
2Q
GND
1
2
3
4
8
7
6
5
V
CC
1Q
2D
2CP
1Q
7
1CP
2D
2
6
1D
GND
4
2CP
3
5
2Q
001aai216
001aaf310
Transparent top view
Transparent top view
Figure 6. Pin configuration SOT996-2
Figure 7. Pin configuration SOT902-2
6.2 Pin description
Table 3. Pin description
Symbol
Pin
SOT765-1, SOT833-1, SOT1089,
SOT996-2, SOT1116 and SOT1203
SOT902-2
7, 3
6, 2
4
1, 5
8
Description
1CP, 2CP
1D, 2D
GND
1Q, 2Q
V
CC
1, 5
2, 6
4
7, 3
8
clock input
data input
ground (0 V)
data output
supply voltage
7
Functional description
[1]
Table 4. Function table
Input
nCP
↑
↑
L
[1]
Output
nD
L
H
X
nQ
H
L
q
H = HIGH voltage level;
L = LOW voltage level;
↑ = LOW-to-HIGH CP transition;
X = don’t care;
q = lower case letter indicates the state of referenced input, one setup time prior to the LOW-to-HIGH CP transition.
74AUP2G80
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 9 — 18 August 2017
4 / 25
Nexperia
Low-power dual D-type flip-flop; positive-edge trigger
74AUP2G80
8
Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
I
IK
V
I
I
OK
V
O
I
O
I
CC
I
GND
T
stg
P
tot
[1]
[2]
Parameter
supply voltage
input clamping current
input voltage
output clamping current
output voltage
output current
supply current
ground current
storage temperature
total power dissipation
Conditions
V
I
< 0 V
[1]
Min
-0.5
-50
-0.5
-50
[1]
Max
+4.6
-
+4.6
-
+4.6
±20
+50
-
+150
250
Unit
V
mA
V
mA
V
mA
mA
mA
°C
mW
V
O
< 0 V
Active mode and Power-down mode
V
O
= 0 V to V
CC
-0.5
-
-
-50
-65
T
amb
= -40 °C to +125 °C
[2]
-
The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For VSSOP8 packages: above 110 °C the value of P
tot
derates linearly with 8.0 mW/K.
For XSON8 and XQFN8 packages: above 118 °C the value of P
tot
derates linearly with 7.8 mW/K.
9
Recommended operating conditions
Parameter
supply voltage
input voltage
output voltage
ambient temperature
input transition rise and fall rate
V
CC
= 0.8 V to 3.6 V
Active mode
Power-down mode; V
CC
= 0 V
Table 6. Operating conditions
Symbol
V
CC
V
I
V
O
T
amb
Δt/ΔV
Conditions
Min
0.8
0
0
0
-40
-
Max
3.6
3.6
V
CC
3.6
+125
200
Unit
V
V
V
V
°C
ns/V
74AUP2G80
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 9 — 18 August 2017
5 / 25
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