CY2XF23
High Performance LVDS Oscillator with
Frequency Margining - I
2
C Control
High Performance LVDS Oscillator with Frequency Margining - I
2
C Control
Features
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Functional Description
The CY2XF23 is a high-performance and high-frequency XO. It
uses a Cypress proprietary low-noise PLL to synthesize the
frequency from an integrated crystal. The output frequency can
be changed using the I
2
C bus serial interface, allowing easy
frequency margin testing in applications.
The CY2XF23 is available as a factory-configured device or as
a field-programmable device. Factory configured devices are
configured
for
general
use
(see
“Standard
and
Application-Specific Factory Configurations”
on page 4) or they
can be customer specific.
Low jitter crystal oscillator (XO)
Less than 1 ps typical root mean square (RMS) phase jitter
Low-voltage differential signaling (LVDS) output
Output frequency from 50 MHz to 690 MHz
Frequency margining through I C bus
Factory-configured or field-programmable
Integrated phase-locked loop (PLL)
Pb-free package: 5.0 × 3.2 mm leadless chip carrier (LCC)
Supply voltage: 3.3 V or 2.5 V
Commercial and industrial temperature ranges
2
Logic Block Diagram
4
CRYSTAL
OSCILLATOR
LOW-NOISE
PLL
CLK
OUTPUT
DIVIDER
5
CLK#
1
SDA
2
SCL
I
2
C
INTERFACE
PROGRAMMABLE
CONFIGURATION
Cypress Semiconductor Corporation
Document Number: 001-53145 Rev. *G
•
198 Champion Court
•
San Jose
,
CA 95134-1709
•
408-943-2600
Revised December 20, 2012
CY2XF23
Contents
Pinouts .............................................................................. 3
Pin Definitions .................................................................. 3
Standard and Application-Specific
Factory Configurations .................................................... 4
Functional Description ..................................................... 4
Configuration Software .................................................... 4
Programming Description ............................................... 5
Field-Programmable CY2XF23F ................................. 5
Factory-Configured CY2XF23 ..................................... 5
Programming Variables ................................................... 5
Output Frequencies ..................................................... 5
Industrial versus Commercial Device Performance .... 5
Memory Map ...................................................................... 5
Serial Interface Protocol and Timing ........................... 5
Device Address ........................................................... 6
Data Valid .................................................................... 6
Data Frame ................................................................. 6
Acknowledge Pulse ..................................................... 6
Write Operations ............................................................... 6
Writing Individual Bytes ............................................... 6
Writing Multiple Bytes .................................................. 6
Read Operations ............................................................... 6
Current Address Read ................................................. 6
Random Read ............................................................. 6
Sequential Read .......................................................... 6
Absolute Maximum Conditions ....................................... 8
Operating Conditions ....................................................... 8
DC Electrical Characteristics .......................................... 9
AC Electrical Characteristics ........................................ 10
I2C Bus Timing Specifications
...................................... 10
Switching Waveforms .................................................... 11
Termination Circuits ....................................................... 12
Ordering Information ...................................................... 12
Possible Configurations ............................................. 12
Package Drawings and Dimensions ............................. 13
Acronyms ........................................................................ 14
Document Conventions ................................................. 14
Units of Measure ....................................................... 14
Document History Page ................................................. 15
Sales, Solutions, and Legal Information ...................... 16
Worldwide Sales and Design Support ....................... 16
Products .................................................................... 16
PSoC Solutions ......................................................... 16
Document Number: 001-53145 Rev. *G
Page 2 of 16
CY2XF23
Pinouts
Figure 1. Pin Diagram – 6-pin Ceramic LCC
SDA 1
SCLK 2
V
SS
3
6 V
DD
5 CLK#
4 CLK
Pin Definitions
6-pin Ceramic LCC
Pin
1
2
4, 5
6
3
Name
SDA
SCLK
CLK, CLK#
V
DD
V
SS
I/O Type
I/O
CMOS input
LVDS output
Power
Power
I
2
C serial data
I
2
C serial clock
Differential output clock
Supply voltage: 2.5 V or 3.3 V
Ground
Description
Document Number: 001-53145 Rev. *G
Page 3 of 16
CY2XF23
Standard and Application-Specific Factory Configurations
Part Number
CY2XF23LXC001T
Output Frequency
100.00 MHz (default)
95.00 MHz
103.000007 MHz
104.999993 MHz
Frequency Word
0
1
2
3
RMS Phase Jitter (Random)
Offset Range
637 kHz to 10 MHz
637 kHz to 10 MHz
637 kHz to 10 MHz
637 kHz to 10 MHz
Jitter (Typical)
0.52 ps
–
–
–
Functional Description
The CY2XF23 is a PLL-based high-performance clock
generator. It uses an internal crystal oscillator as a reference,
and outputs one differential LVDS clock. It has an I
2
C bus serial
interface
[1]
, which is used to change the output frequency.
The CY2XF23 comes configured for four different frequencies.
At power-on, the four configurations are transparently loaded
into an internal volatile memory which, in turn, controls the PLL.
The user can switch between the four frequencies through the
I
2
C bus. The user can also configure the CY2XF23 with new
output frequencies by shifting new data into the internal memory.
Frequency margining is a common application for this feature.
One frequency is used for the standard operating mode of the
device, while additional frequencies are available for margin
testing, either during product development or in-system
manufacturing test.
Note that all configuration changes made using I
2
C are
temporary and are lost when power is removed from the device.
At power-on, the device returns to its original state.
The configuration for a particular frequency is stored in a 6-byte
block of memory, known as a word. The CY2XF23 has four such
words, labeled ‘Frequency Word 0’ through ‘Frequency Word 3’.
An additional register byte contains a 2-bit field, which selects
one of the four frequency words. By writing to this select byte,
the user can switch back and forth between the four programmed
frequencies. The select byte can be configured to select any of
the four frequency words at power-on.
When changing the output frequency, the frequency transition is
not guaranteed to be smooth. There can be frequency
excursions beyond the start frequency and the new frequency.
Glitches and runt pulses are possible, and time must be allowed
for the PLL to re-lock.
If more than four frequencies are needed, the I
2
C bus can be
used to change any of the four frequency words. When writing
frequency words through I
2
C, the users should not change the
currently selected word. Instead, write one of the three
unselected words before changing the select byte to select that
new word.
Figure 2
shows how the frequency words are arranged and
selected.
Figure 2. Frequency Words
Register
Address
10h – 15h
16h – 1Bh
1Ch – 21h
22h – 27h
40h
Frequency Word 0
Frequency Word 1
Frequency Word 2
Frequency Word 3
Select Byte
Bits [1:0]
00
01
10
11
Sel
Control
PLL
Configuration Software
Cypress provides
CyClockWizard™
software that enables the
users to create data values for shifting into the frequency words.
This software is required because the algorithm is too
complicated to be described here.
The user specifies the output frequency. The software then
calculates the bit stream for up to four frequency words, as
outlined by the register addresses for each word seen in
Figure 2.
Note
1. The serial interface is I
2
C Bus compliant, with the following exceptions: SDA input leakage current, SDA input capacitance, SDA and SCLK are clamped to V
DD
,
setup time, and output hold time.
Document Number: 001-53145 Rev. *G
Page 4 of 16
CY2XF23
Programming Description
The CY2XF23 is a programmable device. Before being used in
an application, it must be programmed with the output
frequencies and other variables described in
Programming
Variables on page 5.
Two different device types are available,
each with its own programming flow. They are described in the
following sections.
Table 1. Device Programming Variables
Variable
Output frequency 0
Output frequency 1
Output frequency 2
Output frequency 3
Temperature range (commercial or industrial)
Field-Programmable CY2XF23F
Field-programmable devices are shipped unprogrammed and
must be programmed before being installed on a printed circuit
board (PCB). Customers use
CyClockWizard™
software to
specify the device configuration and generate a joint electron
devices
engineering
council
(JEDEC - extension .jed)
programming file. Programming of samples and prototype
quantities is available using the CyClockWizard software along
with a
CY3675-CLKMAKER1 CyClockMaker Clock Programmer
Kit
with a
CY3675-LCC6A socket adapter.
Cypress’s value
added distribution partners also provide programming services.
Field programmable devices are designated with an ‘F’ in the
part number. They are intended for quick prototyping and
inventory reduction. The software and programmer kit hardware
can be downloaded from
www.cypress.com
by clicking the
hyperlinks above.
Memory Map
Five fields can be written via the I
2
C bus. Four frequency words
define the output frequency. As shown in
Table 2,
each of these
words is a 6-byte field. When writing to a frequency word, all six
bytes should be written. They may be written either as individual
byte writes, or as a block write. The currently selected frequency
word should not be written to. All four words are symmetrical,
meaning that a 6-byte value that is valid for one word is also valid
for any of the other words, and produces the same frequency.
The fifth field is the select byte, located at byte address 40h. The
value written into the two least significant bits determines the
active frequency word. The other bits of the byte are reserved
and must be written with the values indicated in the table. Users
should never write to any address other than the 25 bytes
described here.
Table 2. Frequency Words
Frequency
Word
0
1
2
3
Byte Addresses
(hex)
10h to 15h
16h to 1Bh
1Ch to 21h
22h to 27h
Word Select
(Select Byte 40h)
00
01
10
11
Factory-Configured CY2XF23
For ready-to-use devices, the CY2XF23 is available with no field
programming required. Pre-configured devices (see
“Standard
and Application-Specific Factory Configurations”
on page 4) are
available for samples or orders, or a request for a custom
configuration can be made. All requests are submitted to the
local Cypress Field Application Engineer (FAE) or sales
representative. After the request is processed, the user receives
a new part number, samples, and datasheet with the
programmed values. This part number is used for additional
sample requests and production orders. The CY2XF23 is
one-time programmable (OTP).
Table 3. Register 40h: Select Byte
Bits
7:2
1:0
Default Value
Name
(binary)
000000
Reserved
User-defined
Description
Programming Variables
Output Frequencies
The CY2XF23 is programmed with up to four independent output
frequencies, which are then selected using the I
2
C interface. The
device can synthesize frequencies to a resolution of 1 part per
million (ppm), but the actual accuracy of the output frequency is
limited by the accuracy of the integrated reference crystal.
The CY2XF23 has an output frequency range of 50 MHz to
690 MHz, but the range is not continuous. The CY2XF23 cannot
generate frequencies in the ranges of 521 MHz to 529 MHz and
596 MHz to 617 MHz.
Reserved. Always write
this value.
Word select Selects the Frequency
Word to determine the
output frequency. 00
selects Word 0; 01
selects Word 1; 10
selects Word 2; 11
selects Word 3.
Serial Interface Protocol and Timing
The CY2XF23 uses pins SDA and SCLK for an I
2
C bus that
operates up to 100 kbits/sec in read or write mode. The
CY2XF23 is always a slave on this bus, meaning that it never
initiates a bus transaction. The basic write protocol is as follows:
Start Bit; 7-bit Device Address (DA); R/W Bit; Slave Clock
Acknowledge (ACK); 8-bit Memory Address (MA); ACK; 8-bit
Data; ACK; 8-bit Data in MA+1 if desired; ACK; 8-bit Data in
MA+2; ACK; and so on, until STOP Bit. The basic serial format
is illustrated in
Figure 4 on page 7.
Industrial versus Commercial Device Performance
Industrial and commercial devices have different internal
crystals. They have a potentially significant impact on
performance levels for applications requiring the lowest possible
phase noise. CyClockWIzard software allows the user to select
between and view the expected performance of both options.
Document Number: 001-53145 Rev. *G
Page 5 of 16
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