19-3945; Rev 1; 7/06
IEEE 802.3af PD Interface and PWM Controllers
with Integrated Power MOSFETs
General Description
The MAX5953A/MAX5953B/MAX5953C/MAX5953D
integrate a complete power IC solution for Powered
Devices (PD) in a Power-Over-Ethernet (PoE) system, in
compliance with the IEEE 802.3af standard. The
MAX5953A/MAX5953B/MAX5953C/MAX5953D provide
the PD with a detection signature, a classification sig-
nature, and an integrated isolation switch with program-
mable inrush current control. These devices also
integrate a voltage-mode PWM controller with two
power MOSFETs connected in a two-switch voltage-
clamped DC-DC converter configuration.
An integrated MOSFET provides PD isolation during
detection and classification. All devices guarantee a
leakage current offset of less than 10µA during the
detection phase. A programmable current limit pre-
vents high inrush current during power-on. The devices
feature power-mode undervoltage lockout (UVLO) with
wide hysteresis and long deglitch time to compensate
for twisted-pair-cable resistive drop and to assure
glitch-free transition between detection, classification,
and power-on/-off phases. The MAX5953A/MAX5953C
have an adjustable UVLO threshold with the default
value compliant to the 802.3af standard, while the
MAX5953B/MAX5953D have a lower and fixed UVLO
threshold compatible with some legacy pre-802.3af
power-sourcing equipment (PSE) devices.
The DC-DC converters are operable in either forward or
flyback configurations with a wide input voltage range
from 11V to 76V and up to 15W of output power. The
voltage-clamped power topology enables full recovery
of stored magnetizing and leakage inductive energy for
enhanced efficiency and reliability. When using the
high-side MOSFET, the controller can be configured as
a buck converter. A look-ahead signal for driving sec-
ondary-side synchronous rectifiers can be used to
increase efficiency. A wide array of protection features
include UVLO, over-temperature shutdown, and short-
circuit protection with hiccup current limit for enhanced
performance and reliability. Operation up to 500kHz
allows for smaller external magnetics and capacitors.
The MAX5953A/MAX5953B/MAX5953C/MAX5953D are
available in a high-power (2.22W), 7mm x 7mm ther-
mally enhanced thin QFN package.
Features
♦
Powered Device Interface
Fully Integrated IEEE 802.3af-Compliant PD
Interface
PD Detection and Programmable Classification
Signatures
Less than 10µA Leakage Current Offset During
Detection
Integrated MOSFET for Isolation and Inrush
Current Limiting
Gate Output Allows External Control of the
Internal Isolation MOSFET
Programmable Inrush Current Control
Programmable Undervoltage Lockout
(MAX5953A/MAX5953C)
♦
DC-DC Converter
Clamped, Two-Switch Power IC for High
Efficiency
Integrated High-Voltage 0.4Ω Power MOSFETs
Up to 15W Output Power
Bias Voltage Regulator with Automatic High-
Voltage Supply Turn-Off
11V to 76V Wide Input Voltage Range
Feed-Forward Voltage-Mode Control for Fast
Input Transient Rejection
Programmable Undervoltage Lockout
Overtemperature Shutdown
Indefinite Short-Circuit Protection with
Programmable Fault Integration
Integrated Look-Ahead Signal for Secondary-
Side Synchronous Rectification
> 90% Efficiency with Synchronous
Rectification
Up to 500kHz Switching Frequency
♦
High-Power (2.22W), 7mm x 7mm Thermally
Enhanced Lead-Free Thin QFN Package
MAX5953A/MAX5953B/MAX5953C/MAX5953D
Ordering Information
PART
MAX5953AUTM+
MAX5953BUTM+
MAX5953CUTM+
MAX5953DUTM+
PIN-PACKAGE
48 TQFN
48 TQFN
48 TQFN
48 TQFN
PKG CODE
T4877-6
T4877-6
T4877-6
T4877-6
Applications
IEEE 802.3af Powered
Devices
IP Phones
Wireless Access Nodes
Internet Appliances
Security Cameras
Computer Telephony
Operating junction temperature range is 0°C to +125°C.
+Denotes
lead-free package.
Pin Configuration and Typical Operating Circuit appear at
end of data sheet.
1
________________________________________________________________
Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
IEEE 802.3af PD Interface and PWM Controllers
with Integrated Power MOSFETs
MAX5953A/MAX5953B/MAX5953C/MAX5953D
ABSOLUTE MAXIMUM RATINGS
V+ to V
EE
................................................................-0.3V to +90V
OUT, PGOOD,
PGOOD
to V
EE
.....................-0.3V to (V+ + 0.3V)
RCLASS, GATE to V
EE
...........................................-0.3V to +12V
UVLO to V
EE
............................................................ -0.3V to +8V
PGOOD to OUT ........................................... -0.3V to (V+ + 0.3V)
HVIN, INBIAS, DRNH, XFRMRH,
XFRMRL to GND.................................................-0.3V to +80V
BST to GND ........................................................... -0.3V to +95V
BST to XFRMRH .................................................... -0.3V to +12V
PGND to GND .......................................................-0.3V to +0.3V
DCUVLO, RAMP, CSS, OPTO, FLTINT, RCFF,
RTCT to GND..................................................... -0.3V to +12V
SRC, CS to GND...................................................... -0.3V to +6V
REGOUT, DRVIN to GND .......................................-0.3V to +12V
REGOUT to HVIN .................................................. -80V to +0.3V
REGOUT to INBIAS ............................................... -80V to +0.3V
PPWM to GND....................................-0.3V to (V
REGOUT
+ 0.3V)
*As per JEDEC 51 standard.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Maximum Input/Output Current (Continuous)
OUT to V
EE
....................................................................500mA
V+, RCLASS to V
EE
.........................................................70mA
UVLO, PGOOD,
PGOOD
to V
EE
.....................................20mA
GATE to V
EE
....................................................................80mA
REGOUT to GND ............................................................50mA
DRNH, XFRMRH, XFRMRL, SRC to GND (Average),
T
J
= +125°C..................................................................0.9A
PPWM to GND ..............................................................±20mA
Continuous Power Dissipation* (T
A
= +70°C)
48-Pin TQFN 7mm X 7mm
(derate 27.8mW/°C above +70°C) .............................2222mW
θ
JA
................................................................................36°C/W
Operating Ambient Temperature Range ................0°C to +85°C
Operating Junction Temperature Range ..............0°C to +125°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-60°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
ELECTRICAL CHARACTERISTICS
(V
IN
= (V+ - V
EE
) = 48V, GATE = PGOOD =
PGOOD
= unconnected, GND = OUT, HVIN = V+, UVLO = V
EE
, T
J
= 0°C to +125°C, unless
otherwise noted. Typical values are at T
J
= +25°C. All voltages are referenced to V
EE
, unless otherwise noted.) (Note 1)
PARAMETER
DETECTION MODE
Input Offset Current
Effective Differential Input
Resistance (Note 3)
CLASSIFICATION MODE
Classification Current Turn-Off
Threshold
V
TH,CLASS
V
IN
rising (Note 4)
V
IN
= 12.6V
to 20V,
R
DISC
=
25.5kΩ
(Notes 5, 6)
Class 0, R
RCLASS
= 10kΩ
Class 1, R
RCLASS
= 732Ω
Class 2, R
RCLASS
= 392Ω
Class 3, R
RCLASS
= 255Ω
Class 4, R
RCLASS
= 178Ω
20.8
0
9.17
17.29
26.45
36.6
21.8
22.5
2
11.83
19.71
29.55
41.4
67
0.4
37.4
34.3
30
38.6
35.4
1
40.2
36.9
V
mA
V
V
mA
V
I
OFFSET
dR
V
IN
= 1.4V to 10.1V (Note 2)
V
IN
= 1.4V, up to 10.1V with 1V step
550
10
µA
kΩ
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
POWERED DEVICE (PD) INTERFACE
Classification Current
I
CLASS
POWER MODE
Operating Supply Voltage
Operating Supply Current
Default Power Turn-On Voltage
Default Power Turn-Off Voltage
V
IN
I
IN
V
UVLO, ON
V
UVLO,OFF
V
IN
= (V+ - V
EE
)
Measure at V+, not including R
DISC
,
GATE = V
EE
, HVIN = GND = OUT
V
IN
increasing
MAX5953A/MAX5953C
MAX5953B/MAX5953D
V
IN
decreasing, MAX5953A/MAX5953C
2
_______________________________________________________________________________________
IEEE 802.3af PD Interface and PWM Controllers
with Integrated Power MOSFETs
ELECTRICAL CHARACTERISTICS (continued)
(V
IN
= (V+ - V
EE
) = 48V, GATE = PGOOD =
PGOOD
= unconnected, GND = OUT, HVIN = V+, UVLO = V
EE
, T
J
= 0°C to +125°C, unless
otherwise noted. Typical values are at T
J
= +25°C. All voltages are referenced to V
EE
, unless otherwise noted.) (Note 1)
PARAMETER
Default Power Turn-On/Off
Hysteresis Voltage
External UVLO Programming
Range
UVLO External Reference
Voltage
UVLO External Reference
Voltage Hysteresis
UVLO Bias Current
UVLO Input Ground-Sense
Threshold
UVLO Input Ground-Sense Glitch
Rejection
Power Turn-Off Voltage,
Undervoltage Lockout Deglitch
Time
Isolation Switch n-Channel
MOSFET On-Resistance
Isolation Switch n-Channel
MOSFET Off-Threshold Voltage
GATE Pulldown Switch
Resistance
GATE Charging Current
GATE High Voltage
PGOOD Assertion V
OUT
Threshold (Note 10)
PGOOD,
PGOOD
Assertion
V
GATE
Threshold
PGOOD,
PGOOD
Output Low
Voltage
PGOOD Leakage Current
PGOOD
Leakage Current
t
OFF_DLY
V
IN
, V
UVLO
falling (Note 9)
Output current = 300mA, V
GATE
= 5.6V,
measured between OUT and V
EE
V
GATE
- V
EE
, OUT = V+,
output current < 1µA
Power-off mode, V
IN
= +12V
V
GATE
= 2V
I
GATE
= 1µA
V
OUT
- V
EE
decreasing, V
GATE
= 5.75V
Hysteresis
V
GATE
- V
EE
increasing
Hysteresis
I
SINK
= 2mA, V
OUT
≤
(V+ - 5V) (Note 11)
GATE = high, V+ - V
OUT
= 67V (Note 11)
GATE = V
EE
,
PGOOD
- V
EE
= 67V
(Note 11)
4.62
4.5
5.59
1.16
0.5
38
10
5.76
1.23
70
4.76
80
0.2
1
1
4.91
80
16.5
5.93
1.31
0.32
SYMBOL
V
HYST,UVLO
V
IN,EX
V
REF,UVLO
V
HYST,UVLO
I
IN,UVLO
V
TH,G,UVLO
CONDITIONS
MAX5953A/MAX5953C
MAX5953B/MAX5953D
MAX5953A/MAX5953C only (Note 7)
V
UVLO
increasing
Ratio to V
REF, UVLO
V
UVLO
= 2.460V
(Note 8)
MIN
7.1
4
12
2.400
19.2
-1.5
50
7
2.460
20
67
2.522
20.9
+1.5
440
TYP
MAX
UNITS
V
V
V
%
µA
mV
µs
MAX5953A/MAX5953B/MAX5953C/MAX5953D
ms
R
ON,ISO
V
GSTH
R
G
I
GATE
V
GATE
V
OUTEN
V
GSEN
V
OL,PGOOD
0.6
1.5
Ω
V
Ω
µA
V
V
mV
V
mV
V
µA
µA
_______________________________________________________________________________________
3
IEEE 802.3af PD Interface and PWM Controllers
with Integrated Power MOSFETs
MAX5953A/MAX5953B/MAX5953C/MAX5953D
ELECTRICAL CHARACTERISTICS (DC-DC Controller)
(All voltages referenced to GND, unless otherwise noted. V
HVIN
= +48V, C
INBIAS
= 1µF, C
REGOUT
= 2.2µF, R
RTCT
= 25kΩ, C
RTCT
=
100pF, C
BST
= 0.22µF, V
CSS
= V
CS
= 0V, V
RAMP
= V
DCUVLO
= 3V, T
J
= 0°C to +125°C, unless otherwise noted. Typical values are at
T
J
= +25°C, unless otherwise noted.) (Note 1)
PARAMETER
Input Supply Range
OSCILLATOR (RTCT)
PWM Frequency
Maximum PWM Duty Cycle
Maximum RTCT Frequency
RTCT Peak Trip Level
RTCT Valley Trip Level
RTCT Input Bias Current
RTCT Discharge MOSFET
R
DS(ON)
RTCT Discharge Pulse Width
LOOK-AHEAD LOGIC (PPWM)
PPWM to Output Propagation
Delay
PPWM Output High
PPWM Output Low
Common-Mode Input Range
Input Offset Voltage
Input Bias Current
RAMP to XFRMRL Propagation
Delay
Minimum OPTO Voltage
Minimum RCFF Voltage
REGOUT LDO (REGOUT)
REGOUT Voltage Set Point
V
REGOUT
INBIAS unconnected,
V
HVIN
= 11V to 76V
V
INBIAS
= V
HVIN
= 11V to 76V
INBIAS unconnected, V
HVIN
= 15V,
I
REGOUT
= 0 to 30mA
V
INBIAS
= V
HVIN
= 15V,
I
REGOUT
= 0 to 30mA
REGOUT Dropout Voltage
REGOUT Undervoltage
Lockout Threshold
REGOUT Undervoltage
Lockout Threshold Hysteresis
INBIAS unconnected, I
REGOUT
= 30mA
V
INBIAS
= V
HVIN
, I
REGOUT
= 30mA
REGOUT rising
REGOUT falling
6.6
7.0
0.7
8.3
9.5
8.75
10.6
9.2
11.0
0.25
V
0.25
1.25
1.25
7.4
V
V
V
V
t
COMPARATOR
From V
RAMP
(50mV overdrive) rising to
V
XFRMRL
rising
V
CSS
= 0V, OPTO sinking 2mA
RCFF sinking 2mA
-2
100
1.47
2.18
t
PPWM
V
OH,PPWM
V
OL,PPWM
V
CM_PWM
V
PPWM
rising to V
XFRMRL
falling
Sourcing 2mA
Sinking 2mA
0
10
+2
7.0
110
11.0
0.2
5.5
ns
V
V
V
mV
µA
ns
V
V
f
S
D
MAX
f
RTCTMAX
V
TH,RTCT
V
TL,RTCT
I
IN,RTCT
R
DIS,RTCT
Sinking 50mA
(Note 12)
250
47
1
0.51 x V
REGOUT
1
±1
35
50
85
kHz
%
MHz
V
V
µA
Ω
ns
SYMBOL
V
HVIN
CONDITIONS
MIN
11
TYP
MAX
76
UNITS
V
PWM COMPARATOR (OPTO, RAMP, RCFF)
REGOUT Load Regulation
4
_______________________________________________________________________________________
IEEE 802.3af PD Interface and PWM Controllers
with Integrated Power MOSFETs
ELECTRICAL CHARACTERISTICS (DC-DC Controller) (continued)
(All voltages referenced to GND, unless otherwise noted. V
HVIN
= +48V, C
INBIAS
= 1µF, C
REGOUT
= 2.2µF, R
RTCT
= 25kΩ, C
RTCT
=
100pF, C
BST
= 0.22µF, V
CSS
= V
CS
= 0V, V
RAMP
= V
DCUVLO
= 3V, T
J
= 0°C to +125°C, unless otherwise noted. Typical values are at
T
J
= +25°C, unless otherwise noted.) (Note 1)
PARAMETER
SOFT-START (CSS)
Soft-Start Current
INTEGRATING FAULT PROTECTION
FLTINT Source Current
FLTINT Trip Point
FLTINT Hysteresis
INTERNAL POWER FETs
On-Resistance
Off-State Leakage Current
Total Gate Charge Per Power
FET
HIGH-SIDE DRIVER
Low to High Latency
High to Low Latency
Output Drive Voltage
LOW-SIDE DRIVER
Low to High Latency
High to Low Latency
t
LH-LS
t
HL-LS
Driver delay until FET V
GS
reaches 0.9 x
V
DRVIN
and is fully on
Driver delay until FET V
GS
reaches 0.1 x
V
DRVIN
and is fully off
80
40
ns
ns
t
LH-HS
t
HL-HS
V
BST
Driver delay until FET V
GS
reaches 0.9 x
(V
BST
- V
XFRMRH
) and is fully on
Driver delay until FET V
GS
reaches 0.1 x
(V
BST
- V
XFRMRH
) and is fully off
BST to XFRMRH with high side on
80
40
8
ns
ns
V
R
ON,POWER
V
DRVIN
= V
BST
= 9V,
V
XFRMRH
= V
SRC
= 0V, I
DS
= 50mA
-5
15
0.4
0.8
+10
Ω
µA
nC
I
FLTINT
V
FLTINT
rising
80
2.7
0.75
µA
V
V
I
CSS
V
CSS
= 0V
33
µA
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
MAX5953A/MAX5953B/MAX5953C/MAX5953D
CURRENT-LIMIT COMPARATOR (CS)
Current-Limit Threshold
Voltage
Current-Limit Input Bias
Current
Propagation Delay to XFRMRL
V
ILIM
I
BILIM
t
dILIM
0 < V
CS
< 0.3V
From V
CS
rising (10mV overdrive) to
V
XFRMRL
rising
140
-2
160
156
172
+2
mV
µA
ns
BOOST VOLTAGE CIRCUIT (See Figure 9, QB)
Driver Output Delay
One-Shot Pulse Width
QB R
DSON
THERMAL SHUTDOWN
Shutdown Temperature
Thermal Hysteresis
T
SH
T
H
Temperature rising
+160
20
°C
°C
t
PPWMD
t
PWQB
Sinking 20mA
200
300
30
60
ns
ns
Ω
_______________________________________________________________________________________
5
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