74LVT2952DB: 产品描述Bus Transceivers 3.3V OCTAL REG XCVR 3-S; 产品类别逻辑逻辑; 文件大小539KB，共17页; 制造商NXP(恩智浦); 官网地址https://www.nxp.com; 标准

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74LVT2952DB概述

Bus Transceivers 3.3V OCTAL REG XCVR 3-S

74LVT2952DB规格参数

参数名称	属性值
是否无铅	不含铅
是否Rohs认证	符合
零件包装代码	SSOP
包装说明	SSOP, SSOP24,.3
针数	24
Reach Compliance Code	compliant
其他特性	WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION
控制类型	INDEPENDENT CONTROL
计数方向	BIDIRECTIONAL
系列	LVT
JESD-30 代码	R-PDSO-G24
JESD-609代码	e4
长度	8.2 mm
逻辑集成电路类型	REGISTERED BUS TRANSCEIVER
最大I（ol）	0.032 A
湿度敏感等级	1
位数	8
功能数量	1
端口数量	2
端子数量	24
最高工作温度	85 °C
最低工作温度	-40 °C
输出特性	3-STATE
输出极性	TRUE
封装主体材料	PLASTIC/EPOXY
封装代码	SSOP
封装等效代码	SSOP24,.3
封装形状	RECTANGULAR
封装形式	SMALL OUTLINE, SHRINK PITCH
峰值回流温度（摄氏度）	260
电源	3.3 V
Prop。Delay @ Nom-Sup	6.1 ns
传播延迟（tpd）	7.1 ns
认证状态	Not Qualified
座面最大高度	2 mm
最大供电电压 (Vsup)	3.6 V
最小供电电压 (Vsup)	2.7 V
标称供电电压 (Vsup)	3.3 V
表面贴装	YES
技术	BICMOS
温度等级	INDUSTRIAL
端子面层	Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式	GULL WING
端子节距	0.65 mm
端子位置	DUAL
处于峰值回流温度下的最长时间	30
翻译	N/A
触发器类型	POSITIVE EDGE
宽度	5.3 mm
Base Number Matches	1

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74LVT2952

3.3 V Octal registered transceiver; 3-State

Rev. 4 — 11 September 2013

Product data sheet

1. General description

The 74LVT2952 is a high-performance BiCMOS product designed for V

operation at

3.3 V.

This device combines low static and dynamic power dissipation with high speed and high

output drive.

The 74LVT2952 device is an 8-bit registered transceiver. Two 8-bit back-to-back registers

store data flowing in both directions between two bidirectional buses.

Data applied to the inputs is entered and stored on the rising edge of the clock (CPxx) if

the clock enable (CExx) is LOW. The data is then present at the 3-state output buffers, but

is only accessible when the output enable (OExx)) is LOW. Data flow from An inputs to Bn

outputs is the same as for Bn inputs to An outputs.

2. Features and benefits



8-bit registered transceiver

Independent registers for A and B buses

Input and output interface capability to systems at 5 V supply

TTL input and output switching levels

Output capability: +64 mA/32 mA

Latch-up protection exceeds 500 mA per JESD78 class II level A

ESD protection:



HBM JESD22-A114E exceeds 2000 V



MM JESD22-A115-A exceeds 200 V

Bus-hold data inputs eliminate the need for external pull-up resistors for unused inputs

Live insertion/extraction permitted

Power-up reset

Power-up 3-state

No bus current loading when output is tied to 5 V bus



74LVT2952DB相似产品对比

	74LVT2952DB	74LVT2952PW118	74LVT2952DB112	74LVT2952DB-T	74LVT2952PW-T	74LVT2952PW	74LVT2952D	74LVT2952DB,118
描述	Bus Transceivers 3.3V OCTAL REG XCVR 3-S	Bus Transceivers 3.3V OCTAL REG XCVR	Bus Transceivers 3.3V OCTAL REG XCVR	Bus Transceivers 3.3V OCTAL REG XCVR 3-S	Bus Transceivers 3.3V OCTAL REG XCVR 3-S	Bus Transceivers 3.3V OCTAL REG XCVR 3-S	Bus Transceivers 3.3V OCTAL REG XCVR 3-S	总线收发器 3.3V OCTAL REG XCVR
是否无铅	不含铅	-	-	不含铅	不含铅	不含铅	不含铅	-
是否Rohs认证	符合	-	-	符合	符合	符合	符合	符合
零件包装代码	SSOP	-	-	SSOP	TSSOP	TSSOP	SOIC	SSOP2
包装说明	SSOP, SSOP24,.3	-	-	SSOP,	TSSOP,	TSSOP, TSSOP24,.25	SOP, SOP24,.4	SSOP,
针数	24	-	-	24	24	24	24	24
Reach Compliance Code	compliant	-	-	unknown	unknown	unknown	unknown	compliant
其他特性	WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION	-	-	WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION	WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION	WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION	WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION	WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION
系列	LVT	-	-	LVT	LVT	LVT	LVT	LVT
JESD-30 代码	R-PDSO-G24	-	-	R-PDSO-G24	R-PDSO-G24	R-PDSO-G24	R-PDSO-G24	R-PDSO-G24
JESD-609代码	e4	-	-	e4	e4	e4	e4	e4
长度	8.2 mm	-	-	8.2 mm	7.8 mm	7.8 mm	15.4 mm	8.2 mm
逻辑集成电路类型	REGISTERED BUS TRANSCEIVER	-	-	REGISTERED BUS TRANSCEIVER	REGISTERED BUS TRANSCEIVER	REGISTERED BUS TRANSCEIVER	REGISTERED BUS TRANSCEIVER	REGISTERED BUS TRANSCEIVER
湿度敏感等级	1	-	-	1	1	1	1	1
位数	8	-	-	8	8	8	8	8
功能数量	1	-	-	1	1	1	1	1
端口数量	2	-	-	2	2	2	2	2
端子数量	24	-	-	24	24	24	24	24
最高工作温度	85 °C	-	-	85 °C	85 °C	85 °C	85 °C	85 °C
最低工作温度	-40 °C	-	-	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
输出特性	3-STATE	-	-	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
输出极性	TRUE	-	-	TRUE	TRUE	TRUE	TRUE	TRUE
封装主体材料	PLASTIC/EPOXY	-	-	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
封装代码	SSOP	-	-	SSOP	TSSOP	TSSOP	SOP	SSOP
封装形状	RECTANGULAR	-	-	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
封装形式	SMALL OUTLINE, SHRINK PITCH	-	-	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE	SMALL OUTLINE, SHRINK PITCH
峰值回流温度（摄氏度）	260	-	-	260	260	260	260	260
传播延迟（tpd）	7.1 ns	-	-	7.1 ns	7.1 ns	7.1 ns	7.1 ns	7.1 ns
认证状态	Not Qualified	-	-	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
座面最大高度	2 mm	-	-	2 mm	1.1 mm	1.1 mm	2.65 mm	2 mm
最大供电电压 (Vsup)	3.6 V	-	-	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V
最小供电电压 (Vsup)	2.7 V	-	-	2.7 V	2.7 V	2.7 V	2.7 V	2.7 V
标称供电电压 (Vsup)	3.3 V	-	-	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
表面贴装	YES	-	-	YES	YES	YES	YES	YES
技术	BICMOS	-	-	BICMOS	BICMOS	BICMOS	BICMOS	BICMOS
温度等级	INDUSTRIAL	-	-	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
端子面层	Nickel/Palladium/Gold (Ni/Pd/Au)	-	-	NICKEL PALLADIUM GOLD	NICKEL PALLADIUM GOLD	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	NICKEL PALLADIUM GOLD
端子形式	GULL WING	-	-	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING
端子节距	0.65 mm	-	-	0.65 mm	0.65 mm	0.65 mm	1.27 mm	0.65 mm
端子位置	DUAL	-	-	DUAL	DUAL	DUAL	DUAL	DUAL
处于峰值回流温度下的最长时间	30	-	-	30	30	30	30	30
宽度	5.3 mm	-	-	5.3 mm	4.4 mm	4.4 mm	7.5 mm	5.3 mm
Base Number Matches	1	-	-	1	1	1	1	1

74LVT2952DB

74LVT2952DB在线购买

74LVT2952DB概述

74LVT2952DB规格参数

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74LVT2952DB相似产品对比

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