INTEGRATED CIRCUITS
74ABT273A
Octal D-type flip-flop
Product specification
IC23 Data Handbook
1995 Sep 06
Philips
Semiconductors
Philips Semiconductors
Product specification
Octal D-type flip-flop
74ABT273A
FEATURES
•
Eight edge-triggered D-type flip-flops
•
Buffered common clock
•
Buffered asynchronous Master Reset
•
Power-up reset
•
See 74ABT377 for clock enable version
•
See 74ABT373 for transparent latch version
•
See 74ABT374 for 3-State version
•
ESD protection exceeds 2000 V per Mil Std 833 Method 3015 and
200 V per machine model.
DESCRIPTION
The 74ABT273A has eight edge-triggered D-type flip-flops with
individual D inputs and Q outputs. The common buffered Clock (CP)
and Master Reset (MR) inputs load and reset (clear) all flip-flops
simultaneously.
The register is fully edge-triggered. The state of each D input, one
setup time before the Low-to-High clock transition, is transferred to
the corresponding flip-flop’s Q output.
All outputs will be forced Low independent of Clock or Data inputs
by a Low voltage level on the MR input. The device is useful for
applications where the true output only is required and the CP and
MR are common elements.
QUICK REFERENCE DATA
SYMBOL
t
PLH
t
PHL
C
IN
I
CCH
PARAMETER
Propagation delay
CP to Qn
Input capacitance
Total supply current
CONDITIONS
T
amb
= 25°C; GND = 0V
C
L
= 50pF; V
CC
= 5V
V
I
= 0V or V
CC
Outputs High; V
CC
=5.5V
TYPICAL
3.0
3.4
3.5
150
UNIT
ns
pF
µA
ORDERING INFORMATION
PACKAGES
20-Pin Plastic DIP
20-Pin plastic SO
20-Pin Plastic SSOP Type II
20-Pin Plastic TSSOP Type I
TEMPERATURE RANGE
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
OUTSIDE NORTH AMERICA
74ABT273A N
74ABT273A D
74ABT273A DB
74ABT273A PW
NORTH AMERICA
74ABT273A N
74ABT273A D
74ABT273A DB
7ABT273APW DH
DWG NUMBER
SOT146-1
SOT163-1
SOT339-1
SOT360-1
PIN CONFIGURATION
MR
Q0
D0
D1
Q1
Q2
D2
D3
Q3
1
2
3
4
5
6
7
8
9
20
19
18
17
16
15
14
13
12
11
V
CC
Q7
D7
D6
Q6
Q5
D5
D4
Q4
CP
PIN DESCRIPTION
PIN
NUMBER
11
3, 4, 7, 8, 13,
14, 17, 18
2, 5, 6, 9, 12,
15, 16, 19
1
10
20
SA00052
SYMBOL
CP
D0 - D7
Q0 - Q7
MR
GND
V
CC
NAME AND FUNCTION
Clock pulse input (active rising edge)
Data inputs
Data outputs
Master Reset input (active-Low)
Ground (0V)
Positive supply voltage
GND 10
1995 Sep 06
2
853-1774 15704
Philips Semiconductors
Product specification
Octal D-type flip-flop
74ABT273A
LOGIC SYMBOL (IEEE/IEC)
1
11
LOGIC SYMBOL
3
4
7
8
13 14 17
18
R
C1
D0 D1 D2 D3 D4 D5 D6 D7
2
5
6
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
9
12
15
16
19
2
5
6
9
12 15 16
19
11
1
CP
MR
3
4
7
8
13
14
17
18
1D
SA00053
SA00054
LOGIC DIAGRAM
D0
3
11
CP
D1
4
D2
7
D3
8
D4
13
D5
14
D6
17
D7
18
D
CP
R
D
1
MR
Q
D
CP
R
D
Q
D
CP
R
D
Q
D
CP
R
D
Q
D
CP
R
D
Q
D
CP
R
D
Q
D
CP
R
D
Q
D
CP
R
D
Q
2
Q0
5
Q1
6
Q2
9
Q3
12
Q4
15
Q5
16
Q6
19
Q7
SA00055
FUNCTION TABLE
INPUTS
MR
L
H
H
CP
X
↑
↑
Dn
X
h
l
OUTPUTS
OPERATING MODE
Q0 - Q7
L
H
L
Reset (clear)
Load ”1”
Load ”0”
H = High voltage level
h = High voltage level one set-up time prior to the Low-to-High
clock transition
L = Low voltage level
l = Low voltage level one set-up time prior to the Low-to-High
clock transition
X = Don’t care
↑
= Low-to-High clock transition
1995 Sep 06
3
Philips Semiconductors
Product specification
Octal D-type flip-flop
74ABT273A
ABSOLUTE MAXIMUM RATINGS
1, 2
SYMBOL
V
CC
I
IK
V
I
I
OK
V
OUT
I
OUT
T
stg
PARAMETER
DC supply voltage
DC input diode current
DC input voltage
3
DC output diode current
DC output voltage
3
DC output current
Storage temperature range
V
O
< 0
output in Off or High state
output in Low state
V
I
< 0
CONDITIONS
RATING
-0.5 to +7.0
-18
-1.2 to +7.0
-50
-0.5 to +5.5
128
-65 to 150
UNIT
V
mA
V
mA
V
mA
°C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
V
CC
V
I
V
IH
V
IL
I
OH
I
OL
∆t/∆v
T
amb
DC supply voltage
Input voltage
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Input transition rise or fall rate
Operating free-air temperature range
0
-40
PARAMETER
Min
4.5
0
2.0
0.8
-32
64
10
+85
Max
5.5
V
CC
V
V
V
V
mA
mA
ns/V
°C
UNIT
1995 Sep 06
4
Philips Semiconductors
Product specification
Octal D-type flip-flop
74ABT273A
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
T
amb
= +25°C
Min
V
IK
Input clamp voltage
V
CC
= 4.5V; I
IK
= -18mA
V
CC
= 4.5V; I
OH
= -3mA; V
I
= V
IL
or V
IH
V
OH
High-level output voltage
V
CC
= 5.0V; I
OH
= -3mA; V
I
= V
IL
or V
IH
V
CC
= 4.5V; I
OH
= -32mA; V
I
= V
IL
or V
IH
V
OL
V
RST
I
I
I
OFF
I
CEX
I
O
I
CCH
I
CCL
∆I
CC
Additional supply current per
input pin
2
Low-level output voltage
Power-up output low
voltage
3
Input leakage current
Power-off leakage current
Output High leakage current
Output current
1
Quiescent supply current
V
CC
= 4.5V; I
OL
= 64mA; V
I
= V
IL
or V
IH
V
CC
= 5.5V; I
O
= 1mA; V
I
= GND or V
CC
V
CC
= 5.5V; V
I
= GND or 5.5V
V
CC
= 0.0V; V
O
or V
I
≤
4.5V
V
CC
= 5.5V; V
O
= 5.5V; V
I
= GND or V
CC
V
CC
= 5.5V; V
O
= 2.5V
V
CC
= 5.5V; Outputs High, V
I
= GND or V
CC
V
CC
= 5.5V; Outputs Low, V
I
= GND or V
CC
V
CC
= 5.5V; One data input at 3.4V, other
inputs at V
CC
or GND
-50
2.5
3.0
2.0
Typ
-0.9
2.9
3.4
2.4
0.42
0.13
±0.01
±5.0
5.0
-70
150
24
0.5
0.55
0.55
±1.0
±100
50
-180
250
30
1.5
-50
Max
-1.2
2.5
3.0
2.0
0.55
0.55
±1.0
±100
50
-180
250
30
1.5
V
V
µA
µA
µA
mA
µA
mA
mA
V
T
amb
= -40°C
to +85°C
Min
Max
-1.2
V
UNIT
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
AC CHARACTERISTICS
GND = 0V; t
R
= t
F
= 2.5ns; C
L
= 50pF, R
L
= 500Ω
LIMITS
SYMBOL
PARAMETER
WAVEFORM
Min
f
MAX
t
PLH
t
PHL
t
PHL
Maximum clock frequency
Propagation delay
CP to Qn
Propagation delay
MR to Qn
1
1
2
250
1.5
2.0
2.5
T
amb
= +25°C
V
CC
= +5.0V
Typ
350
3.0
3.4
4.5
4.0
4.6
6.0
Max
T
amb
= -40°C to +85°C
V
CC
= +5.0V
±0.5V
Min
250
1.5
2.0
2.5
4.8
4.8
6.6
Max
MHz
ns
ns
UNIT
1995 Sep 06
5
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