Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA •95126 • (408)295-9800tel • www.icst.com
MK1491-14
OPTi ACPI Firestar Clock Source
Pin Assignment
VDD
X14I
X14O
GND
14.3(HS)
HOST1
HOST2
VDDHOST1-4
HOST3
HOST4
GND
HOST5
EHOST6
VDD
HOST5-7
Table #1. F1, F2 Frequency
Select (MHz)
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
STOP#
SEL1 SEL0
F1
F2
FS1
FS0
HOST PCI (S/A=0) PCI (S/A=1)
F1(SEL0)
0
0
14.318
14.318
0
0
66.66
33.33*
HOST/2
VDD
0
1
14.318
48.000
0
1
60
33.33*
HOST/2
F2(PS)
24.000
14.318
1
0
1
0
75
33.33*
HOST/2
PCI(FS1)
16.934
24.576
1
1
1
1
50
33.33*
HOST/2
GND
PCIF(LE)
*2 MHz Accuracy
PCI(SEL1)
Low EMI for HOST & PCI
VDD
Table #3. Host 5-7 Skew Control
PCI(S/A)
VDD
HOST5-7
HS
LE
Low EMI
PCI(FS0)
2.5V
0
0
OFF
GND
3.3V
1
1
ON
SLOW#
HOST7
Table #2. Host/PCI Frequency Select (MHz)
Table #4. Power Down Control (IDD measured at 3.3V)
STOP# SLOW#
1
1
1
0
0
0
0
1
STATE
ON
SLOW
CLK OFF
PLL/OSC OFF
HOST
ON
33 MHz
LOW
LOW
PCI
ON
ON
DESCRIPTION
All Clocks On.
Host Clock smooth frequency transition to and from 33.33 MHz.
Asynchronously clamp HOST5, 7 to GND. HOST1-4,6, PCIF, F1, F2, 14.3M, continue to run.
LOW All outputs asynchronously clamped low. PLLs and 14.3 MHz oscillators are off.
*
IDD typ.
50 mA
32 mA
44 mA
1 µA
*PCI Function Select (PS) set at Power Up. PS=0, PCI=LOW; PS=1, PCI=ON when clock is switched to “CLK OFF” mode.
Pin Descriptions
Pin #
Name
Type Description
1, 20, 26
VDD
P Connect to +3.3V. Must be same voltage on all pins.
2
X14I
I Crystal connection. Connect to a 14.31818 MHz crystal or input clock.
3
X14O
O Crystal connection. Connect to a 14.31818 MHz crystal, or leave unconnected for clock.
4, 11, 17, 23
GND
P Connect to Ground.
5
14.3(HS)
I/O 14.318 MHz output. Amplitude matches VDD. Skew input control for Host 5-7.
6, 7, 9, 10
HOST 1, 2, 3, 4
O Host Output clocks 1, 2, 3 and 4. Amplitude matches VDD
HOST1-4
8
VDD
HOST1-4
P Connect to VDD supply.
12
HOST 5
O Host Output clock 5. Amplitude matches VDD
HOST5-7
.
13
EHOST 6
O Early Host Output clock 6. Amplitude matches VDD
HOST5-7
.
14
VDD
HOST5-7
P Connect to 2.5 V or 3.3 V. Host 5-7 skew adjusted with HS input. See Table #3 above.
15
HOST7
O Host Output clock 7. Amplitude matches VDD
HOST5-7
.
16
SLOW#
I Controls clock frequency and power downs, as defined in Table #4 above.
18
PCI(FS0)
I/O PCI Output clock, CPU Frequency Select input, as per Table #2 above. Amplitude = VDD.
19
PCI(S/A)
I/O PCI Output clock, and Asynchronous PCI Select input, as per Table #2 above.
21
PCI(SEL1)
I/O PCI Output clock, and Frequency Select 1 input, as per Table #1 above.
22
PCIF(LE)
I/O PCI Output clock that stays enabled when other PCI clocks are low. Low EMI enable input.
24
PCI(FS1)
I/O PCI output and Frequency Select input. See Table #2 above.
25
F2(PS)
I/O Fixed frequency output and PCI Function Select for "CLK OFF" mode.
27
F1(SEL0)
I/O Fixed frequency output and frequency SEL0 input per Table #1 above.
28
STOP#
I Controls clock frequency and power downs, as defined in Table #4 above.
Key: I = Input, O = Output, P = Power supply connection, I/O = Input on power up, becomes an Output after 10ms.
Internal pull-ups are on pins 5, 16, 18, 19, 21, 22, 24, 25, 27, 28.
MDS 1491-14 B
2
Revision 061801
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA •95126 • (408)295-9800tel • www.icst.com
MK1491-14
OPTi ACPI Firestar Clock Source
Electrical Specifications
Parameter
Supply voltage, VDD
Inputs and Clock Outputs
Ambient Operating Temperature
Soldering Temperature
Storage temperature
Operating Voltage
Operating Voltage
Input High Voltage, VIH
Input Low Voltage, VIL
Output High Voltage, VOH
Output Low Voltage, VOL
Output High Voltage, VOH
Operating Supply Current, IDD
Power Down mode Supply Current
Short Circuit Current
Short Circuit Current
Input Capacitance
Conditions
Referenced to GND
Referenced to GND
Max of 10 seconds
-65
VDD
VDD HOST1-4, HOST5-7
2
0.8
IOH=-8mA
IOL=8mA
IOH=-8mA
No Load, 66.6MHz
Each output
VDD HOST = 2.5V
2.4
0.4
VDD-0.4
48
3
±50
±25
7
14.31818
1.5
2.5
1.5
2.5
55
250
750
500
3.3
2.5/3.3
Minimum
Typical
Maximum
7
VDD+0.5
70
260
150
3.6
VDD
Units
V
V
°C
°C
°C
V
V
V
V
V
V
V
mA
µΑ
mA
mA
pF
MHz
ns
ns
ns
ns
%
ps
ps
ps
ns
ns
ps
ps
dB
ms
ms
ABSOLUTE MAXIMUM RATINGS (note 1)
-0.5
0
DC CHARACTERISTICS (VDD = 3.3V or 2.5V unless noted)
AC CHARACTERISTICS (VDD = 3.3V or 2.5V unless noted)
Input Frequency
Output Clock Rise Time
0.8 to 2.0V
VDD HOST = 2.5V
HOST Output Clock Rise Time
Output Clock Fall Time
2.0 to 0.8V
VDD HOST = 2.5V
HOST Output Clock Fall Time
Output Clock Duty Cycle, all MHz clocks
At 1.5V
HOST1-4 Output to Output Skew
Rising edges at 1.5V
With proper HSKEW setting
Skew of HOST 5,7 with respect to HOST 1-4
PCI Output to Output Skew
Rising edges at 1.5V
Lead of EHOST6 outputs with respect to PCI
Rising edges at 1.5V
Lead of EHOST6 with respect to HOST1-5, 7
Rising edges at 1.5V
Cycle to Cycle Jitter, CPU Clocks
Absolute Clock Period Jitter, Other MHz Clocks,
except 14.318 MHz
EMI reduction, peaks of 5th - 19th odd harmonics
66.6 MHz clocks, LE=1
Power up time, STOP# going high to all clocks stable
Power on time, applied VDD to all clocks stable
Note 1.
45
49 to 51
1.9
3.9
1000
-500
6
8
12
500
11
20
25
Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged exposure to levels
above the operating limits but below the Absolute Maximums may affect device reliability.
MDS 1491-14 B
3
Revision 061801
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA •95126 • (408)295-9800tel • www.icst.com
MK1491-14
OPTi ACPI Firestar Clock Source
I/O Structure
The MK1491 provides more functionality in a 28 pin package by using a
unique I/O technique. The device checks the status of all I/O pins during
power-up. This status (pulled high or low) then determines the frequency
selections and power down modes (see the tables on page 2). Within 10ms
after power up, the inputs change to outputs and the clocks start up. In the
diagrams to the right, the 33Ω resistors are the normal output
termination resistors. The 10kΩ resistor pulls low to generate a logic
zero. Internal pull-up resistors are present on all inputs to generate a logic
one when an external pull-down resistor is not connected.
33Ω
For select
= 0 (low)
For select
= 1 (high)
I/O
10kΩ
to load
I/O
33Ω
to load
Package Outline and Package Dimensions
28 pin SSOP
Inches
Symbol
Min
0.061
0.008
0.007
0.385
0.150
0.230
Max
0.068
0.012
0.010
0.400
0.160
0.245
0.016
0.004
0.01
0.127
Millimeters
Min
1.55
0.203
0.190
3.810
5.840
Max
1.73
0.305
0.254
4.064
6.223
0.410
0.254
A
b
c
D
E
E
H
9.780 10.160
D
Q
e
c
h x 45°
A
H
e
h
Q
.025 BSC
0.635 BSC
b
Ordering Information
Part/Order Number
MK1491E-14R
MK1491E-14RTR
External Components
The MK1491 requires some inexpensive external components for proper operation. Decoupling capacitors of 0.1µF should be connected on
each VDD pin to ground, as close to the MK1491 as possible. A series termination resistor of 33Ω may be used for each clock output. See the
discussion on page 4 for other external resistors required for proper I/O operation. The 14.318 MHz oscillator has internal caps that provide
the proper load for a parallel resonant crystal with CL=18pF. For tuning with other values of CL, the formula 2•(C L-18) gives the value of each
capacitor that should be connected between X1 and ground and X2 and ground.
Marking
MK1491E-14R
MK1491E-14R
Low EMI Feature
Yes
Yes
Package
Temperature
28 pin SSOP
0-70°C
Add Tape & Reel
-
While the information presented herein has been checked for both accuracy and reliability, MicroClock Incorporated assumes no responsibility for either its use or for the
infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in
normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements
are not recommended without additional processing by MicroClock. MicroClock reserves the right to change any circuitry or specifications without notice. MicroClock does not
authorize or warrant any MicroClock product for use in life support devices or critical medical instruments.
Pentium is a trademark of Intel Corporation
MDS 1491-14 B
4
Revision 061801
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA •95126 • (408)295-9800tel • www.icst.com
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