19-3481; Rev 0; 10/04
1075ksps, 12-Bit, Parallel-Output ADCs with
±10V, ±5V, and 0 to +5V Analog Input Ranges
General Description
The MAX1307/MAX1311/MAX1315 12-bit, analog-to-digi-
tal converters (ADCs) feature a 1075ksps sampling rate, a
20MHz input bandwidth, and three analog input ranges.
The MAX1307 provides a 0 to +5V input range, with ±6V
fault-tolerant inputs. The MAX1311 provides a ±5V input
range with ±16.5V fault-tolerant inputs. The MAX1315 pro-
vides a ±10V input range with ±16.5V fault-tolerant inputs.
The MAX1307/MAX1311/MAX1315 include an on-chip
2.5V reference. These devices also accept an external
+2V to +3V reference.
All devices operate from a +4.75 to +5.25V analog sup-
ply, and a +2.7V to +5.25V digital supply. The devices
consume 36mA total supply current when fully opera-
tional. A 0.62µA shutdown mode is available to save
power during idle periods.
A 20MHz, 12-bit, parallel data bus provides the conver-
sion results. An internal 15MHz oscillator, or an externally
applied clock, drives conversions.
Each device is available in a 48-pin 7mm x 7mm
TQFP package and operates over the extended
(-40°C to +85°C) temperature range.
♦
±1 LSB INL, ±0.9 LSB DNL (max)
♦
84dBc SFDR, -86dBc THD, 71dB SINAD,
f
IN
= 500kHz at -0.4dBFS
♦
Extended Input Ranges
0 to +5V (MAX1307)
-5V to +5V (MAX1311)
-10V to +10V (MAX1315)
♦
Fault-Tolerant Inputs
±6V (MAX1307)
±16.5V (MAX1311/MAX1315)
♦
Fast 0.72µs Conversion Time
♦
12-Bit, 20MHz Parallel Interface
♦
Internal or External Clock
♦
+2.5V Internal Reference or +2.0V to +3.0V
External Reference
♦
+5V Analog Supply, +3V to +5V Digital Supply
36mA Analog Supply Current
1.3mA Digital Supply Current
Shutdown Mode
♦
48-Pin TQFP Package (7mm x 7mm Footprint)
Features
MAX1307/MAX1311/MAX1315
Applications
Industrial Process Control and Automation
Vibration and Waveform Analysis
Data-Acquisition Systems
Pin Configuration
DGND
DV
DD
Ordering Information
PART
TEMP RANGE
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
48 TQFP
48 TQFP
48 TQFP
MAX1307ECM
MAX1311ECM
MAX1315ECM
TOP VIEW
CHSHDN
SHDN
CLK
CONVST
CS
WR
RD
EOLC
EOC
48
47
46
45
44
43
42
41
40
39
38
AV
DD
AGND
AGND
AIN
I.C.
MSV
I.C.
I.C.
I.C.
I.C.
I.C.
I.C.
37
D11
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
36
35
34
33
32
31
30
29
28
27
26
25
MAX1307
MAX1311
MAX1315
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
DV
DD
Selector Guide
PART
MAX1307EC
MAX1311EC
MAX1315EC
INPUT
RANGE (V)
0 to +5
±5
±10
CHANNEL
COUNT
1
1
1
PKG
CODE
C48-6
C48-6
C48-6
INTCLK/EXTCLK
AGND
AV
DD
________________________________________________________________
Maxim Integrated Products
AGND
AV
DD
REF
MS
REF
REF+
COM
REF-
AGND
DGND
TQFP
1
For pricing delivery, and ordering information please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1075ksps, 12-Bit, Parallel-Output ADCs with
±10V, ±5V, and 0 to +5V Analog Input Ranges
MAX1307/MAX1311/MAX1315
ABSOLUTE MAXIMUM RATINGS
AV
DD
to AGND .........................................................-0.3V to +6V
DV
DD
to DGND.........................................................-0.3V to +6V
AGND to DGND.....................................................-0.3V to +0.3V
CH0, I.C. to AGND (MAX1307)..............................................±6V
CH0, I.C. to AGND (MAX1311) .............................................±16.5V
CH0, I.C. to AGND (MAX1315) .............................................±16.5V
D0–D11 to DGND ....................................-0.3V to (DV
DD
+ 0.3V)
EOC, EOLC, RD, WR, CS
to DGND .........-0.3V to (DV
DD
+ 0.3V)
CONVST, CLK, SHDN,
CHSHDN
to DGND...-0.3V to (DV
DD
+ 0.3V)
INTCLK/EXTCLK to AGND .......................-0.3V to (AV
DD
+ 0.3V)
REF
MS
, REF, MSV to AGND.....................-0.3V to (AV
DD
+ 0.3V)
REF+, COM, REF- to AGND.....................-0.3V to (AV
DD
+ 0.3V)
Maximum Current into Any Pin Except AV
DD
,
DV
DD
, AGND, DGND....................................................±50mA
Continuous Power Dissipation (T
A
= +70°C)
TQFP (derate 22.7mW/°C above +70°C) ................1818.2mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(AV
DD
= +5V, DV
DD
= +3V, AGND = DGND = 0, V
REF
= V
REFMS
= +2.5V (external reference), C
REF
= C
REFMS
= 0.1µF, C
REF+
=
C
REF-
= 0.1µF, C
REF+-to-REF-
= 2.2µF || 0.1µF, C
COM
= 2.2µF || 0.1µF, C
MSV
= 2.2µF || 0.1µF (unipolar devices), MSV = AGND (bipo-
lar devices), f
CLK
= 16.67MHz 50% duty cycle, INTCLK/EXTCLK = AGND (external clock), SHDN = DGND, T
A
= T
MIN
to T
MAX
,
unless otherwise noted. Typical values are at T
A
= +25°C.) (See Figures 3 and 4)
PARAMETER
STATIC PERFORMANCE (Note 1)
Resolution
Integral Nonlinearity
Differential Nonlinearity
Offset Error
Offset-Error Temperature Drift
Gain Error
Gain-Error Temperature Drift
DYNAMIC PERFORMANCE AT f
IN
= 500kHz, A
IN
= -0.4dBFS
Signal-to-Noise Ratio
Signal-to-Noise Plus Distortion
Total Harmonic Distortion
Spurious-Free Dynamic Range
ANALOG INPUTS (AIN)
MAX1307
Input Voltage
V
AIN
MAX1311
MAX1315
MAX1307
Input Resistance
(Note 2)
R
AIN
MAX1311
MAX1315
MAX1307
Input Current
(Note 2)
I
AIN
MAX1311
MAX1315
V
CH
= +5V
V
CH
= 0V
V
CH
= +5V
V
CH
= -5V
V
CH
= +10V
V
CH
= -10V
-1.13
-1.16
-0.157
0
-5
-10
7.58
8.66
14.26
0.54
-0.12
0.29
-0.87
0.56
-0.85
0.74
0.39
mA
0.72
kΩ
+5
+5
+10
V
SNR
SINAD
THD
SFDR
68
68
71
71
-86
84
-80
dB
dB
dBc
dBc
N
INL
DNL
No missing codes
Unipolar, 0x000 to 0x001
Bipolar, 0xFFF to 0x000
Unipolar, 0x000 to 0x001
Bipolar, 0xFFF to 0x000
12
±0.5
±0.3
±3
±3
7
7
±2
4
±16
±1.0
±0.9
±10
±15
Bits
LSB
LSB
LSB
ppm/°C
LSB
ppm/°C
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
2
_______________________________________________________________________________________
1075ksps, 12-Bit, Parallel-Output ADCs with
±10V, ±5V, and 0 to +5V Analog Input Ranges
ELECTRICAL CHARACTERISTICS (continued)
(AV
DD
= +5V, DV
DD
= +3V, AGND = DGND = 0, V
REF
= V
REFMS
= +2.5V (external reference), C
REF
= C
REFMS
= 0.1µF, C
REF+
=
C
REF-
= 0.1µF, C
REF+-to-REF-
= 2.2µF || 0.1µF, C
COM
= 2.2µF || 0.1µF, C
MSV
= 2.2µF || 0.1µF (unipolar devices), MSV = AGND (bipo-
lar devices), f
CLK
= 16.67MHz 50% duty cycle, INTCLK/EXTCLK = AGND (external clock), SHDN = DGND, T
A
= T
MIN
to T
MAX
,
unless otherwise noted. Typical values are at T
A
= +25°C.) (See Figures 3 and 4)
PARAMETER
Input Capacitance
TRACK/HOLD
External-Clock Throughput Rate
Internal-Clock Throughput Rate
Small-Signal Bandwidth
Full-Power Bandwidth
Aperture Delay
Aperture Jitter
INTERNAL REFERENCE
REF Output Voltage
Reference Output-Voltage
Temperature Drift
REF
MS
Output Voltage
REF+ Output Voltage
COM Output Voltage
REF- Output Voltage
Differential Reference Voltage
V
REFMS
V
REF+
V
COM
V
REF-
V
REF+
-
V
REF
-
V
REF
R
REF
V
REFMS
R
REFMS
V
REF+
V
COM
V
REF-
V
REF+
-
V
REF
-
V
IH
V
IL
20
(Note 5)
V
REF
= +2.5V
V
REF
= +2.5V
V
REF
= +2.5V
V
REF
= +2.5V
(Note 4)
2.0
2.0
2.475
V
REF
2.475
2.500
30
2.500
3.850
2.600
1.350
2.500
2.525
2.525
V
ppm/°C
V
V
V
V
V
t
AD
t
AJ
f
TH
f
TH
(Note 3)
(Note 3)
1075
983
20
20
8
50
ksps
ksps
MHz
MHz
ns
ps
RMS
SYMBOL
C
AIN
CONDITIONS
MIN
TYP
15
MAX
UNITS
pF
MAX1307/MAX1311/MAX1315
EXTERNAL REFERENCE (REF and REF
MS
are externally driven)
REF Input Voltage Range
REF Input Resistance
REF Input Capacitance
REF
MS
Input Voltage Range
REF
MS
Input Resistance
REF
MS
Input Capacitance
REF+ Output Voltage
COM Output Voltage
REF- Output Voltage
Differential Reference Voltage
2.5
5
15
2.5
5
15
3.850
2.600
1.350
2.500
3.0
3.0
V
kΩ
pF
V
kΩ
pF
V
V
V
V
DIGITAL INPUTS (RD,
WR, CS,
CLK, SHDN,
CHSHDN,
CONVST)
Input-Voltage High
Input-Voltage Low
Input Hysteresis
0.7 x DV
DD
0.3 x DV
DD
V
V
mV
_______________________________________________________________________________________
3
1075ksps, 12-Bit, Parallel-Output ADCs with
±10V, ±5V, and 0 to +5V Analog Input Ranges
MAX1307/MAX1311/MAX1315
ELECTRICAL CHARACTERISTICS (continued)
(AV
DD
= +5V, DV
DD
= +3V, AGND = DGND = 0, V
REF
= V
REFMS
= +2.5V (external reference), C
REF
= C
REFMS
= 0.1µF, C
REF+
=
C
REF-
= 0.1µF, C
REF+-to-REF-
= 2.2µF || 0.1µF, C
COM
= 2.2µF || 0.1µF, C
MSV
= 2.2µF || 0.1µF (unipolar devices), MSV = AGND (bipo-
lar devices), f
CLK
= 16.67MHz 50% duty cycle, INTCLK/EXTCLK = AGND (external clock), SHDN = DGND, T
A
= T
MIN
to T
MAX
,
unless otherwise noted. Typical values are at T
A
= +25°C.) (See Figures 3 and 4)
PARAMETER
Input Capacitance
Input Current
Input-Voltage High
Input-Voltage Low
Output-Voltage High
Output-Voltage Low
D0–D11 Tri-State Leakage Current
D0–D11 Tri-State Output
Capacitance
POWER SUPPLIES
Analog Supply Voltage
Digital Supply Voltage
Analog Supply Current
AV
DD
DV
DD
MAX1307
I
AVDD
MAX1311
MAX1315
MAX1307
Digital Supply Current
(C
LOAD
= 100pF) (Note 6)
Shutdown Current
(Note 7)
Power-Supply Rejection Ratio
I
DVDD
I
AVDD
I
DVDD
PSRR
MAX1311
MAX1315
SHDN = DV
DD
, V
CH
= float
SHDN = DV
DD
,
RD
=
WR
= high
AV
DD
= +4.75V to +5.25V
Internal clock, Figure 6
Time to Conversion Result
CONVST Pulse-Width Low
(Acquisition Time)
CS
to
RD
RD
to
CS
Data Access Time
(RD Low to Valid Data)
Bus Relinquish Time (RD High)
CLK Rise to
EOC
Delay
CLK Rise to
EOLC
Fall Delay
CONVST Fall to
EOLC
Rise Delay
t
CONV
External clock, Figure 7
Figures 6, 7 (Note 8)
Figures 6, 7
Figures 6, 7
Figures 6, 7
Figures 6, 7
Figure 7
Figure 7
5
20
20
20
0.1
(Note 9)
(Note 9)
30
30
4.75
2.70
36
34
34
1.3
1.3
1.3
0.6
0.02
50
800
12
1000.0
900
5.25
5.25
39
36
36
2.6
2.6
2.6
10
1
µA
dB
ns
CLK
cycles
µs
ns
ns
ns
ns
ns
ns
ns
mA
mA
V
V
SYMBOL
C
IN
I
IN
V
IH
V
IL
V
OH
V
OL
I
SOURCE
= 0.8mA, Figure 1
I
SINK
= 1.6mA, Figure 1
RD
= high or
CS
= high
RD
= high or
CS
= high
0.06
15
DV
DD
- 0.6
0.4
1
V
IN
= 0 or DV
DD
0.7 x AV
DD
0.3 x AV
DD
CONDITIONS
MIN
TYP
15
0.02
±1
MAX
UNITS
pF
µA
V
V
V
V
µA
pF
CLOCK-SELECT INPUT (INTCLK/EXTCLK)
DIGITAL OUTPUTS (D0–D11,
EOC, EOLC)
TIMING CHARACTERISTICS (Figure 1)
t
ACQ
t
CTR
t
RTC
t
ACC
t
REQ
t
EOCD
t
EOLCD
t
CVEOLCD
Figures 6, 7
4
_______________________________________________________________________________________
1075ksps, 12-Bit, Parallel-Output ADCs with
±10V, ±5V, and 0 to +5V Analog Input Ranges
ELECTRICAL CHARACTERISTICS (continued)
(AV
DD
= +5V, DV
DD
= +3V, AGND = DGND = 0, V
REF
= V
REFMS
= +2.5V (external reference), C
REF
= C
REFMS
= 0.1µF, C
REF+
=
C
REF-
= 0.1µF, C
REF+-to-REF-
= 2.2µF || 0.1µF, C
COM
= 2.2µF || 0.1µF, C
MSV
= 2.2µF || 0.1µF (unipolar devices), MSV = AGND (bipo-
lar devices), f
CLK
= 16.67MHz 50% duty cycle, INTCLK/EXTCLK = AGND (external clock), SHDN = DGND, T
A
= T
MIN
to T
MAX
,
unless otherwise noted. Typical values are at T
A
= +25°C.) (See Figures 3 and 4)
PARAMETER
EOC
Pulse Width
External CLK Period
External CLK High Period
External CLK Low Period
External Clock Frequency
Internal Clock Frequency
CONVST High to CLK Edge
SYMBOL
t
EOC
t
CLK
t
CLKH
t
CLKL
f
CLK
f
INT
t
CNTC
Figure 7
20
CONDITIONS
Internal clock, Figure 6
External clock, Figure 7
Figure 7
Logic sensitive to rising edges, Figure 7
Logic sensitive to rising edges, Figure 7
(Note 10)
0.05
20
20
0.1
15
20.0
MIN
50
1
10.00
TYP
MAX
UNITS
ns
CLK
cycles
µs
ns
ns
MHz
MHz
ns
MAX1307/MAX1311/MAX1315
Note 1:
For the MAX1307, V
IN
= 0 to +5V. For the MAX1311, V
IN
= -5V to +5V. For the MAX1315, V
IN
= -10V to +10V.
Note 2:
The analog input resistance is terminated to an internal bias point (Figure 5). Calculate the analog input current using:
I
AIN
=
V
AIN
−
V
BIAS
R
AIN
for AIN within the input voltage range.
Note 3:
Throughput rate is a function of clock frequency (f
CLK
). The external clock throughput rate is specified with f
CLK
=
16.67MHz and the internal clock throughput rate is specified with f
CLK
= 15MHz. See the
Data Throughput
section for more
information.
Note 4:
The REF input resistance is terminated to an internal +2.5V bias point (Figure 2). Calculate the REF input current using:
I
REF
=
V
REF
−
2.5V
R
REF
for V
REF
within the input voltage range.
Note 5:
The REF
MS
input resistance is terminated to an internal +2.5V bias point (Figure 2). Calculate the REF
MS
input current using:
I
REFMS
=
V
REFMS
−
2.5V
R
REFMS
for V
REFMS
within the input voltage range.
Note 6:
The analog input is driven with a -0.4dBFS 500kHz sine wave.
Note 7:
Shutdown current is measured with the analog input floating. The large amplitude of the maximum shutdown-current speci-
fication is due to automated test equipment limitations.
Note 8:
CONVST must remain low for at least the acquisition period. The maximum acquisition time is limited by internal capacitor droop.
Note 9:
CS
to
WR
and
CS
to
RD
are internally AND together. Setup and hold times do not apply.
Note 10:
Minimum CLK frequency is limited only by the internal T/H droop rate. Limit the time between the rising edge of CONVST
and the falling edge of
EOLC
to a maximum of 1ms.
_______________________________________________________________________________________
5
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