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CY62256VNLL-70ZXCT

产品描述SRAM 256Kb 70ns 32K x 8 Low Power SRAM
产品类别存储   
文件大小317KB,共17页
制造商Cypress(赛普拉斯)
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CY62256VNLL-70ZXCT概述

SRAM 256Kb 70ns 32K x 8 Low Power SRAM

CY62256VNLL-70ZXCT规格参数

参数名称属性值
Product AttributeAttribute Value
制造商
Manufacturer
Cypress(赛普拉斯)
产品种类
Product Category
SRAM
RoHSDetails
Memory Size256 kbit
Organization32 k x 8
Access Time70 ns
接口类型
Interface Type
Parallel
电源电压-最大
Supply Voltage - Max
3.6 V
电源电压-最小
Supply Voltage - Min
2.7 V
Supply Current - Max30 mA
最小工作温度
Minimum Operating Temperature
0 C
最大工作温度
Maximum Operating Temperature
+ 70 C
安装风格
Mounting Style
SMD/SMT
封装 / 箱体
Package / Case
TSOP-28
系列
Packaging
Cut Tape
系列
Packaging
MouseReel
系列
Packaging
Reel
数据速率
Data Rate
SDR
Memory TypeSDR
类型
Type
Asynchronous
Number of Ports1
Moisture SensitiveYes
工厂包装数量
Factory Pack Quantity
1500

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CY62256VN
256-Kbit (32 K × 8) Static RAM
256-Kbit (32 K × 8) Static RAM
Features
Functional Description
The CY62256VN family is composed of two high performance
CMOS static RAM’s organized as 32K words by 8 bits. Easy
memory expansion is provided by an active LOW chip enable
(CE) and active LOW output enable (OE) and tristate drivers.
These devices have an automatic power-down feature, reducing
the power consumption by over 99% when deselected.
An active LOW write enable signal (WE) controls the
writing/reading operation of the memory. When CE and WE
inputs are both LOW, data on the eight data input/output pins
(I/O
0
through I/O
7
) is written into the memory location addressed
by the address present on the address pins (A
0
through A
14
).
Reading the device is accomplished by selecting the device and
enabling the outputs, CE and OE active LOW, while WE remains
inactive or HIGH. Under these conditions, the contents of the
location addressed by the information on address pins are
present on the eight data input/output pins.
The input/output pins remain in a high impedance state unless
the chip is selected, outputs are enabled, and write enable (WE)
is HIGH.
For a complete list of related documentation, click
here.
Temperature ranges
Commercial: 0 °C to +70 °C
Industrial: –40 °C to +85 °C
Automotive-A: –40 °C to +85 °C
Automotive-E: –40 °C to +125 °C
Speed: 70 ns
Low voltage range: 2.7 V to 3.6 V
Low active power and standby power
Easy memory expansion with CE and OE features
TTL compatible inputs and outputs
Automatic power-down when deselected
CMOS for optimum speed and power
Available in standard Pb-free and non Pb-free 28-pin (300-mil)
narrow SOIC, 28-pin TSOP-I, and 28-pin reverse TSOP-I
packages
Logic Block Diagram
INPUTBUFFER
A
10
A
9
A
8
A
7
A
6
A
5
A
4
A
3
A
2
CE
WE
OE
A
14
A
13
A
12
A
11
A
1
A
0
ROW DECODER
I/O
0
I/O
1
SENSE AMPS
I/O
2
I/O
3
I/O
4
I/O
5
32K x 8
Y
ARRA
COLUMN
DECODER
POWER
DOWN
I/O
6
I/O
7
Cypress Semiconductor Corporation
Document Number: 001-06512 Rev. *H
198 Champion Court
San Jose
,
CA 95134-1709
408-943-2600
Revised January 16, 2015

CY62256VNLL-70ZXCT相似产品对比

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描述 SRAM 256Kb 70ns 32K x 8 Low Power SRAM SRAM 256Kb 70ns 32K x 8 Low Power SRAM SRAM 256Kb 70ns 32K x 8 Low Power SRAM SRAM 256Kb 70ns 32K x 8 Low Power SRAM

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