74HC125D,74HC126D
CMOS Digital Integrated Circuits
Silicon Monolithic
74HC125D,74HC126D
1. Functional Description
• Quad Bus Buffer, Non-Inverted 3-State Outputs
74HC125D: Quad Bus Buffer
74HC126D: Quad Bus Buffer
2. General
The 74HC125D,74HC126D are high speed CMOS QUAD BUS BUFFERs fabricated with silicon gate C
2
MOS
technology.
They achieve the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power
dissipation.
The 74HC125D requires the 3-state control input G to be set high to place the output into the high impedance
state, whereas the 74HC126D requires the control input to be set low to place the output into high impedance.
All inputs are equipped with protection circuits against static discharge or transient excess voltage.
3. Features
(1)
(2)
(3)
(4)
High speed: t
pd
= 10 ns (typ.) at V
CC
= 6.0 V
Low power dissipation: I
CC
= 4.0
µA
(max) at T
a
= 25
Balanced propagation delays: t
PLH
≈
t
PHL
Wide operating voltage range: V
CC(opr)
= 2.0 to 6.0 V
4. Packaging
SOIC14
Start of commercial production
©2016 Toshiba Corporation
1
2016-02
2016-08-04
Rev.4.0
74HC125D,74HC126D
5. Pin Assignment
74HC125D
74HC126D
6. Marking
74HC125D
74HC126D
7. IEC Logic Symbol
74HC125D
74HC126D
©2016 Toshiba Corporation
2
2016-08-04
Rev.4.0
74HC125D,74HC126D
8. Truth Table
Input G
(74HC125D)
H
L
L
Input G
(74HC126D)
L
H
H
Input A
X
L
H
Output Y
Z
L
H
X:
Z:
Don't care
High impedance
9. Absolute Maximum Ratings (Note)
Characteristics
Supply voltage
Input voltage
Output voltage
Input diode current
Output diode current
Output current
V
CC
/ground current
Power dissipation
Storage temperature
Symbol
V
CC
V
IN
V
OUT
I
IK
I
OK
I
OUT
I
CC
P
D
T
stg
(Note 1)
Note
Rating
-0.5 to 7.0
-0.5 to V
CC
+ 0.5
-0.5 to V
CC
+ 0.5
±20
±20
±35
±75
500
-65 to 150
Unit
V
V
V
mA
mA
mA
mA
mW
Note:
Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even
destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report
and estimated failure rate, etc).
Note 1: P
D
derates linearly with -8 mW/ above 85
10. Operating Ranges (Note)
Characteristics
Supply voltage
Input voltage
Output voltage
Operating temperature
Input rise and fall times
Symbol
V
CC
V
IN
V
OUT
T
opr
t
r
,t
f
Test Condition
Rating
2.0 to 6.0
0 to V
CC
0 to V
CC
-40 to 125
0 to 50
Unit
V
V
V
µs
Note:
The operating ranges must be maintained to ensure the normal operation of the device.
Unused inputs must be tied to either V
CC
or GND.
©2016 Toshiba Corporation
3
2016-08-04
Rev.4.0
74HC125D,74HC126D
11. Electrical Characteristics
11.1. DC Characteristics (Unless otherwise specified, T
a
= 25
)
Characteristics
High-level input voltage
Symbol
V
IH
Test Condition
V
CC
(V)
2.0
4.5
6.0
Low-level input voltage
V
IL
2.0
4.5
6.0
High-level output voltage
V
OH
V
IN
= V
IH
or V
IL
I
OH
= -20
µA
2.0
4.5
6.0
I
OH
= -6 mA
I
OH
= -7.8 mA
Low-level output voltage
V
OL
V
IN
= V
IH
or V
IL
I
OL
= 20
µA
4.5
6.0
2.0
4.5
6.0
I
OL
= 6 mA
I
OL
= 7.8 mA
3-state output OFF-state
leakage current
Input leakage current
Quiescent supply current
I
OZ
I
IN
I
CC
V
IN
= V
IH
or V
IL
V
OUT
= V
CC
or GND
V
IN
= V
CC
or GND
V
IN
= V
CC
or GND
4.5
6.0
6.0
6.0
6.0
Min
1.50
3.15
4.20
1.9
4.4
5.9
4.18
5.68
Typ.
2.0
4.5
6.0
4.31
5.80
0.0
0.0
0.0
0.17
0.18
Max
0.50
1.35
1.80
0.1
0.1
0.1
0.26
0.26
±0.5
±0.1
4.0
µA
µA
µA
V
V
V
Unit
V
11.2. DC Characteristics (Unless otherwise specified, T
a
= -40 to 85
)
Characteristics
High-level input voltage
Symbol
V
IH
Test Condition
V
CC
(V)
2.0
4.5
6.0
Low-level input voltage
V
IL
2.0
4.5
6.0
High-level output voltage
V
OH
V
IN
= V
IH
or V
IL
I
OH
= -20
µA
2.0
4.5
6.0
I
OH
= -6 mA
I
OH
= -7.8 mA
Low-level output voltage
V
OL
V
IN
= V
IH
or V
IL
I
OL
= 20
µA
4.5
6.0
2.0
4.5
6.0
I
OL
= 6 mA
I
OL
= 7.8 mA
3-state output OFF-state
leakage current
Input leakage current
Quiescent supply current
I
OZ
I
IN
I
CC
V
IN
= V
IH
or V
IL
V
OUT
= V
CC
or GND
V
IN
= V
CC
or GND
V
IN
= V
CC
or GND
4.5
6.0
6.0
6.0
6.0
Min
1.50
3.15
4.20
1.9
4.4
5.9
4.13
5.63
Max
0.50
1.35
1.80
0.1
0.1
0.1
0.33
0.33
±5.0
±1.0
40.0
µA
µA
µA
V
V
V
Unit
V
©2016 Toshiba Corporation
4
2016-08-04
Rev.4.0
74HC125D,74HC126D
11.3. DC Characteristics (Unless otherwise specified, T
a
= -40 to 125
)
Characteristics
High-level input voltage
Symbol
V
IH
Test Condition
V
CC
(V)
2.0
4.5
6.0
Low-level input voltage
V
IL
2.0
4.5
6.0
High-level output voltage
V
OH
V
IN
= V
IH
or V
IL
I
OH
= -20
µA
2.0
4.5
6.0
I
OH
= -6 mA
I
OH
= -7.8 mA
Low-level output voltage
V
OL
V
IN
= V
IH
or V
IL
I
OL
= 20
µA
4.5
6.0
2.0
4.5
6.0
I
OL
= 6 mA
I
OL
= 7.8 mA
3-state output OFF-state
leakage current
Input leakage current
Quiescent supply current
I
OZ
I
IN
I
CC
V
IN
= V
IH
or V
IL
V
OUT
= V
CC
or GND
V
IN
= V
CC
or GND
V
IN
= V
CC
or GND
4.5
6.0
6.0
6.0
6.0
Min
1.50
3.15
4.20
1.9
4.4
5.9
3.7
5.2
Max
0.50
1.35
1.80
0.1
0.1
0.1
0.4
0.4
±10.0
±1.0
160.0
µA
µA
µA
V
V
V
Unit
V
11.4. AC Characteristics (Unless otherwise specified, T
a
= 25
, Input: t
r
= t
f
= 6 ns)
Characteristics
Output transition time
Symbol
t
TLH
,t
THL
Note
Test Condition
C
L
(pF)
50
V
CC
(V)
2.0
4.5
6.0
Propagation delay time
t
PLH
,t
PHL
50
2.0
4.5
6.0
150
2.0
4.5
6.0
Output enable time
t
PZL
,t
PZH
R
L
= 1 kΩ
50
2.0
4.5
6.0
150
2.0
4.5
6.0
Output disable time
t
PLZ
,t
PHZ
R
L
= 1 kΩ
50
2.0
4.5
6.0
Input capacitance
Output capacitance
Power dissipation capacitance
C
IN
C
OUT
C
PD
(Note 1)
Min
Typ.
20
6
5
30
11
10
42
14
12
30
11
10
42
14
12
24
12
10
5
3
23
Max
60
12
10
90
18
15
130
26
22
90
18
15
130
26
22
100
20
17
10
pF
pF
pF
ns
ns
ns
Unit
ns
Note 1: C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating current
consumption without load. Average operating current can be obtained by the equation.
I
CC(opr)
= C
PD
×
V
CC
×
f
IN
+ I
CC
/4 (per gate)
©2016 Toshiba Corporation
5
2016-08-04
Rev.4.0
微控制器 MCU
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