HCF4516BEY: 产品描述Counter Shift Registers Preset Up/Dwn Countr; 产品类别逻辑逻辑; 文件大小508KB，共11页; 制造商ST(意法半导体); 官网地址http://www.st.com/; 标准

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HCF4516BEY概述

Counter Shift Registers Preset Up/Dwn Countr

HCF4516BEY规格参数

参数名称	属性值
是否Rohs认证	符合
厂商名称	ST(意法半导体)
零件包装代码	DIP
包装说明	PLASTIC, DIP-16
针数	16
Reach Compliance Code	compliant
Is Samacsys	N
其他特性	TCO OUTPUT
计数方向	BIDIRECTIONAL
系列	4000/14000/40000
JESD-30 代码	R-PDIP-T16
JESD-609代码	e3
负载电容（CL）	50 pF
负载/预设输入	YES
逻辑集成电路类型	BINARY COUNTER
最大频率@ Nom-Sup	2000000 Hz
工作模式	SYNCHRONOUS
位数	4
功能数量	1
端子数量	16
最高工作温度	125 °C
最低工作温度	-55 °C
封装主体材料	PLASTIC/EPOXY
封装代码	DIP
封装等效代码	DIP16,.3
封装形状	RECTANGULAR
封装形式	IN-LINE
包装方法	TUBE
峰值回流温度（摄氏度）	245
电源	5/15 V
传播延迟（tpd）	400 ns
认证状态	Not Qualified
座面最大高度	5.1 mm
最大供电电压 (Vsup)	20 V
最小供电电压 (Vsup)	3 V
标称供电电压 (Vsup)	5 V
表面贴装	NO
技术	CMOS
温度等级	MILITARY
端子面层	Matte Tin (Sn)
端子形式	THROUGH-HOLE
端子节距	2.54 mm
端子位置	DUAL
处于峰值回流温度下的最长时间	NOT SPECIFIED
触发器类型	POSITIVE EDGE
宽度	7.62 mm
最小 fmax	5.5 MHz
Base Number Matches	1

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HCF4516B

PRESETTABLE BINARY UP/DOWN COUNTER

MEDIUM SPEED OPERATION :

8 MHz (Typ.) at 10V

SYNCHRONOUS INTERNAL CARRY

PROPAGATION

RESET AND PRESET CAPABILITY

STANDARDIZED SYMMETRICAL OUTPUT

CHARACTERISTICS

QUIESCENT CURRENT SPECIF. UP TO 20V

5V, 10V AND 15V PARAMETRIC RATINGS

INPUT LEAKAGE CURRENT

= 100nA (MAX) AT V

= 18V T

= 25°C

100% TESTED FOR QUIESCENT CURRENT

MEETS ALL REQUIREMENTS OF JEDEC

JESD13B "STANDARD SPECIFICATIONS

FOR DESCRIPTION OF B SERIES CMOS

DEVICES"

DIP

ORDER CODES

PACKAGE

DIP

TUBE

HCF4516BEY

DESCRIPTION

HCF4516B is a monolithic integrated circuit

fabricated in Metal Oxide Semiconductor

technology available in DIP package.

It is a PRESETTABLE BINARY UP/DOWN

COUNTER, consists of four synchronously

clocked D-type flip-flops (with a gating structure to

provide T-type flip-flop capability) connected as a

counter. This counter can be cleared by a high

level on the RESET line, and can be preset to any

binary number present on the jam inputs by a high

PIN CONNECTION

-O

level on the PRESET ENABLE line. Synchronous

cascading is accomplished by connecting all clock

inputs in parallel and connecting the CARRY OUT

of a less significant stage to the CARRY IN of a

more significant stage. HCF4516B can be

cascaded in the ripple mode by connecting all

clock inputs in parallel and connecting the CARRY

OUT to the clock of the next stage. If the UP/

DOWN input changes during a terminal count, the

CARRY OUT must be gated with the clock, and

the UP/DOWN input must change while the clock

is high. This method provides a clean clock signal

to the subsequent counting stage.

T&R

September 2002

1/11

HCF4516BEY

HCF4516BEY在线购买

HCF4516BEY概述

HCF4516BEY规格参数

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