Ordering number : ENN7632
LC75700T
CMOS IC
Key Scan IC
Overview
http://onsemi.com
The LC75700T is a key scanning LSI that accepts input from up to 30 keys and can control up to four general
purpose output ports. Therefore it can reduce the number of lines to the front panel in application systems.
Features
Key input function for up to 30 keys.
General-purpose output ports for up to four pins.
A key scan is performed only when a key is pressed, and thus power dissipation is reduced.
Serial data I/O supports CCB format communication with the system controller.
Switching between the key scan output port and general purpose output port functions can be controlled by the
control data.
The RES pin is provided. This pin disables key scanning, and forces the general-purpose output ports to the low
level.
RC oscillator circuit
TSSOP20(225mil)
ORDERING INFORMATION
Device
LC75700T-MPB-E
LC75700T-TLM-E
LC75700TS-MPB-E
LC75700TS-TLM-E
Package
TSSOP20(225mil)
(Pb-Free)
TSSOP20(225mil)
(Pb-Free)
TSSOP20(225mil)
(Pb-Free)
TSSOP20(225mil)
(Pb-Free)
Shipping (Qty / Packing)
70 / Fan-Fold
2000 / Tape &Reel
70 / Fan-Fold
2000 / Tape &Reel
CCB is ON Semiconductor® ’s original format. All addresses are managed
by ON Semiconductor® for this format.
CCB is a registered trademark of Semiconductor Components Industries, LLC.
Semiconductor Components Industries, LLC, 2013
October, 2013
13004TN(OT) No.7632-1/16
LC75700T
Specifications
Absolute Maximum Ratings
at Ta = 25°C, V
SS
= 0 V
Parameter
Maximum supply voltage
Input voltage
Symbol
V
DD
max
V
IN
1
V
IN
2
V
OUT
1
V
OUT
2
I
OUT
1
I
OUT
2
Pd max
Topr
Tstg
V
DD
CE, CL, DI, RES
OSC, KI1 to KI5
DO
OSC, KS1 to KS6, P1 to P4
KS1 to KS6
P1 to P4
Ta = 85°C
Conditions
Ratings
–0.3 to +7.0
–0.3 to +7.0
–0.3 to V
DD
+ 0.3
–0.3 to +7.0
–0.3 to V
DD
+ 0.3
1
5
150
–40 to +85
–50 to +150
Unit
V
V
Output voltage
V
Output current
Allowable power dissipation
Operating temperature
Storage temperature
mA
mW
°C
°C
Allowable Operating Ranges
at Ta = –40 to +85°C, V
SS
= 0 V
Parameter
Supply voltage
Input high level voltage
Input low level voltage
Recommended external resistance
Recommended external capacitance
Guaranteed oscillator range
Low level clock pulse width
High level clock pulse width
Data setup time
Data hold time
CE wait time
CE setup time
CE hold time
DO output delay time
DO rise time
Symbol
V
DD
V
IH
1
V
IH
2
V
IL
Rosc
Cosc
fosc
tøL
tøH
tds
tdh
tcp
tcs
tch
tdc
tdr
V
DD
CE, CL, DI, RES
KI1 to KI5
CE, CL, DI, RES, KI1 to KI5
OSC
OSC
OSC
CL
CL
DI, CL
DI, CL
CE, CL
CE, CL
CE, CL
See figure 1.
See figure 1.
See figure 1.
See figure 1.
See figure 1.
See figure 1.
See figure 1.
19
160
160
160
160
160
160
160
1.5
1.5
Conditions
Ratings
min
2.7
0.8 V
DD
0.6 V
DD
0
39
1000
38
76
typ
5.0
max
5.5
5.5
V
DD
0.2 V
DD
Unit
V
V
V
kΩ
pF
kHz
ns
ns
ns
ns
ns
ns
ns
µs
µs
DO R
PU
= 4.7 kΩ, C
L
= 10 pF*1 See figure 1.
DO R
PU
= 4.7 kΩ, C
L
= 10 pF*1 See figure 1.
Note:
*1.
Since DO is an open-drain output, these times depend on the values of the pull-up resistor R
PU
and the load capacitance C
L
.
No. 7632-2/16
LC75700T
Electrical Characteristics
in the Allowable Operating Ranges
Parameter
Hysteresis
Input high level current
Input low level current
Input floating voltage
Pull-down resistance
Output off leakage current
Symbol
VH
I
IH
I
IL
V
IF
R
PD
I
OFFH
Pin Name
CE, CL, DI, RES, KI1 to KI5
CE, CL, DI, RES
CE, CL, DI, RES
KI1 to KI5
KI1 to KI5
DO
V
DD
= 5.0 V
V
DD
= 3.0 V
V
O
= 5.5 V
V
DD
= 3.6 V to 5.5 V
I
O
= –500 µA
V
DD
= 2.7 V to 3.6 V
I
O
= –250 µA
I
O
= –1 mA
V
DD
= 3.6 V to 5.5 V
I
O
= 25 µA
V
DD
= 2.7 V to 3.6 V
I
O
= 12.5 µA
I
O
= 1 mA
I
O
= 1 mA
Rosc = 39 kΩ
Cosc = 1000 pF
Key scan standby state
V
DD
= 5.5 V
Output open
fosc = 38 kHz
200
30.4
0.1
38
V
DD
– 1.0
V
DD
– 0.8
V
DD
– 0.9
0.2
0.1
0.5
0.4
1.5
1.2
0.9
0.5
45.6
5
400
µA
kHz
V
V
DD
– 0.5
V
DD
– 0.4
50
100
100
200
V
I
= 5.5 V
V
I
= 0 V
–5
0.05 V
DD
250
500
6
V
DD
– 0.2
V
DD
– 0.1
V
Conditions
Ratings
min
typ
0.1 V
DD
5
max
Unit
V
µA
µA
V
kΩ
µA
Output high level voltage
V
OH
1
KS1 to KS6
V
OH
2
P1 to P4
V
OL
1
Output low level voltage
V
OL
2
V
OL
3
Oscillator frequency
fosc
I
DD
1
Current drain
I
DD
2
KS1 to KS6
P1 to P4
DO
OSC
V
DD
V
DD
Pin Assignment
20
11
LC75700T
1
KI1
KI2
KI3
KI4
KI5
KS2
KS1
KS3
P4/KS4
10
P3/KS5
KS6/P2
OSC
VDD
RES
VSS
DO
CE
CL
P1
DI
Top view
No. 7632-3/16
LC75700T
1. When CL is stopped at the low level
VIH1
CE
tøH
CL
VIH1
50%
VIL
VIL
tøL
t
cp
DI
VIH1
VIL
t
cs
t
ch
t
ds
DO
t
dh
D0
td
c
D1
t
dr
2. When CL is stopped at the high level
CE
tøL
CL
VIH1
50%
VIL
VIH1
VIL
tøH
t
cp
DI
VIH1
VIL
t
cs
t
ch
t
ds
DO
t
dh
D0
t
dc
D1
td
r
Figure 1
No. 7632-4/16
LC75700T
Block Diagram
KS3
KS4/P4
KS5/P3
KS6/P2
KS1
KS2
KI1
KI2
KI3
KI4
KI5
VDD
VSS
KEY SCAN
KEY BUFFER
GENERAL PORT
OSC
CLOCK
GENERATOR
CONTROL REGISTER
CCB
INTERFACE
SHIFT REGISTER
DO
DI
CL
CE
RES
P1
No. 7632-5/16
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