Stepping Motor Driver Series
Standard 36V
Stepping Motor Drivers
BD63801EFV
No.12009EAT07
●Description
BD63801EFV is rated 24V system maximum input voltage / 0.8A maximum output current and employs a constant-current
PWM control scheme for low power consumption.
Serial (CLK-IN) drive mode allows for simple interfacing and operation, while allowing for full and half excitation modes. The
single-power supply configuration allows for easy design and layout in the application.
●Feature
1) Power supply: one system drive (19V½28V)
2) Low ON resistance DMOS output
3) Serial (CLK-IN) drive mode
4) PWM constant current control (self oscillation)
5) Built-in spike noise cancel function (external noise filter is unnecessary)
6) FULL STEP applicable to HALF STEP
7) Normal / Reverse rotation switching function
8) Power save function*
9) Built-in logic input pull-down resistor
10) Power-on reset function
11) Thermal shutdown circuit (TSD)
12) Over current protection circuit (OCP)
13) Under voltage lock out circuit (UVLO)
14) Over voltage lock out circuit (OVLO)
15) Malfunction prevention at the time of no applied power supply (Ghost Supply Prevention)
16) Electrostatic discharge: 4kV (HBM specification)
17) Microminiature, ultra-slim and high heat-radiation (exposed metal type) HTSSOP package
18) Function pin compatible with constant current 2ch 36V Simple Stepping Motor Driver Series
●Application
PPC, Laser beam printer, Scanner, Photo printer, FAX, Ink jet printer, Mini printer, Sewing machine, Toy, and Robot etc.
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2012.02 - Rev.A
BD63801EFV
●Absolute
maximum ratings(Ta=25℃)
Item
Supply voltage
Power dissipation
Input voltage for control pin
RNF maximum voltage
Maximum output current
Operating temperature range
Storage temperature range
Junction temperature
Symbol
V
CC1,2
Pd
V
IN
V
RNF
I
OUT
T
opr
T
stg
T
jmax
BD63801EFV
-0.2½+36.0
1
1.1
※
4.0
※
2
-0.2½+5.5
0.5
0.8
※
3
-25½+85
-55½+150
+150
Technical Note
Unit
V
W
V
V
A/phase
℃
℃
℃
※1
70mm×70mm×1.6mm glass epoxy board. Derating in done at 8.8mW/℃ for operating above Ta=25℃.
※2
4-layer recommended board. Derating in done at 32.0mW/℃ for operating above Ta=25℃.
※3
Do not, however exceed Pd, ASO and Tjmax=150℃.
●Operating
conditions(Ta= -25½+85℃)
Item
Supply voltage
Output current (DC)
※4
Do not however exceed Pd, ASO.
Symbol
V
CC1,2
I
OUT
BD63801EFV
19½28
0.5
※
4
Unit
V
A/phase
●Electrical
characteristics
Applicable to all the series (Unless otherwise specified Ta=25℃, V
cc1,2
=24V)
Item
Symbol
Min.
-
-
2.0
-
-
Limit
Typ.
0.6
2.7
-
-
33
Max.
2.0
7.0
-
0.8
50
Unit
Condition
Whole
Circuit current at standby
I
CCST
Circuit current
I
CC
Control input (CLK, FR, MODE, EN, PS)
H level input voltage
V
INH
L level input voltage
V
INL
H level input current
I
INH
Output (OUT1A, OUT1B, OUT2A, OUT2B)
Output ON resistance
Output leak current
Current control
RNFX input current
VREFX input current
VREFX input voltage range
Comparator offset
Minimum on time
R
ON
I
LEAK
I
RNFX
I
VREF
V
REF
V
COFS
T
ONMIN
mA
mA
V
V
μA
PS=L
PS=H, VREF=0.4V
V
IN
=3.3V
I
OUT
=0.3A
Sum of upper and lower
-
-
-40
-2.0
0
-20
0.3
2.8
-
-20
-0.1
-
0
0.7
3.6
10
-
-
0.4
20
1.2
Ω
μA
μA
μA
V
mV
μs
RNFX=0V
VREFX=0V
VREFX=0.4V
R=39kΩ, C=1000pF
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2/8
2012.02 - Rev.A
BD63801EFV
●Terminal
function
½Block
diagram½Application circuit diagram
Pin
No.
1
2
3
4
5
6
7
8
9
10
11
12
Pin
No.
13
14
15
16
17
18
19
20
21
22
23
24
Technical Note
Pin name
PGND
EN
VREF2
CR2
NC
TEST
GND
PS
CR1
VREF1
MODE
NC
Ground terminal
Function
Pin name
CLK
PGND
VCC1
OUT1A
RNF1
OUT1B
OUT2B
RNF2
OUT2A
VCC2
NC
FR
Function
Clock input terminal
(for advancing electrical angle)
Ground terminal
Power supply terminal
H bridge output terminal
Connection terminal of resistor for output
current detection
H bridge output terminal
H bridge output terminal
Connection terminal of resistor for output
current detection
H bridge output terminal
Power supply terminal
Non connection
Motor rotating direction setting terminal
Output enable terminal
Output current value setting terminal
Connection terminal of CR for setting
PWM frequency
Non connection
Terminal for testing
(used by connecting with GND)
Ground terminal
Power save terminal
Connection terminal of CR for setting
PWM frequency
Output current value setting terminal
Motor excitation mode setting terminal
Non connection
CLK 13
Set the PWM frequency.
Setting range is
C:470pF½4700pF
R:10kΩ½100kΩ
FR 24
MODE 11
EN 2
Regulator
Trans-
lator
TSD
RESET
8 PS
Terminal for testing.
Please connect to GND.
6
TEST
OVLO
trigger
UVLO
Resistor for current detection.
Setting range is
0.2Ω½0.9Ω
CR1
9
39kΩ
1000pF
VREF1 10
ONE
SHOT
15
VCC1
OUT1A
OUT1B
RNF1
LOGIC
16
Predriver
18
17
Current
Limit
Comp.
CR2 4
0.3Ω
OCP
22 VCC2
Be sure to short VCC1 &
VCC2
39kΩ
1000pF
VREF2 3
ONE
SHOT
LOGIC
21
OUT2A
0.1uF
100uF
Predriver
19 OUT2B
20 RNF2
Set the PWM frequency.
Setting range is
C:470pF½4700pF
R:10kΩ½100kΩ
PGND
PGND
GND
1
14
7
Current
Limit
Comp.
0.3Ω
OCP
Bypass capacitor.
Setting range is
100uF½470uF(electrolytic)
0.01uF½0.1uF(multilayer ceramic etc.)
Resistor for current detection.
Setting range is
0.2Ω½0.9Ω
Fig.1 Block diagram & Application circuit diagram
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3/8
2012.02 - Rev.A
BD63801EFV
Technical Note
●Points
to notice for terminal description
○CLK(pin13)/Clock
input terminal for advancing the electrical angle
CLK is reflected at rising edge. The Electrical angle advances by one for each CLK input.
Motor’s misstep will occur if noise is picked up at the CLK terminal, so please design the pattern in such a way that
there is no noise plunging.
○MODE(pin11)/Motor
excitation mode setting terminal
Set the motor excitation mode.
MODE
Excitation mode
L
H
FULL STEP
HALF STEP A
○FR(pin24)/Motor
rotating direction setting terminal
Set the motor’s rotating direction. Change in setting is reflected at the CLK’s rising edge immediately after the change
in setting
CW_CCW
Rotating direction
L
H
Clockwise (CH2’s current is outputted with a phase lag of 90°in regard to CH1’s current)
Counter Clockwise(CH2’s current is outputted with a phase lead of 90°in regard to CH1’s current)
○ENABLE(pin2)/Output
enable terminal
Turn off forcibly all the output transistors (motor output is open).
At the time of ENABLE=L, electrical angle or operating mode is maintained even if CLK is inputted.
Please be careful because the electrical angle at the time of ENABLE being released (ENABLE=L→H) is different from
the released occasion at the section of CLK=H and from the released occasion at the section of CLK=L .
ENABLE
Motor output
L
H
OPEN (electrical angle maintained)
ACTIVE
○PS(pin8)/Power
save terminal
PS can make circuit standby state and make motor output OPEN. In standby state, translator circuit is reset (initialized)
and electrical angle is initialized.
Please be careful because there is a delay of 40μs(Max.) before it is returned from standby state to normal state and
the motor output becomes ACTIVE.
PS
State
L
Standby state (RESET)
H
ACTIVE
The electrical angle (initial electrical angle) of each excitation mode immediately after RESET is as follows Please be
careful because the initial state at the time of FULL STEP is different from HALF STEP.
Excitation mode
Initial electrical angle
FULL STEP
HALFSTEP A
45°
0°
●Protection
Circuits
○Thermal
shutdown (TSD)
This IC features an integrated thermal shutdown for protection against thermal destruction. When the IC’s chip
temperature rises above 175°C (Typ.), the motor output is forced open. When the temperature returns to 150°C or
less (Typ.), the IC automatically resumes normal operation. However, even if TSD has engaged, the IC may become
damaged if heat continues to be absorbed from an external source.
○Over-current
protection (OCP)
This IC features an integrated over-current protection circuit to protect against destruction if the motor outputs are
shorted to one another, if VCC is shorted to the motor output, or if the motor output is shorted to GND. The circuit
latches the motor output open if current flows above the maximum threshold for 4 µS (Typ.), and is disengaged when
the IC is power-cycled or if the PS terminal is reset. The OCP circuitry is designed only to protect the IC from irregular
conditions (such as motor output shorts) and is not designed to be used as an active security device for the application.
Therefore, applications should not be designed under the assumption that this circuitry will engage. After OCP has
engaged, if irregular conditions continue after a power cycle or PS pin reset, OCP may engage repeatedly, causing the
IC to generate heat or otherwise suffer damage. If the inductance of the IC’s input/output wiring is large (e.g., due to
long trace length), overload current may flow into the wiring before OCP engages, causing a jump in voltage on the
input/output pin that may exceed the IC’s absolute maximum rating and damage the IC. Additionally, if the IC
conducts a current through the output that is larger than the specified output current rating but lower than the OCP
threshold, the IC may heat up beyond its maximum rating (Tjmax = 150°C) and destroy itself. Therefore, ensure that
the set output current does not exceeds the IC’s maximum output rating.
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2012.02 - Rev.A
BD63801EFV
Technical Note
○Under-voltage
lockout (UVLO)
This IC features an integrated under-voltage lockout function to prevent against output when powered by an insufficient
supply voltage. If the supply voltage connected to the VCC terminal drops below 15 V (Typ.), the motor output is
forced open. This switching voltage threshold has a hysteresis of 1 V (Typ.) to prevent malfunction due to noise on
the input. This circuit does not function in power-save mode. Also, when driving the IC in serial (CLK-in) mode, the
output angle is reinitialized to the default angle upon release of the UVLO circuitry.
○Over-voltage
lockout (OVLO)
This IC features an integrated over-voltage lockout function to prevent against output when powered by a supply
voltage exceeding the rated input voltage range. If the supply voltage connected to the VCC terminal reaches 32 V
(Typ.), the motor output is forced open. This switching voltage threshold has a hysteresis of 1 V (Typ.) and a
noise-masking period of 4 µs (Typ.) to prevent malfunction due to noise on the input. Although the IC features this
integrated protection device, it may still be destroyed if the input voltage exceeds the IC’s absolute maximum ratings.
This circuit does not operate in power-save mode.
○Ghost
supply prevention
This IC features integrated ghost supply protection circuitry, which prevents the IC from being powered by a logic input
when the power supply is disconnected or grounded. This circuitry prevents current from flowing through the
integrated ESD protection diodes (located between logic input pins and the VCC pin), ensuring that the IC itself or any
other peripherals connected to the VCC pin cannot be powered by an input signal on any logic terminals. Therefore,
the circuit will not malfunction if a logic signal is input to the IC while the power supply is disconnected or grounded.
●
Power dissipation
○
HTSSOP-B24 package
The HTSSOP-B24 package features a heat-radiating metal slag mounted on the backside of the IC. Ensure that the
PCB design incorporates large areas of copper to facilitate heat dissipation as much as possible. As the heat slag is
shorted with the substrate of the IC die, ensure that the slag is connected to GND. Connecting the slag to a potential
other than GND will cause the chip to malfunction. Also ensure that the backside of the chip is completely and firmly
soldered onto the PCB. The ratings specified in this sheet assume the IC has been properly mounted and soldered,
and that the PCB has been adequately designed to facilitate heat dissipation.
Measurement machine:TH156(Kuwano Electric)
Measurement condition:ROHM board
3
Board size:70*70*1.6mm
(With through holes on the board)
The exposed metal of the backside is connected to the board with
solder.
2
Board①:1-layer board(Copper foil on the back 0mm )
2
Board②:2-layer board(Copper foil on the back 15*15mm )
2
Board③:2-layer board(Copper foil on the back 70*70mm )
2
Board④:4-layer board(Copper foil on the back 70*70mm )
Board①:θ
ja
=
113.6℃/W
Board②:θ
ja
=
73.5℃/W
Board③:θ
ja
=
44.6℃/W
Board④:θ
ja
=
31.3℃/W
4.0
4.0W
4
3.0
Power Dissipation : Pd[W]
2.8W
3
2.0
1.7W
2
1
1.1W
1.0
0
100
125
Fig.2 HTSSOP-B24 Derating curve
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2012.02 - Rev.A