LTC4260
Positive High Voltage
Hot Swap Controller with
I
2
C Compatible Monitoring
FEATURES
■
■
■
■
■
■
■
■
■
■
DESCRIPTIO
Allows Safe Insertion into Live Backplane
8-Bit ADC Monitors Current and Voltage
I
2
C
TM
/SMBus Interface
Wide Operating Voltage Range: 8.5V to 80V
High Side Drive for External N-Channel MOSFET
Input Overvoltage/Undervoltage Protection
Optional Latchoff or Autoretry After Faults
Alerts Host After Faults
Foldback Current Limiting
Available in 24-Lead SO, 24-Lead Narrow
SSOP and 32-Lead (5mm
×
5mm) QFN Packages
The LTC
®
4260 Hot Swap
TM
controller allows a board to be
safely inserted and removed from a live backplane. Using
an external N-channel pass transistor, the board supply
voltage can be ramped up at an adjustable rate. An I
2
C
interface and onboard ADC allow monitoring of board
current, voltage and fault status.
The device features adjustable analog foldback current
limit with latch off or automatic restart after the LTC4260
remains in current limit beyond an adjustable time-out
delay.
The controller has additional features to interrupt the host
when a fault has occurred, notify when output power is
good, detect insertion of a load card and power-up in either
the on or off state.
, LTC and LT are registered trademarks of Linear Technology Corporation.
Hot Swap is a trademark of Linear Technology Corporation.
I
2
C is a trademark of Philips Electronics N.V.
APPLICATIO S
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■
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Electronic Circuit Breakers
Live Board Insertion
Computers, Servers
TYPICAL APPLICATIO
48V
49.9k
0.1µF
CONNECTOR 2
CONNECTOR 1
3A, 48V Card Resident Application
0.010Ω
FDB3632
+
C
L
10Ω
100k
6.8nF
UV V
DD
SENSE GATE
OV
SDAO
SDAI
LTC4260
SCL
ALERT
ON
INTV
CC
TIMER
0.1µF
68nF
SOURCE
FB
BD_PRST
ADIN
GND
GPIO
4260 TA01
V
OUT
48V
43.5k
3.57k
V
IN
50V/DIV
I
IN
2A/DIV
1.74k
2.67k
*
V
OUT
50V/DIV
SDA
SCL
ALERT
24k
GPIO
5V/DIV
GND
BACKPLANE PLUG-IN
CARD
*DIODES INC. SMBT70A
U
Power Up Waveforms
C
L
= 1000µF
25ms/DIV
4260 TA02
U
U
4260f
1
LTC4260
ABSOLUTE
AXI U
RATI GS
(Notes 1, 2)
ALERT, SDAO ........................................... –0.3V to 6.5V
Supply Voltage (INTV
CC
) ......................... –0.3V to 6.2V
Operating Temperature Range
LTC4260C ............................................... 0°C to 70°C
LTC4260I ............................................. –40°C to 85°C
Storage Temperature Range
GN, SW Packages ............................. – 65°C to 150°C
UH Package ...................................... – 65°C to 125°C
Lead Temperature (Soldering, 10 sec)
GN, SW Packages Only..................................... 300°C
Supply Voltages (V
DD
) ............................ – 0.3V to 100V
Input Voltages
SENSE ............................ V
DD
– 10V or – 0.3V to V
DD
SOURCE .......................... GATE – 5V to GATE + 0.3V
BD_PRST, FB, ON, OV, UV ................... –0.3V to 12V
ADR0-ADR2, TIMER, ADIN ..... –0.3V to INTV
CC
+ 0.3V
SCL, SDAI ........................................... –0.3V to 6.5V
Output Voltages
GPIO ................................................... –0.3V to 100V
GATE (Note 3) ..................................... –0.3V to 100V
PACKAGE/ORDER I FOR ATIO
TOP VIEW
SENSE
V
DD
NC
UV
OV
GND
ON
SCL
SDAI
1
2
3
4
5
6
7
8
9
24 GATE
23 SOURCE
22 NC
21 NC
20 GPIO
19 INTV
CC
18 FB
17 ADR2
16 ADR1
15 ADR0
14 BD_PRST
13 ADIN
SENSE 1
V
DD
2
NC 3
NC 4
UV 5
GND 6
ON 7
SCL 8
SDAI 9
SDAO 10
ALERT 11
TIMER 12
24 GATE
23 SOURCE
22 NC
21 NC
20 GPIO
19 INTV
CC
18 FB
17 ADR2
16 ADR1
15 ADR0
14 BD_PRST
13 ADIN
SW PACKAGE
24-LEAD PLASTIC SO
32 31 30 29 28 27 26 25
NC 1
NC 2
NC 3
UV 4
OV 5
GND 6
ON 7
SCL 8
9 10 11 12 13 14 15 16
33
24 NC
23 NC
22 NC
21 NC
20 GPIO
19 INTV
CC
18 FB
17 ADR2
SDAO 10
ALERT 11
TIMER 12
TIMER
SDAI
SDAO
ALERT
ADIN
BD_PRST
ADR0
GATE
V
DDK
TOP VIEW
GN PACKAGE
24-LEAD PLASTIC SSOP
T
JMAX
= 125°C,
θ
JA
= 85°C/W
T
JMAX
= 125°C,
θ
JA
= 75°C/W
UH PACKAGE
32-LEAD (5mm
×
5mm) PLASTIC QFN
T
JMAX
= 125°C,
θ
JA
= 34°C/W
EXPOSED PAD (PIN 33) PCB ELECTRICAL CONNECTION OPTIONAL
ORDER
PART NUMBER
LTC4260CGN
LTC4260IGN
ORDER
PART NUMBER
LTC4260CSW
LTC4260ISW
ORDER
PART NUMBER
LTC4260CUH
LTC4260IUH
UH PART
MARKING
4260
Consult LTC Marketing for parts specified with wider operating temperature ranges.
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
DD
= 48V, unless otherwise noted.
SYMBOL
General
V
DD
I
DD
V
DD(UVL)
Input Supply Range
Input Supply Current
V
DD
Supply Undervoltage Lockout
V
DD
Falling
●
●
●
ELECTRICAL CHARACTERISTICS
PARAMETER
CONDITIONS
MIN
8.5
TYP
ADR1
SOURCE
SENSE
V
DD
NC
NC
NC
2
U
U
W
W W
U
W
TOP VIEW
MAX
80
UNITS
V
mA
V
4260f
2
7
7.45
5
7.9
LTC4260
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
DD
= 48V, unless otherwise noted.
SYMBOL
INTV
CC(UVL)
INTV
CC
Gate Drive
t
D
∆V
GATE
I
GATE(UP)
I
GATE(FST)
I
GATE(DN)
I
SOURCE
Input Pins
V
ON(TH)
∆V
ON(HYST)
I
ON(IN)
V
OV(TH)
∆V
OV(HYST)
I
OV(IN)
V
UV(TH)
∆V
UV(HYST)
I
UV(IN)
V
UV(RTH)
∆V
UV(RHYST)
∆V
SENSE(TH)
I
SENSE(IN)
V
FB
∆V
FB(HYST)
I
FB
V
BD_PRST(TH)
I
BD_PRST
V
GPIO(TH)
∆V
GPIO(HYST)
V
GPIO(OL)
I
GPIO(IN)
R
ADIN
I
ADIN
Timer
V
TIMER(H)
V
TIMER(L)
I
TIMER(UP)
I
TIMER(DN)
I
TIMER(RATIO)
TIMER Pin High Threshold
TIMER Pin Low Threshold
TIMER Pin Pull-Up Current
TIMER Pin Pull-Down Current
TIMER Pin Current Ratio
I
TIMER(DN)
/I
TIMER(UP)
V
TIMER
Rising
V
TIMER
Falling
V
TIMER
= 0V
V
TIMER
= 1.3V
●
●
●
●
●
ELECTRICAL CHARACTERISTICS
PARAMETER
V
CC
Supply Undervoltage Lockout
Internal Regulator Voltage
Turn-On Delay
External N-Channel Gate Drive
(V
GATE
– V
SOURCE
)
External N-Channel Pull-Up Current
External N-Channel Fast Pull-Down
External N-Channel Pull-Down Current
SOURCE Pin Input Current
ON Pin Threshold Voltage
ON Pin Hysteresis
ON Pin Input Current
OV Pin Threshold Voltage
OV Pin Hysteresis
OV Pin Input Current
UV Pin Threshold Voltage
UV Pin Hysteresis
UV Pin Input Current
UV Pin Reset Threshold Voltage
UV Pin Reset Threshold Hysteresis
Current Limit Sense Voltage Threshold
(V
DD
– V
SENSE
)
SENSE Pin Input Current
Foldback Pin Power Good Threshold
FB Pin Power Good Hysteresis
Foldback Pin Input Current
BD_PRST Input Threshold
BD_PRST Pullup Current
GPIO Pin Input Threshold
GPIO Pin Hysteresis
GPIO Pin Output Low Voltage
GPIO Pin Input Leakage Current
ADIN Pin Input Resistance
ADIN Pin Input Current
CONDITIONS
INTV
CC
Falling
●
●
●
MIN
3.4
5
50
10
4.5
–14
400
0.7
200
1.19
60
3.43
70
3.43
310
1.18
80
40
10
70
3.43
80
1.2
70
–7
1.6
TYP
3.8
5.5
100
14
6
–18
600
1
400
1.235
130
0
3.5
90
0
3.5
380
0
1.235
160
50
20
100
3.5
100
0
1.235
130
–10
1.8
80
0.25
0
MAX
4.2
6
150
18
18
–22
1000
1.4
600
1.27
200
±1
3.56
120
±1
3.56
440
±2
1.27
250
60
30
130
3.56
120
±2
1.27
190
–16
2
0.5
±10
±1
1.28
0.3
–120
2.6
2.7
UNITS
V
V
ms
V
V
µA
mA
mA
µA
V
mV
µA
V
mV
µA
V
mV
µA
V
mV
mV
mV
µA
V
mV
µA
V
mV
µA
V
mV
V
µA
MΩ
µA
V
V
µA
µA
%
4260f
V
DD
= 20V to 80V
V
DD
= 8.5V to 20V
Gate Drive On, V
GATE
= 0V
Fast Turn Off, V
GATE
= 48V, V
SOURCE
= 38V
Gate Drive Off, V
GATE
= 58V, V
SOURCE
= 48V
SOURCE = 48V
V
ON
Rising
V
ON
= 1.2V
V
OV
Rising
V
OV
= 3.5V
V
UV
Rising
V
UV
= 3.5V
V
UV
Falling
V
FB
= 3.5V
V
FB
= 0V
V
SENSE
= 48V
FB Rising
FB = 3.5V
V
BD_PRST
Rising
BD_PRST = 0V
V
GPIO
Rising
I
GPIO
= 2mA
V
GPIO
= 80V
V
ADIN
= 1.28V
V
ADIN
= 2.56V
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
∆V
BD_PRST(HYST)
BD_PRST Hysteresis
2
10
0
1.2
0.1
–80
1.4
1.6
1.235
0.2
–100
2
2
3
LTC4260
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
DD
= 48V, unless otherwise noted.
SYMBOL
AC Parameters
t
PLH(GATE)
t
PHL(GATE)
t
PHL(SENSE)
ADC
Resolution (No Missing Codes)
Integral Nonlinearity
(Note 4)
V
DD
– SENSE (Note 5)
SOURCE
ADIN
V
DD
– SENSE
SOURCE
ADIN
V
DD
– SENSE (Note 6)
SOURCE
ADIN
V
DD
– SENSE (Note 7)
SOURCE
ADIN
●
●
●
●
●
●
●
●
●
●
●
●
●
ELECTRICAL CHARACTERISTICS
PARAMETER
Input High (ON) to GATE High
Propagation Delay
Input High (OV, BD_PRST), Input Low
(ON, UV) to GATE Low Propagation Delay
(V
DD
– SENSE) High to GATE Low
CONDITIONS
C
GATE
= 1pF
C
GATE
= 1pF
V
DD
– SENSE = 200mV, C
GATE
= 10nF
●
●
●
MIN
TYP
1
0.5
0.4
MAX
3
3
1
UNITS
µs
µs
µs
Bits
8
–2
–1.25
–1.25
–1.5
–1
–1
292
392
9.8
74.9
100.4
2.51
300
400
10
76.8
102.4
2.560
10
0.5
0.2
0.2
2
1.25
1.25
1.5
1
1
308
408
10.2
78.7
104.4
2.61
LSB
LSB
LSB
LSB
LSB
LSB
µV
mV
mV
mV
V
V
Hz
Offset Error
1LSB Step Size
Full-Scale Voltage
Conversion Rate
I
2
C Interface
V
ADR(H)
V
ADR(L)
I
ADR(IN)
V
SDAI,SCL(TH)
I
SDAI,SCL(IN)
V
SDAO(OL)
V
ALERT(OL)
ADR0 to ADR2 Input High Voltage
Threshold
ADR0 to ADR2 Input Low Voltage Threshold
ADR0 to ADR2 Input Current
SDAI, SCL Input Threshold
SDAI, SCL Input Current
SDAO Output Low Voltage
ALERT Output Low Voltage
SCL, SDAI = 5V
I
SDAO
= 5mA
I
ALERT
= 5mA
SDAO, ALERT = 5V
Operates with f
SCL
≤
f
SCL(MAX)
ADR0 to ADR2 = 0V, 5.5V
●
●
●
●
●
●
●
●
INTV
CC
– 0.6
0.25
–80
1.6
INTV
CC
– 0.45
0.45
1.8
0
0.2
0.2
0
INTV
CC
– 0.25
0.65
80
2
±1
0.4
0.4
±1
V
V
µA
V
µA
V
V
µA
kHz
I
SDAO,ALERT(IN)
SDAO, ALERT Input Current
I
2
C Interface Timing (Note 4)
f
SCL(MAX)
t
BUF(MIN)
t
SU,STA(MIN)
t
HD,STA(MIN)
t
SU,STO(MIN)
t
SU,DAT(MIN)
t
HD,DATI(MIN)
t
HD,DATO(MIN)
t
SP(MAX)
C
X
Maximum SCL Clock Frequency
Minimum Bus Free Time Between
Stop/Start Condition
Minimum Repeated Start Condition
Set-Up Time
Minimum Hold Time After (Repeated) Start
Condition
Minimum Stop Condition Set-Up Time
Minimum Data Set-Up Time Input
Minimum Data Hold Time Input
Minimum Data Hold Time Output
Maximum Suppressed Spike Pulse Width
SCL, SDA Input Capacitance
400
0.12
30
140
30
30
–100
300
50
500
110
5
1.3
600
600
600
100
0
900
250
10
µs
ns
ns
ns
ns
ns
ns
ns
pF
SDAI Tied to SDAO
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of the device may be impaired.
Note 2:
All currents into pins are positive, all voltages are referenced to
GND unless otherwise specified.
4260f
4
LTC4260
ELECTRICAL CHARACTERISTICS
Note 3:
Limits on maximum rating is defined as whichever limit occurs
first. An internal clamp limits the GATE pin to a minimum of 10V above
source. Driving this pin to voltages beyond the clamp may damage the
device.
Note 4:
Guaranteed by design and not subject to test.
Note 5:
Integral nonlinearity is defined as the deviation of a code from a
precise analog input voltage. Maximum specifications are limited by the
LSB step size and the single shot measurement. Typical specificatons are
measured from the 1/4, 1/2 and 3/4 areas of the quantization band.
Note 6:
1LSB step size specification is guaranteed by full-scale voltage
measurement and by design.
Note 7:
Full-scale current sense specification corresponds to code 200.
Codes above 200 may be discarded by offset cancellation.
TYPICAL PERFOR A CE CHARACTERISTICS
I
DD
vs V
DD
3.0
UV LOW-HIGH THRESHOLD (V)
2.5
85°C
INTV
CC
(V)
I
DD
(mA)
2.0
–40°C
1.5
1.0
0
20
60
40
V
DD
(V)
UV Hysteresis vs Temperature
0.39
1.245
ON, BD_PRST LOW-HIGH THRESHOLD (V)
0.38
UV HYSTERESIS (V)
1.240
ON, BD_PRST HYSTERESIS (V)
0.37
0.36
0.35
0.34
–50
–25
0
25
50
TEMPERATURE (°C)
U W
25°C
80
4260 G01
T
A
= 25°C, V
DD
= 48V unless otherwise noted.
UV Low-High Threshold
vs Temperature
3.54
INT V
CC
vs I
LOAD
6
V
DD
= 48V
5
V
DD
= 12V
4
3
2
1
0
100
3.52
3.50
3.48
CAUTION: DRAWING CURRENT
FROM INTV
CC
INCREASES POWER
DISSIPATION AND T
J
0
–2
–4
–6
I
LOAD
(mA)
–8
–10
4260 G18
3.46
–50
–25
0
25
50
TEMPERATURE (°C)
75
100
4260 G02
ON, BD_PRST Low-High
Threshold vs Temperature
0.16
0.15
0.14
0.13
0.12
0.11
ON, BD_PRST Hysteresis
vs Temperature
1.235
1.230
1.225
75
100
4260 G03
1.220
–50
–25
0
25
50
TEMPERATURE (°C)
75
100
4260 G04
0.10
–50
–25
0
25
50
TEMPERATURE (°C)
75
100
4260 G05
4260f
5
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