STP13N65M2,
STU13N65M2
N-channel 650 V, 0.37
Ω
typ.,10 A MDmesh™ M2
Power MOSFETs in TO-220 and IPAK packages
Datasheet
-
production data
Features
Order code
TAB
TAB
V
DS
R
DS(on)
max
0.43Ω
I
D
STP13N65M2
650 V
STU13N65M2
3
2
10A
3
1
2
1
•
Extremely low gate charge
•
Excellent output capacitance (C
oss
) profile
•
100% avalanche tested
•
Zener-protected
TO-220
IPAK
Applications
Figure 1. Internal schematic diagram
, TAB
•
Switching applications
Description
These devices are N-channel Power MOSFETs
developed using MDmesh™ M2 technology.
Thanks to their strip layout and improved vertical
structure, the devices exhibit low on-resistance
and optimized switching characteristics, rendering
them suitable for the most demanding high
efficiency converters.
AM15572v1
Table 1. Device summary
Order code
STP13N65M2
13N65M2
STU13N65M2
IPAK
Marking
Package
TO-220
Tube
Packaging
December 2014
This is information on a product in full production.
DocID026894 Rev 1
1/16
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Contents
STP13N65M2, STU13N65M2
Contents
1
2
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3
4
Test circuits
.............................................. 9
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.1
4.2
TO-220, STP13N65M2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
IPAK, STU13N65M2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2/16
DocID026894 Rev 1
STP13N65M2, STU13N65M2
Electrical ratings
1
Electrical ratings
Table 2. Absolute maximum ratings
Symbol
V
GS
I
D
I
D
I
DM(1)
P
TOT
dv/dt
(2)
dv/dt
(3)
T
stg
T
j
Gate-source voltage
Drain current (continuous) at T
C
= 25 °C
Drain current (continuous) at T
C
= 100 °C
Drain current (pulsed)
Total dissipation at T
C
= 25 °C
Peak diode recovery voltage slope
MOSFET dv/dt ruggedness
Storage temperature
Max. operating junction temperature
Parameter
Value
± 25
10
6.3
40
110
15
V/ns
50
- 55 to 150
°C
150
Unit
V
A
A
A
W
1. Pulse width limited by safe operating area.
2. I
SD
≤
10 A, di/dt
≤
400 A/µs; V
DS peak
< V
(BR)DSS
, V
DD
= 400 V
3. V
DS
≤
520 V
Table 3. Thermal data
Value
Symbol
R
thj-case
R
thj-amb
Parameter
TO-220
Thermal resistance junction-case max
Thermal resistance junction-ambient
max
62.5
1.14
°C/W
100
IPAK
Unit
Table 4. Avalanche characteristics
Symbol
I
AR
E
AS
Parameter
Avalanche current, repetitive or not
repetitive (pulse width limited by T
jmax
)
Single pulse avalanche energy (starting
T
j
= 25 °C, I
D
= I
AR
; V
DD
= 50 V)
Value
1.8
350
Unit
A
mJ
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Electrical characteristics
STP13N65M2, STU13N65M2
2
Electrical characteristics
(T
C
= 25 °C unless otherwise specified)
Table 5. On /off states
Symbol
V
(BR)DSS
Parameter
Drain-source
breakdown voltage
Zero gate voltage
drain current
Gate-body leakage
current
Test conditions
V
GS
= 0 V, I
D
= 1 mA
V
GS
= 0 V, V
DS
= 650 V
V
GS
= 0 V, V
DS
= 650 V,
T
C
= 125 °C
V
DS
= 0 V, V
GS
= ± 25 V
2
3
0.37
Min.
650
1
100
±10
4
0.43
Typ.
Max.
Unit
V
µA
µA
µA
V
Ω
I
DSS
I
GSS
V
GS(th)
R
DS(on)
Gate threshold voltage V
DS
= V
GS
, I
D
= 250 µA
Static drain-source
on-resistance
V
GS
= 10 V, I
D
= 5 A
Table 6. Dynamic
Symbol
C
iss
C
oss
C
rss
C
oss eq(1)
R
G
Q
g
Q
gs
Q
gd
VDSS
Parameter
Input capacitance
Output capacitance
Reverse transfer
capacitance
Equivalent output
capacitance
Intrinsic gate
resistance
Total gate charge
Gate-source charge
Gate-drain charge
Test conditions
Min.
-
Typ.
590
27.5
1.1
168.5
6.5
17
3.3
7
Max.
-
-
-
-
-
-
-
-
Unit
pF
pF
pF
pF
Ω
nC
nC
nC
V
DS
= 100 V, f = 1 MHz,
V
GS
= 0 V
-
-
V
GS
= 0 V, V
DS
= 0 to 520 V
f = 1 MHz open drain
-
-
-
V
DD
= 520 V, I
D
= 10 A,
V
GS
= 10 V, (see
Figure 17)
-
-
1.
Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80%
Table 7. Switching times
Symbol
t
d(on)
t
r
t
d(off)
t
f
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
V
DD
= 325 V, I
D
= 5 A,
R
G
= 4.7
Ω,
V
GS
= 10 V
(see
Figure 16
and
Figure 21)
Test conditions
Min.
-
-
-
-
Typ.
11
7.8
38
12
Max.
-
-
-
-
Unit
ns
ns
ns
ns
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STP13N65M2, STU13N65M2
Electrical characteristics
Table 8. Source drain diode
Symbol
I
SD
I
SDM (1)
V
SD (2)
t
rr
Q
rr
I
RRM
t
rr
Q
rr
I
RRM
Parameter
Source-drain current
Source-drain current (pulsed)
Forward on voltage
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Reverse recovery time
Reverse recovery charge
Reverse recovery current
I
SD
= 10 A, di/dt = 100 A/µs,
V
DD
= 60 V, T
j
= 150 °C
(see
Figure 18)
I
SD
=10 A, di/dt = 100 A/µs
V
DD
= 60 V (see
Figure 18)
V
GS
= 0 V, I
SD
= 10 A
Test conditions
Min.
-
-
-
-
-
-
-
-
-
312
2.7
17.5
464
4.1
17.5
Typ.
Max. Unit
10
40
1.6
A
A
V
ns
µC
A
ns
µC
A
1. Pulse width limited by safe operating area.
2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%
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