DATASHEET
ISL8272M
50A Digital DC/DC PMBus Power Module
The
ISL8272M
is a 50A step-down PMBus compliant digital
power module. Integrated in the module is a high performance
digital PWM controller, dual-phase power MOSFETs, inductors,
and the passives. This high efficiency power module is capable
of delivering 50A without the need for airflow and heatsinks.
The ISL8272M can be placed in a current sharing
configuration with up to four modules in parallel to deliver
200A continuous current.
The ISL8272M operates with the ChargeMode™ control
architecture, which responds to a transient load within a single
switching cycle. The ISL8272M comes with operating in a pin
strap mode; output voltage, switching frequency device, SMBus
address, input UVLO, soft-start/stop, and current sharing can be
programmed through external resistors. More configuration such
as fault limits, fault response, margining, and sequencing can be
easily programmed using the PMBus interface. PMBus can be
used to monitor voltages, currents, temperatures, and fault
status. The ISL8272M is supported by the PowerNavigator™
software, a graphical user interface (GUI) that can be used to
configure modules to a desired solution.
The ISL8272M is built in a compact (18mmx23mmx7.5mm)
and low profile overmolded HDA package, suitable for
automated assembly by standard surface mount equipment.
FN8670
Rev.5.00
Nov 8, 2017
Features
• Complete digital switch mode power supply
• Wide input voltage range: 4.5V to 14V
• Programmable output voltage range: 0.6V to 5V
• PMBus compliant communication interface
• Programmable V
OUT
, margining, UV/OV, UC/OC, UT/OT,
soft-start/stop, sequencing and external synchronization
• Monitor of V
IN
, V
OUT
, I
OUT
, temperature, duty cycle, switching
frequency, power-good, and faults
• Fast response ChargeMode control architecture
• Multiphase current sharing with up to four modules
• ±1.0% V
OUT
accuracy over line, load, and temperature
• Internal nonvolatile memory and fault logging
• Thermally enhanced HDA package
Applications
• Server, telecom, storage, and datacom
• Industrial/ATE and networking equipment
• General purpose power for ASIC, FPGA, DSP, and memory
Related Literature
• For a full list of related documents, visit our website
-
ISL8272M
product page
VIN
CIN
VIN
VDD
VOUT
VSENP
EN
VSENN
VR5
VOUT
ENABLE
COUT
18m
m
23
m
m
10µF
10µF
VR6
VDRV
VCC
VR
ISL8272M
VR55
100k
2x10µF
VDRV1
SCL
SDA
PMBUS
INTERFACE
7.5mm
VMON
6.65k
SGND
PGND
SALRT
NOTE:
1. Figure 1 represents a typical implementation of the ISL8272M. For PMBus
operation, it is recommended to tie the enable pin (EN) to SGND.
FIGURE 1. 50A APPLICATION CIRCUIT
FIGURE 2. A SMALL PACKAGE FOR HIGH POWER DENSITY
FN8670 Rev.5.00
Nov 8, 2017
Page 1 of 59
ISL8272M
Table of Contents
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
ISL8272M Internal Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Typical Application Circuit - Single Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Typical Application Circuit - Three Module Current Sharing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Thermal Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Typical Performance Curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Efficiency Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Transient Response Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Derating Curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SMBus Communications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Voltage Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Soft-Start/Stop Delay and Ramp Times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power-Good . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Switching Frequency and PLL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Loop Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input Undervoltage Lockout (UVLO). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SMBus Module Address Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Overvoltage Protection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Prebias Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Overcurrent Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal Overload Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Digital-DC Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Active Current Sharing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Phase Spreading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Fault Spreading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Sequencing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Monitoring with SMBus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Snapshot Parameter Capture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Nonvolatile Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PCB Layout Pattern Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal Vias. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stencil Pattern Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Reflow Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
17
17
17
17
18
18
19
19
19
20
20
20
21
21
21
22
22
23
23
23
23
24
24
24
24
24
24
Layout Guide. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
PMBus Command Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
PMBus Data Formats. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
PMBus Use Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
PMBus Commands Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Firmware Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
About Intersil . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Package Outline Drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
FN8670 Rev.5.00
Nov 8, 2017
Page 2 of 59
ISL8272M
Ordering Information
PART NUMBER
(Notes
2, 3, 4)
ISL8272MAIRZ
ISL8272MBIRZ
ISL8272MEVAL1Z
ISL8272MEVAL2Z
NOTES:
2. Add “-T” suffix for 100 unit tape and reel option. Refer to
TB347
for details on reel specifications.
3. These Intersil Pb-free plastic packaged products are RoHS compliant by EU exemption 7C-I and 7A. They employ special Pb-free material sets; molding
compounds/die attach materials and NiPdAu plate-e4 termination finish, which is compatible with both SnPb and Pb-free soldering operations.
Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-
020.
4. For Moisture Sensitivity Level (MSL), refer to the
ISL8272M
product information page. For more information about MSL, refer to
TB363.
PART
MARKING
ISL8272M
ISL8272MB
TEMP RANGE
(°C)
-40 to +85
-40 to +85
PACKAGE
(RoHS Compliant)
58 LD 18x23 HDA
58 LD 18x23 HDA
PKG.
DWG. #
Y58.18x23
Y58.18x23
Single-Module Evaluation Board (see
UG003
,
“ISL8272MEVAL1Z Evaluation Board User Guide”)
Three-Module Current Sharing Evaluation Board (see
UG004,
“ISL8272MEVAL2Z Evaluation Board User Guide”)
ISL
INTERSIL DEVICE DESIGNATOR
BASE PART NUMBER
FIRMWARE REVISION
A: FC01
B: FC02
xxxxM
F
T
R
Z
S
SHIPPING OPTION
BLANK: BULK
T: TAPE AND REEL
ROHS
Z: ROHS COMPLIANT
OPERATING TEMPERATURE
I: INDUSTRIAL (‐ 40°C TO +85°C)
PACKAGE DESIGNATOR
R: HIGH DENSITY ARRAY (HDA)
FN8670 Rev.5.00
Nov 8, 2017
Page 3 of 59
ISL8272M
Pin Configuration
ISL8272M
(58 LD HDA)
TOP VIEW
1
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
V
W
Y
AA
AB
AC
PGND
SW1
PGND
SW2
VCC
VR SWD1
PGND
VR55
PGND VDRV
SWD2
PGND
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18
VOUT
SA
SALRT SDA
SYNC
EN
TEST
PAD1
TEST
SS/UVLO
PG
DDC
TEST
TEST
VSET
VOUT
MGN
CS
PAD2
SCL
PAD4
VMON
PGND
PAD3
PAD5
PAD8
VIN
VIN
TEST
TEST
PGND
PGND
PAD7
PAD6
SGND
ASCR V25
VSENN VSENP
VDD
VR5
SGND
PGND
VR6 SGND
VDRV
VDRV1
DCM
VDRV1
DCM
PAD9
PAD10
PGND
SGND
PAD11
VIN
PAD12
PGND
SGND
PAD13
PAD14
PAD15
PAD16
Pin Descriptions
PIN
PAD1, 2
LABEL
VOUT
TYPE
PWR
DESCRIPTION
Power supply output voltage. Output voltage from 0.6V to 5V. Tie these two pins together to achieve a single output.
For higher output voltage, refer to the derating curves starting on
page 15
to set the maximum output current from
these pads.
Power ground. Refer to
“Layout Guide” on page 23
for the PGND pad connections and I/O capacitor placement.
Signal ground. Refer to
“Layout Guide” on page 23
for the SGND pad connections.
Input power supply voltage to power the module. Input voltage range from 4.5V to 14V.
Switching node pads. The SW pads dissipate the heat and provide good thermal performance. Refer to
“Layout
Guide” on page 23
for the SW pad connections.
Output voltage selection pin. Used to set V
OUT
set point and V
OUT
max.
Current sharing configuration pin. Used to program current sharing configurations such as SYNC selection, phase
spreading, and V
OUT
droop.
External V
OUT
margin control pin. Active high (>2V) sets V
OUT
margin high; active low (<0.8V) sets V
OUT
margin low;
high impedance (floating) sets V
OUT
to normal voltage. Factory default range for margining is nominal V
OUT
±5%.
When using PMBus to control margin command, leave this pin as no connection.
Driver voltage monitoring. Use this pin to monitor VDRV through an external 16:1 resistor divider.
Serial address selection pin. Used to assign unique address for each individual device or to enable certain
management features.
Serial alert. Connect to external host if desired. SALRT is asserted low upon a warning or a fault event and deasserted
when warning or fault is cleared. A pull-up resistor is required.
PAD3, 4, 5, 7,
10, 12, 13, 15
PAD6
PAD8, 9, 11
PAD14, 16
C6
C7
C8
PGND
SGND
VIN
SW1,
SW2
VSET
CS
MGN
PWR
PWR
PWR
PWR
I
I
I
C9
C10
C11
VMON
SA
SALRT
I
I
O
FN8670 Rev.5.00
Nov 8, 2017
Page 4 of 59
ISL8272M
Pin Descriptions
PIN
C12
C13
D4
D5
D13
E14
E4
LABEL
SDA
SCL
SS/
UVLO
PG
SYNC
EN
DDC
TYPE
I/O
I/O
I
O
I/O
I
I/O
(Continued)
DESCRIPTION
Serial data. Connect to external host and/or to other Digital-DC™ devices. A pull-up resistor is required.
Serial clock. Connect to external host and/or to other Digital-DC devices. A pull-up resistor is required.
Soft-start/stop and undervoltage lockout selection pin. Used to set turn on/off delay and ramp time as well as input
UVLO threshold levels.
Power-good output. Power-good output can be an open drain that requires a pull-up resistor or push-pull output that
can drive a logic input.
Clock synchronization input. Used to set the frequency of the internal switch clock, to sync to an external clock or to
output internal clock.
Enable pin. Logic high to enable the module output.
A Digital-DC bus. This dedicated bus provides the communication between devices for features such as sequencing,
fault spreading and current sharing. The DDC pin on all Digital-DC devices should be connected together. A pull-up
resistor is required.
Test pins. Do not connect these pins.
ChargeMode™ control ASCR parameters selection pin. Used to set ASCR gain and residual values.
Internal 2.5V reference used to power internal circuitry. No external capacitor required for this pin.
Differential output voltage sense feedback. Connect to negative output regulation point.
Differential output voltage sense feedback. Connect to positive output regulation point.
Signal grounds. Using multiple vias to connect the SGND pins to the internal SGND layer.
Input supply voltage for controller. Connect VDD pad to V
IN
supply.
Internal LDO bias pin. Tie VR to VR55 directly with a short loop trace.
Switching node driving pins. Directly connect to the SW1 and SW2 pads with short loop wires.
Internal 5V reference used to power internal circuitry. Place a 10µF decoupling capacitor for this pin.
Internal LDO output. Connect VCC to VDRV for internal LDO driving.
Power grounds. Using multiple vias to connect the PGND pins to the internal PGND layer.
Internal 5.5V bias voltage for internal LDO use only. Tie VR55 pin directly to VR pin.
Internal 6V reference used to power internal circuitry. Place a 10µF decoupling capacitor for this pin.
Power supply for internal FET drivers. Connect 10μF bypass capacitor to each of these pins. These pins can be driven
by the internal LDO through VCC pin or by the external power supply directly. Keep the driving voltage between 4.5V
and 5.5V. For 5V input application, use external supply or connect this pin to VIN.
Bias pin of the internal FET drivers. Always tie to VDRV.
C5, D14, E15,
F4, F15, G4
G14
G15
H3
H4
H16, J16, K16,
M14
K14
L2
L3, P11
L14
M1
M5, M17, N5
M10
M13
N6, N16
TEST
ASCR
V25
VSENN
VSENP
SGND
VDD
VR
SWD1,
SWD2
VR5
VCC
PGND
VR55
VR6
VDRV
-
I
PWR
I
I
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
R8, R17
VDRV1
I
FN8670 Rev.5.00
Nov 8, 2017
Page 5 of 59
嵌入式系统
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