Philips Semiconductors
Product specification
Logic level TOPFET
D-PAK version of BUK117-50DL
DESCRIPTION
Monolithic temperature and
overload protected logic level power
MOSFET in
TOPFET2
technology
assembled in a 3 pin surface mount
plastic package.
BUK138-50DL
QUICK REFERENCE DATA
SYMBOL
V
DS
I
D
P
D
T
j
R
DS(ON)
I
ISL
PARAMETER
Continuous drain source voltage
Continuous drain current
Total power dissipation
Continuous junction temperature
Drain-source on-state resistance
Input supply current
V
IS
= 5 V
MAX.
50
8
40
150
100
650
UNIT
V
A
W
˚C
mΩ
µA
APPLICATIONS
General purpose switch for driving
lamps
motors
solenoids
heaters
in automotive systems and other
applications.
FEATURES
TrenchMOS output stage
Current limiting
Overload protection
Overtemperature protection
Protection latched reset by input
5 V logic compatible input level
Control of output stage and
supply of overload protection
circuits derived from input
Low operating input current
permits direct drive by
micro-controller
ESD protection on all pins
Overvoltage clamping for turn
off of inductive loads
FUNCTIONAL BLOCK DIAGRAM
DRAIN
O/V
CLAMP
INPUT
RIG
POWER
MOSFET
LOGIC AND
PROTECTION
SOURCE
Fig.1. Elements of the TOPFET.
PINNING - SOT428
PIN
1
2
3
tab
input
drain
source
DESCRIPTION
PIN CONFIGURATION
tab
SYMBOL
D
TOPFET
I
P
2
drain
1
3
S
May 2001
1
Rev 1.300
Philips Semiconductors
Product specification
Logic level TOPFET
D-PAK version of BUK117-50DL
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum Rating System (IEC 134)
SYMBOL
V
DS
I
D
I
D
I
I
I
IRM
P
D
T
stg
T
j
T
sold
PARAMETER
Continuous drain source voltage
1
Continuous drain current
Continuous drain current
Continuous input current
Non-repetitive peak input current
Total power dissipation
Storage temperature
Continuous junction temperature
2
Case temperature
CONDITIONS
-
V
IS
= 5 V; T
mb
= 25 ˚C
V
IS
= 5 V; T
mb
≤
110 ˚C
-
t
p
≤
1 ms
T
mb
≤
25 ˚C
-
normal operation
during soldering
MIN.
-
-
-
-5
-10
-
-55
-
-
BUK138-50DL
MAX.
50
self -
limited
8
5
10
40
175
150
260
UNIT
V
A
A
mA
mA
W
˚C
˚C
˚C
ESD LIMITING VALUE
SYMBOL
V
C
PARAMETER
Electrostatic discharge capacitor
voltage
CONDITIONS
Human body model;
C = 250 pF; R = 1.5 kΩ
MIN.
-
MAX.
2
UNIT
kV
OVERVOLTAGE CLAMPING LIMITING VALUES
At a drain source voltage above 50 V the power MOSFET is actively turned on to clamp overvoltage transients.
SYMBOL
E
DSM
E
DRM
PARAMETER
Inductive load turn-off
Non-repetitive clamping energy
Repetitive clamping energy
CONDITIONS
I
DM
= 8 A; V
DD
≤
20 V
T
mb
≤
25 ˚C
T
mb
≤
95 ˚C; f = 250 Hz
MIN.
-
-
MAX.
100
20
UNIT
mJ
mJ
OVERLOAD PROTECTION LIMITING VALUE
With an adequate protection supply provided via the input pin, TOPFET can protect itself from two types of overload
- overtemperature and short circuit load.
SYMBOL
V
DS
PARAMETER
Drain source voltage
3
REQUIRED CONDITION
4 V
≤
V
IS
≤
5.5 V
MIN.
0
MAX.
35
UNIT
V
THERMAL CHARACTERISTIC
SYMBOL
R
th j-mb
R
th j-a
PARAMETER
Thermal resistance
Junction to mounting base
Junction to ambient
CONDITIONS
-
minimum footprint FR4 PCB
MIN.
-
-
TYP.
2.5
71.4
MAX.
3.1
-
UNIT
K/W
K/W
1
Prior to the onset of overvoltage clamping. For voltages above this value, safe operation is limited by the overvoltage clamping energy.
2
A higher T
j
is allowed as an overload condition but at the threshold T
j(TO)
the over temperature trip operates to protect the switch.
3
All control logic and protection functions are disabled during conduction of the source drain diode.
May 2001
2
Rev 1.300
Philips Semiconductors
Product specification
Logic level TOPFET
D-PAK version of BUK117-50DL
OUTPUT CHARACTERISTICS
Limits are for -40˚C
≤
T
mb
≤
150˚C; typicals are for T
mb
= 25 ˚C unless otherwise specified
SYMBOL
PARAMETER
Off-state
V
(CL)DSS
I
DSS
Drain-source clamping voltage
CONDITIONS
V
IS
= 0 V
I
D
= 10 mA
I
DM
= 1 A; t
p
≤
300
µs; δ ≤
0.01
Drain source leakage current
On-state
R
DS(ON)
Drain-source resistance
V
DS
= 40 V
T
mb
= 25 ˚C
I
DM
= 3 A; t
p
≤
300
µs; δ ≤
0.01
V
IS
≥
4.4 V
T
mb
= 25 ˚C
V
IS
≥
4 V
T
mb
= 25 ˚C
-
-
-
-
50
50
-
-
MIN.
BUK138-50DL
TYP.
MAX.
UNIT
-
60
-
0.1
-
70
100
10
V
V
µA
µA
mΩ
mΩ
mΩ
mΩ
-
68
-
72
190
100
200
105
OVERLOAD CHARACTERISTICS
-40˚C
≤
T
mb
≤
150˚C unless otherwise specified.
SYMBOL
I
D
PARAMETER
Short circuit load
Drain current limiting
CONDITIONS
V
DS
= 13 V
V
IS
= 5 V;
4.4 V
≤
V
IS
≤
5.5 V
4 V
≤
V
IS
≤
5.5 V
P
D(TO)
T
DSC
T
j(TO)
Overload protection
Overload power threshold
Characteristic time
Overtemperature protection
Threshold junction
temperature
2
150
170
-
˚C
V
IS
= 5 V;
T
mb
= 25˚C
device trips if P
D
> P
D(TO)
which determines trip time
1
T
mb
= 25˚C
MIN.
8
6
5
20
200
TYP.
12
-
-
55
350
MAX.
16
18
18
80
600
UNIT
A
A
A
W
µs
1
Trip time t
d sc
varies with overload dissipation P
D
according to the formula t
d sc
≈
T
DSC
/ ln[ P
D
/ P
D(TO)
].
2
This is independent of the dV/dt of input voltage V
IS
.
May 2001
3
Rev 1.300
Philips Semiconductors
Product specification
Logic level TOPFET
D-PAK version of BUK117-50DL
INPUT CHARACTERISTICS
The supply for the logic and overload protection is taken from the input.
Limits are for -40˚C
≤
T
mb
≤
150˚C; typicals are for T
mb
= 25˚C unless otherwise specified
SYMBOL
V
IS(TO)
I
IS
I
ISL
V
ISR
t
lr
V
(CL)IS
R
IG
PARAMETER
Input threshold voltage
Input supply current
Input supply current
Protection reset voltage
1
Latch reset time
Input clamping voltage
Input series resistance
2
to gate of power MOSFET
CONDITIONS
V
DS
= 5 V; I
D
= 1 mA
T
mb
= 25˚C
normal operation;
protection latched;
reset time t
r
≥
100
µs
V
IS1
= 5 V, V
IS2
< 1 V
I
I
= 1.5 mA
T
mb
= 25˚C
V
IS
= 5 V
V
IS
= 4 V
V
IS
= 5 V
V
IS
= 3 V
MIN.
0.6
1.1
100
80
200
130
1.5
10
5.5
-
BUK138-50DL
TYP.
-
1.6
220
195
400
250
2
40
-
33
MAX.
2.4
2.1
400
330
650
430
2.9
100
8.5
-
UNIT
V
V
µA
µA
µA
µA
V
µs
V
kΩ
SWITCHING CHARACTERISTICS
T
mb
= 25 ˚C; V
DD
= 13 V; resistive load R
L
= 4
Ω.
Refer to waveform figure and test circuit.
SYMBOL
t
d on
t
r
t
d off
t
f
PARAMETER
Turn-on delay time
Rise time
Turn-off delay time
Fall time
V
IS
= 0 V
CONDITIONS
V
IS
= 5 V
MIN.
-
-
-
-
TYP.
10
20
30
20
MAX.
20
40
60
40
UNIT
µs
µs
µs
µs
1
The input voltage below which the overload protection circuits will be reset.
2
Not directly measureable from device terminals.
May 2001
4
Rev 1.300
Philips Semiconductors
Product specification
Logic level TOPFET
D-PAK version of BUK117-50DL
MECHANICAL DATA
Plastic single-ended surface mounted package (Philips version of D-PAK); 3 leads
(one lead cropped)
BUK138-50DL
SOT428
seating plane
y
A
E
b2
A
A1
mounting
base
A2
D1
E1
D
HE
L2
2
L
L1
1
b1
e
e1
b
3
w
M
A
c
0
10
scale
20 mm
DIMENSIONS (mm are the original dimensions)
A
UNIT max.
mm
2.38
2.22
A1
(1)
0.65
0.45
A2
0.89
0.71
b
0.89
0.71
b1
max.
1.1
0.9
b2
5.36
5.26
c
0.4
0.2
D1
E
D
max. max. max.
6.22
5.98
4.81
4.45
6.73
6.47
E1
min.
4.0
e
e1
HE
max.
10.4
9.6
L
2.95
2.55
L1
min.
0.5
L2
0.7
0.5
w
0.2
y
max.
0.2
2.285 4.57
Note
1. Measured from heatsink back to lead.
OUTLINE
VERSION
SOT428
REFERENCES
IEC
JEDEC
EIAJ
EUROPEAN
PROJECTION
ISSUE DATE
98-04-07
Fig.2. SOT428 surface mounting package
1
, centre pin connected to mounting base.
1
Epoxy meets UL94 V0 at 1/8". Net mass: 1.1 g
For soldering guidelines and SMD footprint design, please refer to Data Handbook SC18.
May 2001
5
Rev 1.300
微控制器 MCU
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