The following document contains information on Cypress products.
FUJITSU MICROELECTRONICS
DATA SHEET
DS07-12531-4E
8-bit Proprietary Microcontroller
CMOS
F MC-8L MB89630R Series
MB89635R/636R/637R/P637/PV630
■
OUTLINE
The MB89630R series has been developed as a general-purpose version of the F
2
MC*-8L family consisting of
proprietary 8-bit, single-chip microcontrollers.
In addition to a compact instruction set, the microcontrollers contain a variety of peripheral functions such as
dual-clock control system, five operating speed control stages, a UART, timers, a PWM timer, a serial interface,
an A/D converter, an external interrupt, and a watch prescaler.
* : F
2
MC is the abbreviation for Fujitsu Flexible Microcontroller.
2
■
FEATURES
• High-speed operating capability at low voltage
• Minimum execution time: 0.4
μs@3.5
V, 0.8
μs@2.7
V
• F
2
MC-8L family CPU core
Instruction set optimized for controllers
Multiplication and division instructions
16-bit arithmetic operations
Test and branch instructions
Bit manipulation instructions, etc.
• Five types of timers
8-bit PWM timer: 2 channels (Also usable as a reload timer)
8-bit pulse-width count timer (Continuous measurement capable, applicable to remote control, etc.)
16-bit timer/counter
21-bit timebase timer
(Continued)
For the information for microcontroller supports, see the following web site.
http://edevice.fujitsu.com/micom/en-support/
Copyright©1998-2009 FUJITSU MICROELECTRONICS LIMITED All rights reserved
2009.5
MB89630R Series
(Continued)
• UART
CLK-synchronous/CLK-asynchronous data transfer capable (6, 7, and 8 bits)
• Serial interface
Switchable transfer direction to allows communication with various equipment.
• 10-bit A/D converter
Start by an external input capable
• External interrupt: 4 channels
Four channels are independent and capable of wake-up from low-power consumption modes (with an edge
detection function).
• Low-power consumption modes
Stop mode (Oscillation stops to minimize the current consumption.)
Sleep mode (The CPU stops to reduce the current consumption to approx. 1/3 of normal.)
Subclock mode
Watch mode
• Bus interface function
With hold and ready function
2
DS07-12531-4E
MB89630R Series
■
PRODUCT LINEUP
Part number
Item
MB89635R
MB89636R
MB89637R
MB89P637
MB89PV630
Classification
Mass-produced products
(mask ROM products)
ROM size
16 K
×
8 bits
24 K
×
8 bits
32 K
×
8 bits
One-time
PROM
product
Piggyback/
evaluation product
(for evaluation and
development)
(internal mask
ROM)
(internal mask
ROM)
(internal mask
ROM)
32 K
×
8 bits
(Internal PROM,
to be programmed
32 K
×
8 bits
with general-
(external ROM)
purpose
EPROM
programmer)
1024
×
8 bits
1024
×
8 bits
RAM size
CPU functions
512
×
8 bits
768
×
8 bits
1024
×
8 bits
The number of instructionns:
Instruction bit length:
Instruction length:
Data bit length:
Minimum execution time:
Interrupt processing time:
Input ports:
Output ports (N-ch open-drain):
I/O ports (N-ch open-drain):
Output ports (CMOS):
I/O ports (CMOS):
Total:
136
8 bits
1 to 3 bytes
1, 8, 16 bits
0.4
μs/10
MHz, 61
μs@32.768
kHz
3.6 to 57.6
μs/10
MHz, 562.5
μs@32.768
kHz
5 (All also serve as peripherals.)
8 (All also serve as peripherals.)
4 (All also serve as peripherals.)
8 (All also serve as bus control.)
28 (27 ports also serve as bus pins and peripherals.)
53
Ports
Watch timer
8-bit PWM
timer
8-bit pulse
width count
timer
16-bit timer/
counter
8-bit serial I/O
21 bits
×
1 (in main clock)/15 bits
×
1 (at 32.768 kHz)
8-bit reload timer operation (toggled output capable, operating clock cycle: 0.4
μs
to 3.3 ms)
×
2
channels
7/8-bit resolution PWM operation (conversion cycle: 51.2
μs
to 839 ms)
×
2 channels
8-bit timer operation (overflow output capable, operating clock cycle: 0.4 to 12.8
μs)
8-bit reload timer operation (toggled output capable, operating clock cycle: 0.4 to 12.8
μs)
8-bit pulse width measurement operation (capable of continuous measurement, and
measurement of “H” pulse width/ “L” pulse width/ from
↑
to
↑/from ↓
to
↓)
16-bit timer operation (operating clock cycle: 0.4
μs)
16-bit event counter operation (rising edge/falling edge/both edge selectable)
8 bits
LSB first/MSB first selectable
One clock selectable from four transfer clocks
(one external shift clock, three internal shift clocks: 0.8
μs,
3.2
μs,
12.8
μs)
Capable of switching two I/O systems by software
Transfer data length (6, 7, and 8 bits)
Transfer rate (300 to 62500 bps. at 10 MHz oscillation)
10-bit resolution
×
8 channels
A/D conversion mode (conversion time: 13.2
μs)
Sense mode (conversion time: 7.2
μs)
Capable of continuous activation by an external activation or an internal timer
(Continued)
UART
10-bit A/D
converter
DS07-12531-4E
3
MB89630R Series
(Continued)
Part number
Item
MB89635R
MB89636R
MB89637R
MB89P637
MB89PV630
External
interrupt input
Standby mode
Process
Operating
voltage*
EPROM for use
4 independent channels (edge selection, interrupt vector, source flag).
Rising edge/falling edge selectable
Used also for wake-up from stop/sleep mode. (Edge detection is also permitted in stop mode.)
Sleep mode, stop mode, watch mode, and subclock mode
CMOS
2.2 V to 6.0 V
2.7 V to 6.0 V
MBM27C256A-20CZ
MBM27C256A-20TV
* : Varies with conditions such as the operating frequency. (See section “■ Electrical Characteristics.”)
In the case of the MB89PV630, the voltage varies with the restrictions of the EPROM for use.
■
PACKAGE AND CORRESPONDING PRODUCTS
Package
DIP-64P-M01
FPT-64P-M06
FPT-64P-M23
MQP-64C-P01
MDP-64C-P02
: Available
×:
Not available
×
×
×
×
×
×
×
MB89635R
MB89636R
MB89637R
MB89P637
MB89PV630
×
×
×
Note: For more information about each package, see section “■ Package Dimensions.”
4
DS07-12531-4E
嵌入式系统
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