19-2097; Rev 1; 2/07
IT
TION K
VALUA
E
BLE
AVAILA
Dual 10-Bit, 105Msps, 3.3V, Low-Power ADC
with Internal Reference and Parallel Outputs
General Description
The MAX1180 is a 3.3V, dual 10-bit, analog-to-digital
converter (ADC) featuring fully-differential wideband
track-and-hold (T/H) inputs, driving two pipelined, nine-
stage ADCs. The MAX1180 is optimized for low-power,
high-dynamic performance applications in imaging,
instrumentation, and digital communication applica-
tions. The MAX1180 operates from a single 2.7V to 3.6V
supply, consuming only 413mW, while delivering a typi-
cal signal-to-noise ratio (SNR) of 58.5dB at an input fre-
quency of 20MHz and a sampling rate of 105Msps. The
T/H driven input stages incorporate 400MHz (-3dB)
input amplifiers. The converters may also be operated
with single-ended inputs. In addition to low operating
power, the MAX1180 features a 2.8mA sleep mode, as
well as a 1µA power-down mode to conserve power
during idle periods.
An internal 2.048V precision bandgap reference sets
the full-scale range of the ADC. A flexible reference
structure allows the use of the internal or external
reference, if desired for applications requiring
increased accuracy or a different input voltage range.
The MAX1180 features parallel, CMOS-compatible
three-state outputs. The digital output format is set to
two’s complement or straight offset binary through a
single control pin. The device provides for a separate
output power supply of 1.7V to 3.6V for flexible interfac-
ing. The MAX1180 is available in a 7mm
✕
7mm, 48-pin
TQFP package, and is specified for the extended
industrial (-40°C to +85°C) temperature range.
Pin-compatible higher and lower speed versions of the
MAX1180 are also available. Please refer to the
MAX1181 data sheet for 80Msps, the MAX1182 data
sheet for 65Msps, the MAX1183 data sheet for 40Msps,
and the MAX1184 data sheet for 20Msps. In addition to
these speed grades, this family includes a 20Msps mul-
tiplexed output version (MAX1185), for which digital
data is presented time-interleaved on a single, parallel
10-bit output port.
Features
♦
Single 3.3V Operation
♦
Excellent Dynamic Performance
58.5dB SNR at f
IN
= 20MHz
72dB SFDR at f
IN
= 20MHz
♦
SNR Flat within 1dB for f
IN
= 20MHz to 100MHz
♦
Low Power
125mA (Normal Operation)
2.8mA (Sleep Mode)
1µA (Shutdown Mode)
♦
0.02dB Gain and 0.25° Phase Matching (typ)
♦
Wide ±1V
P-P
Differential Analog Input Voltage
Range
♦
400MHz, -3dB Input Bandwidth
♦
On-Chip 2.048V Precision Bandgap Reference
♦
User-Selectable Output Format—Two’s
Complement or Offset Binary
♦
48-Pin TQFP Package with Exposed Pad for
Improved Thermal Dissipation
MAX1180
Ordering Information
PART
MAX1180ECM
MAX1180ECM+
TEMP RANGE
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
48 TQFP-EP*
48 TQFP-EP*
+Denotes
a lead-free and RoHS-compliant package.
*EP
= Exposed paddle.
Pin Configuration
REFN
REFP
REFIN
REFOUT
D9A
D8A
D7A
D6A
D5A
D4A
D3A
D2A
48
47
46
45
44
43
42
41
40
39
38
COM
V
DD
GND
INA+
INA-
V
DD
GND
INB-
INB+
GND
V
DD
CLK
37
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
36
35
34
33
32
31
30
29
28
27
D1A
D0A
OGND
OV
DD
OV
DD
OGND
D0B
D1B
D2B
D3B
D4B
D5B
Applications
High Resolution Imaging
I/Q Channel Digitization
Multichannel IF Undersampling
Instrumentation
Video Application
MAX1180
EP
26
25
GND
V
DD
V
DD
GND
48 TQFP-EP
Functional Diagram appears at end of data sheet.
NOTE:
THE PIN 1 INDICATOR FOR LEAD-FREE PACKAGES IS REPLACED
BY A "+" SIGN.
________________________________________________________________
Maxim Integrated Products
T/B
SLEEP
PD
OE
D9B
D8B
D7B
D6B
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Dual 10-Bit, 105Msps, 3.3V, Low-Power ADC
with Internal Reference and Parallel Outputs
MAX1180
ABSOLUTE MAXIMUM RATINGS
V
DD
, OV
DD
to GND ...............................................-0.3V to +3.6V
OGND to GND.......................................................-0.3V to +0.3V
INA+, INA-, INB+, INB- to GND ...............................-0.3V to V
DD
REFIN, REFOUT, REFP, REFN, CLK,
COM to GND ............................................-0.3V to (V
DD
+ 0.3V)
OE,
PD, SLEEP, T/B, D9A–D0A,
D9B–D0B to OGND ................................-0.3V to (OV
DD
+ 0.3V)
Continuous Power Dissipation (T
A
= +70°C)
48-Pin TQFP-EP (derate 30.4mW/°C above +70°C) ...2430mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-60°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
DD
= 3.3V, OV
DD
= 2.5V; 0.1µF and 1.0µF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through a
10kΩ resistor, V
IN
= 2V
P-P
(differential with respect to COM), C
L
= 10pF at digital outputs (Note 1), f
CLK
= 105.263MHz, T
A
= T
MIN
to
T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 2)
PARAMETER
DC ACCURACY
Resolution
Integral Nonlinearity
Differential Nonlinearity
Offset Error
Gain Error
ANALOG INPUT
Differential Input Voltage Range
Common-Mode Input Voltage
Range
Input Resistance
Input Capacitance
CONVERSION RATE
Maximum Clock Frequency
Data Latency
DYNAMIC CHARACTERISTICS
f
INA or B
= 7.47MHz, T
A
= +25°C
Signal-to-Noise Ratio (Note 3)
SNR
f
INA or B
= 20MHz, T
A
= +25°C
f
INA or B
= 50.078MHz
Signal-to-Noise and Distortion
(Note 3)
f
INA or B
= 7.47MHz, T
A
= +25°C
SINAD
f
INA or B
= 20MHz, T
A
= +25°C
f
INA or B
= 50.078MHz
Spurious-Free Dynamic
Range (Note 3)
f
INA or B
= 7.47MHz, T
A
= +25°C
SFDR
f
INA or B
= 20MHz, T
A
= +25°C
f
INA or B
= 50.078MHz
Total Harmonic Distortion
(First Four Harmonics) (Note 3)
f
INA or B
= 7.47MHz, T
A
= +25°C
THD
f
INA or B
= 20MHz, T
A
= +25°C
f
INA or B
= 50.078MHz
60
54.7
55
59
58.5
58
58.2
58.1
57.6
72
72
70
-71
-70
-69
-59
dBc
dBc
dB
dB
f
CLK
105
5
MHz
Clock
Cycles
V
DIFF
V
CM
R
IN
C
IN
Switched capacitor load
Differential or single-ended inputs
±1.0
V
DD
/
2
±
0.5
20
5
V
V
kΩ
pF
INL
DNL
f
IN
= 7.47MHz
f
IN
= 7.47MHz, no missing codes guaranteed
-1.0
-1.8
0
10
±0.75
±0.4
±2.5
+1.5
+1.8
±2
Bits
LSB
LSB
% FS
% FS
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
2
_______________________________________________________________________________________
Dual 10-Bit, 105Msps, 3.3V, Low-Power ADC
with Internal Reference and Parallel Outputs
MAX1180
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 3.3V, OV
DD
= 2.5V; 0.1µF and 1.0µF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through a
10kΩ resistor, V
IN
= 2V
P-P
(differential with respect to COM), C
L
= 10pF at digital outputs (Note 1), f
CLK
= 105.263MHz, T
A
= T
MIN
to
T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 2)
PARAMETER
Third-Harmonic Distortion
(Note 3)
SYMBOL
HD3
CONDITIONS
f
INA or B
= 7.47MHz
f
INA or B
= 20MHz
f
INA or B
= 50.078MHz
Intermodulation Distortion
Small-Signal Bandwidth
Full-Power Bandwidth
Aperture Delay
Aperture Jitter
Overdrive Recovery Time
Differential Gain
Differential Phase
Output Noise
INTERNAL REFERENCE
Reference Output Voltage
Reference Temperature
Coefficient
Load Regulation
BUFFERED EXTERNAL REFERENCE
(V
REFIN
= 2.048V)
REFIN Input Voltage
Positive Reference Output
Voltage
Negative Reference Output
Voltage
Differential Reference Output
Voltage Range
REFIN Resistance
Maximum REFP, COM Source
Current
Maximum REFP, COM Sink
Current
Maximum REFN Source Current
Maximum REFN Sink Current
V
REFIN
V
REFP
V
REFN
∆V
REF
R
REFIN
I
SOURCE
I
SINK
I
SOURCE
I
SINK
∆V
REF
= V
REFP
- V
REFN
0.95
2.048
2.162
1.138
1.024
> 50
5
-250
250
-5
1.10
V
V
V
V
MΩ
mA
µA
µA
mA
REFOUT
TC
REF
2.048
±3%
60
1.25
V
ppm/°C
mV/mA
INA+ = INA- = INB+ = INB- = COM
FPBW
t
AD
t
AJ
For 1.5
✕
full-scale input
IMD
f
INA or B
= 38.055MHz at -6.5dBFS
f
INA or B
= 42.926MHz at -6.5dBFS
(Note 4)
Input at -20dBFS, differential inputs
Input at -0.5dBFS, differential inputs
MIN
TYP
-75
-75
-73
-74
500
400
1
2
2
±1
±0.25
0.2
dBc
MHz
MHz
ns
ps
RMS
ns
%
degrees
LSB
RMS
dBc
MAX
UNITS
_______________________________________________________________________________________
3
Dual 10-Bit, 105Msps, 3.3V, Low-Power ADC
with Internal Reference and Parallel Outputs
MAX1180
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 3.3V, OV
DD
= 2.5V; 0.1µF and 1.0µF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through a
10kΩ resistor, V
IN
= 2V
P-P
(differential with respect to COM), C
L
= 10pF at digital outputs (Note 1), f
CLK
= 105.263MHz, T
A
= T
MIN
to
T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 2)
PARAMETER
SYMBOL
R
REFP,
R
REFN
∆V
REF
V
COM
V
REFP
V
REFN
CONDITIONS
Measured between REFP and COM and
REFN and COM
∆V
REF
= V
REFP
- V
REFN
MIN
TYP
MAX
UNITS
UNBUFFERED EXTERNAL REFERENCE
(V
REFIN
= AGND, reference voltage applied to REFP, REFN, and COM )
REFP, REFN Input Resistance
Differential Reference Input
Voltage Range
COM Input Voltage Range
REFP Input Voltage
REFN Input Voltage
4
1.024
±10%
V
DD
/ 2
±10%
V
COM
+
∆V
REF
/ 2
V
COM
-
∆V
REF
/ 2
0.8 x
V
DD
0.8 x
OV
DD
0.2 x
V
DD
0.2 x
OV
DD
0.1
V
IH
= OV
DD
or V
DD
(CLK)
V
IL
= 0
5
I
SINK
= -200µA
I
SOURCE
= 200µA
OE
= OV
DD
OE
= OV
DD
2.7
1.7
Operating, f
INA or B
= 20MHz at -0.5dBFS
Analog Supply Current
I
VDD
Sleep mode
Shutdown, clock idle, PD =
OE
= OV
DD
5
3.3
2.5
125
2.8
1
15
3.6
3.6
156
OV
DD
- 0.2
±10
0.2
±5
±5
V
µA
pF
V
V
µA
pF
V
V
mA
µA
kΩ
V
V
V
V
DIGITAL INPUTS (CLK, PD,
OE,
SLEEP, T/B)
CLK
Input High Threshold
V
IH
PD,
OE,
SLEEP, T/B
CLK
Input Low Threshold
V
IL
PD,
OE,
SLEEP, T/B
Input Hysteresis
Input Leakage
Input Capacitance
Output-Voltage Low
Output-Voltage High
Three-State Leakage Current
Three-State Output Capacitance
POWER REQUIREMENTS
Analog Supply Voltage Range
Output Supply Voltage Range
V
DD
OV
DD
V
HYST
I
IH
I
IL
C
IN
V
OL
V
OH
I
LEAK
C
OUT
V
V
DIGITAL OUTPUTS (D9A–D0A, D9B–D0B)
4
_______________________________________________________________________________________
Dual 10-Bit, 105Msps, 3.3V, Low-Power ADC
with Internal Reference and Parallel Outputs
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 3.3V, OV
DD
= 2.5V; 0.1µF and 1.0µF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through a
10kΩ resistor, V
IN
= 2V
P-P
(differential with respect to COM), C
L
= 10pF at digital outputs (Note 1), f
CLK
= 105.263MHz, T
A
= T
MIN
to
T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
Operating, C
L
= 15pF , f
INA or B
= 20MHz at
-0.5dBFS
Output Supply Current
I
OVDD
Sleep mode
Shutdown, clock idle, PD =
OE
= OV
DD
Operating, f
INA or B
= 20MHz at -0.5dBFS
Power Dissipation
PDISS
Sleep mode
Shutdown, clock idle, PD =
OE
= OV
DD
Power-Supply Rejection Ratio
TIMING CHARACTERISTICS
CLK Rise to Output Data Valid
Output Enable Time
Output Disable Time
CLK Pulse-Width High
CLK Pulse-Width Low
Wake-Up Time (Note 6)
t
DO
t
ENABLE
t
DISABLE
t
CH
t
CL
t
WAKE
Figure 3 (Note 5)
Figure 4
Figure 4
Figure 3, clock period: 9.5ns
Figure 3, clock period: 9.5ns
Wakeup from sleep mode
Wakeup from shutdown
f
INA or B
= 20MHz at -0.5dBFS
f
INA or B
= 20MHz at -0.5dBFS
f
INA or B
= 20MHz at -0.5dBFS
5
10
1.5
4.75
±1.5
4.75
±1.5
0.18
1.5
-70
0.02
0.25
±0.2
8
ns
ns
ns
ns
ns
µs
PSRR
Offset
Gain
MIN
TYP
15
100
2
413
9.2
3
±0.2
±0.1
50
10
511
MAX
UNITS
mA
µA
mW
µW
mV/V
%/V
MAX1180
CHANNEL-TO-CHANNEL MATCHING
Crosstalk
Gain Matching
Phase Matching
dB
dB
degrees
Note 1:
Equivalent dynamic performance is obtainable over full OV
DD
range with reduced C
L
.
Note 2:
Specifications at
≥
+25°C are guaranteed by production test and < +25°C are guaranteed by design and characterization.
Note 3:
SNR, SINAD, THD, SFDR, and HD3 are based on an analog input voltage of -0.5dBFS, referenced to a 1.024V full-scale
input voltage range.
Note 4:
Intermodulation distortion is the total power of the intermodulation products relative to the individual carrier. This number is
6dB or better, if referenced to the two-tone envelope.
Note 5:
Digital outputs settle to V
IH
, V
IL
. Parameter guaranteed by design.
Note 6:
With REFIN driven externally, REFP, COM, and REFN are left floating while powered down.
_______________________________________________________________________________________
5
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