74VHC157 Quad 2-Input Multiplexer
May 2007
74VHC157
Quad 2-Input Multiplexer
Features
■
High Speed: t
PD
=
4.1ns (Typ.) at V
CC
=
5V
■
Low power dissipation: I
CC
=
4µA (Max.) at T
A
=
25°C
■
High noise immunity: V
NIH
=
V
NIL
=
28% V
CC
(Min.)
■
Power down protection is provided on all inputs
■
Low noise: V
OLP
=
0.8V (Max.)
■
Pin and function compatible with 74HC157
tm
General Description
The VHC157 is an advanced high speed CMOS Quad
2-Channel Multiplexer fabricated with silicon gate CMOS
technology. It achieves the high speed operation similar
to equivalent Bipolar Schottky TTL while maintaining the
CMOS low power dissipation.
It consists of four 2-input digital multiplexers with com-
mon select and enable inputs. When the ENABLE input
is held “H” level, selection of data is inhibited and all the
outputs become “L” level. The SELECT decoding deter-
mines whether the I
0x
or I
1x
inputs get routed to their cor-
responding outputs.
An Input protection circuit ensures that 0V to 7V can be
applied to the input pins without regard to the supply
voltage. This device can be used to interface 5V to 3V
systems and on two supply systems such as battery
back up. This circuit prevents device destruction due to
mismatched supply and input voltages.
Ordering Information
Order Number
74VHC157M
74VHC157SJ
74VHC157MTC
Package
Number
M16A
M16D
MTC16
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150”
Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
4.4mm Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the
ordering number.
Connection Diagram
Pin Description
Pin Names
I
0a
–I
0d
I
1a
–I
1d
E
S
Z
a
–Z
d
Description
Source 0 Data Inputs
Source 1 Data Inputs
Enable Input
Select Input
Outputs
©1992 Fairchild Semiconductor Corporation
74VHC157 Rev. 1.2
www.fairchildsemi.com
74VHC157 Quad 2-Input Multiplexer
Logic Symbols
Functional Description
The VHC157 is a quad 2-input multiplexer. It selects four
bits of data from two sources under the control of a
common Select input (S). The Enable input (E) is active-
LOW. When E is HIGH, all of the outputs (Z) are forced
LOW regardless of all other inputs. The VHC157 is the
logic implementation of a 4-pole, 2-position switch where
the position of the switch is determined by the logic
levels supplied to the Select input. The logic equations
for the outputs are shown below:
Z
a
=
E • (I
1a
• S + I
0a
• S)
IEEE/IEC
Z
b
=
E • (I
1b
• S + I
0b
• S)
Z
c
=
E • (I
1c
• S + I
0c
• S)
Z
d
=
E • (I
1d
• S + I
0d
• S)
A common use of the VHC157 is the moving of data from
two groups of registers to four common output busses.
The particular register from which the data comes is
determined by the state of the Select input. A less obvi-
ous use is as a function generator. The VHC157 can
generate any four of the sixteen different functions of two
variables with one variable common. This is useful for
implementing gating functions.
Truth Table
Inputs
E
H
L
L
L
L
Outputs
I
1
X
L
H
X
X
S
X
H
H
L
L
I
0
X
X
X
L
H
Z
L
L
H
L
H
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
©1992 Fairchild Semiconductor Corporation
74VHC157 Rev. 1.2
www.fairchildsemi.com
2
74VHC157 Quad 2-Input Multiplexer
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to
estimate propagation delays.
©1992 Fairchild Semiconductor Corporation
74VHC157 Rev. 1.2
www.fairchildsemi.com
3
74VHC157 Quad 2-Input Multiplexer
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
V
CC
V
IN
V
OUT
I
IK
I
OK
I
OUT
I
CC
T
STG
T
L
Supply Voltage
DC Input Voltage
DC Output Voltage
Input Diode Current
Output Diode Current
DC Output Current
DC V
CC
/ GND Current
Storage Temperature
Parameter
Rating
–0.5V to +7.0V
–0.5V to +7.0V
–0.5V to V
CC
+ 0.5V
–20mA
±20mA
±25mA
±50mA
–65°C to +150°C
260°C
Lead Temperature (Soldering, 10 seconds)
Recommended Operating Conditions
(1)
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
V
CC
V
IN
V
OUT
T
OPR
t
r
, t
f
Supply Voltage
Input Voltage
Output Voltage
Operating Temperature
Input Rise and Fall Time,
V
CC
=
3.3V ± 0.3V
V
CC
=
5.0V ± 0.5V
Parameter
Rating
2.0V to +5.5V
0V to +5.5V
0V to V
CC
–40°C to +85°C
0ns/V
∼
100ns/V
0ns/V
∼
20ns/V
Note:
1. Unused inputs must be held HIGH or LOW. They may not float.
©1992 Fairchild Semiconductor Corporation
74VHC157 Rev. 1.2
www.fairchildsemi.com
4
74VHC157 Quad 2-Input Multiplexer
DC Electrical Characteristics
T
A
=
25°C
Symbol
V
IH
V
IL
V
OH
T
A
=
–40°C to
+85°C
Max.
Min.
1.50
0.7 x V
CC
0.50
0.3 x V
CC
0.50
0.3 x V
CC
1.9
2.9
4.4
2.48
3.80
V
V
Parameter
HIGH Level Input
Voltage
LOW Level Input
Voltage
HIGH Level
Output Voltage
V
CC
(V)
2.0
3.0–5.5
2.0
3.0–5.5
2.0
3.0
4.5
3.0
4.5
Conditions
Min.
1.50
0.7 x V
CC
Typ.
Max.
Units
V
V
IN
=
V
IH
or V
IL
I
OH
=
–50µA
1.9
2.9
4.4
2.0
3.0
4.5
I
OH
=
–4mA
I
OH
=
–8mA
V
IN
=
V
IH
or V
IL
I
OL
=
50µA
2.58
3.94
0.0
0.0
0.0
0.1
0.1
0.1
0.36
0.36
±0.1
4.0
V
OL
LOW Level
Output Voltage
2.0
3.0
4.5
3.0
4.5
0.1
0.1
0.1
0.44
0.44
±1.0
40.0
V
I
OL
=
4mA
I
OL
=
8mA
V
IN
=
5.5V or GND
V
IN
=
V
CC
or GND
I
IN
I
CC
Input Leakage
Current
Quiescent
Supply Current
0–5.5
5.5
µA
µA
Noise Characteristics
T
A
=
25°C
Symbol
V
OLP(3)
V
OLV(3)
V
IHD(3)
V
ILD(3)
Parameter
Quiet Output Maximum
Dynamic V
OL
Quiet Output Minimum
Dynamic V
OL
Minimum HIGH Level
Dynamic Input Voltage
Maximum LOW Level
Dynamic Input Voltage
V
CC
(V)
5.0
5.0
5.0
5.0
Conditions
C
L
=
50pF
C
L
=
50pF
C
L
=
50pF
C
L
=
50pF
Typ.
0.3
–0.3
Limits
0.8
–0.8
3.5
1.5
Units
V
V
V
V
Note:
2. Parameter guaranteed by design.
©1992 Fairchild Semiconductor Corporation
74VHC157 Rev. 1.2
www.fairchildsemi.com
5
实时操作系统RTOS
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
