NB3N2304NZ
3.3V 1:4 Clock Fanout
Buffer
Description
The NB3N2304NZ is a low skew 1−to 4 clock fanout buffer,
designed for high speed clock distribution such as in PCI−X
applications. The NB3N2304NZ guarantees low output−to−output
skew. Optimal design, layout and processing minimizes skew within a
device and from device−to−device.
The Output Enable (OE) pin forces the outputs LOW when LOW.
Features
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MARKING
DIAGRAM*
NB3N
2304
YWWA
G
•
•
•
•
•
•
•
•
Input/Output Clock Frequency up to 140 MHz
Low Skew Outputs (100 ps)
Output Enable
Operating Range: V
DD
= 3.0 V to 3.6 V
Ideal for PCI−X and networking clocks
Packaged in 8−pin TSSOP, 4.4 mm x 3 mm
Industrial Temperature Range
These are Pb−Free Devices*
TSSOP−8
DT SUFFIX
CASE 948S
1
DFN8
TBD SUFFIX
CASE 506AA
A
Y
WW
G
1
XX M
4
= Assembly Location
= Year
= Work Week
= Pb−Free Package
*For additional marking information, refer to
Application Note AND8002/D.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
Figure 1. Simplified Logic Diagram
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
©
Semiconductor Components Industries, LLC, 2006
September, 2006
−
Rev. 0
1
Publication Order Number:
NB3N2304NZ/D
NB3N2304NZ
OE
Logic
Control
Q1
Q2
IN
Q3
Q4
IN
OE
Q1
GND
1
2
3
4
8
7
6
5
Q4
Q3
V
DD
Q2
Figure 2. Block Diagram
Figure 3. NB3N2304NZ Package Pinout
(Top View)
Table 1. PIN DESCRIPTION
Pin #
1
2
3
4
5
6
7
8
Pin
Name
IN
OE
Q1
GND
Q2
V
DD
Q3
Q4
Type
LVCMOS/LVTTL Input
LVCMOS/LVTTL Input
LVCMOS/LVTTL Output
Power
(LV)CMOS/(LV)TTL Input
Power
(LV)CMOS/(LV)TTL Output
(LV)CMOS/(LV)TTL Input
Clock Input
Output Enable for the clock outputs. Outputs are enabled when forced HIGH. Outputs
are forced to logic LOW when OE is forced LOW.
Clock Output 1
Negative Supply Voltage; Connect to Ground, 0 V
Clock Output 2
Positive Supply Voltage (3.0 V to 3.6 V)
Clock Output 3
Clock Output 4
Description
Table 2. OE, OUTPUT ENABLE FUNCTION TABLE
Inputs
IN
L
H
L
H
OE
L
L
H
H
L
L
L
H
Outputs
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2
NB3N2304NZ
Table 3. ATTRIBUTES
Characteristics
ESD Protection
Human Body Model
Machine Model
Value
> 2kV
> 200 V
Level 1
UL 94 V−O @ 0.125 in
480 Devices
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
Flammability Rating
Transistor Count
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
Oxygen Index: 28 to 34
Table 4. MAXIMUM RATINGS
Symbol
V
DD
V
I
T
A
T
stg
q
JA
q
JC
T
SOL
Parameter
Positive Power Supply
Input Voltage
Operating Temperature Range, Industrial
Storage Temperature Range
Thermal Resistance (Junction−to−Ambient)
Thermal Resistance (Junction−to−Case)
Wave Solder
Pb−Free
(Note 2)
0 lfpm
500 lfpm
TSSOP−8
TSSOP−8
265
Condition 1
GND = 0 V
Condition 2
Rating
V
DD
+ 0.5V
GND – 0.5
v
V
I
v
V
DD
+ 0.5
w
−40
to
v
+85
−65
to +150
Unit
V
V
°C
°C
°C/W
°C/W
°C/W
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
2. EDEC standard multilayer board
−
2S2P (2 signal, 2 power).
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NB3N2304NZ
Table 5. DC CHARACTERISTICS
V
DD
= 3.0 V to 3.6 V, GND = 0 V, T
A
=
−40°C
to +85°C
Symbol
I
DD
V
OH
V
OL
V
IH
V
IL
I
IH
I
IL
CIN
Characteristic
Power Supply Current @ 66.66 MHz, Unloaded Outputs
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage, IN and OE (Note 3)
Input LOW Voltage, IN and OE (Note 3)
Input HIGH Current, V
IN
= V
DD
Input LOW Current, V
IN
= 0 V
Input Capacitance, IN, OE
−50
−100
5
−
IOH =
−24
mA
−IOH
=
−12
mA
−IOL
= 24 mA
−IOL
= 12 mA
2.0
0.8
50
100
7
2.0
2.4
0.8
0.55
Min
Typ
12
Max
25
Unit
mA
V
V
V
V
mA
mA
pF
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
3. IN input has a threshold voltage of V
DD
/2.
Table 6. AC CHARACTERISTICS
V
DD
= 3.0 V to 3.6 V, GND = 0 V, T
A
=
−40°C
to +85°C (Note 4) (Figure 4)
Symbol
f
in
t
DCskew
tr/tf
t
pd
t
skew
t
pu
Input Clock Frequency
Duty Cycle Skew = t2
÷
t1 (Figure 4) Measured at 1.5 V
Output Rise and Fall Times; 0.8 V to 2.0 V
Propagation Delay, IN−to−Qn (Note 5)
Output−to−Output Skew; (Note 5)
Powerup Time for V
DD
to Reach Minimum Specified Voltage
0.05
2.5
Characteristic
Min
DC
40
50
0.9
3.5
Typ
Max
140
60
1.5
5
100
50
Unit
MHz
%
ns
ns
ps
ms
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
4. All outputs loaded equally with C
L
= 25 pF to GND. Duty cycle out = duty in. A 0.01
mF
decoupling capacitor should be connected between
V
DD
and GND.
5. Measured on rising edges at V
DD
B
2; all outputs with equal loading.
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NB3N2304NZ
Duty Cycle Timing
t
1
t
2
1.5 V
All Outputs Rise/Fall Time
2.0 V
0.8 V
OUTPUT
t
r
2.0 V
0.8 V
t
f
3.3 V
0V
1.5 V
1.5 V
Output−Output Skew
1.5 V
OUTPUT
OUTPUT
t
SKEW
Input−Output Propagation Delay
V
DD
/2
INPUT
1.5 V
OUTPUT
t
pd
V
DD
/2
Figure 4. Switching Waveforms
ORDERING INFORMATION
Device
NB3N2304NZDTG
NB3N2304NZDTR2G
NB3N2304NZMNR4G*
Package
TSSOP−8
(Pb−Free)
TSSOP−8
(Pb−Free)
DFN8
(Pb−Free)
Shipping
†
100 Units / Rail
2500 / Tape & Reel
1000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*Contact a sales representative.
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