SPN2054
N-Channel Enhancement Mode MOSFET
DESCRIPTION
The SPN2054 is the N-Channel logic enhancement mode
power field effect transistors are produced using high cell
density , DMOS trench technology.
This high density process is especially tailored to
minimize on-state resistance. These devices are
particularly suited for low voltage application, such as
DC/DC converter and Desktop computer power
management.
The package is universally preferred for commercial
industrial surface mount applications
FEATURES
20V/12A,R
DS(ON)
=40mΩ@V
GS
=10V
20V/ 7A,R
DS(ON)
=45mΩ@V
GS
=4.5V
20V/ 4A,R
DS(ON)
=50mΩ@V
GS
=2.5V
20V/ 2A,R
DS(ON)
=60mΩ@V
GS
=1.8V
Super high density cell design for extremely low
RDS (ON)
Exceptional on-resistance and maximum DC
current capability
TO-252-2L package design
APPLICATIONS
Power Management in Desktop Computer
DC/DC Converter
LCD Display inverter
PIN CONFIGURATION(TO-252-2L)
PART MARKING
2006/08/16
Ver.3
Page 1
SPN2054
N-Channel Enhancement Mode MOSFET
PIN DESCRIPTION
Pin
1
2
3
Symbol
G
S
D
Description
Gate
Source
Drain
ORDERING INFORMATION
Part Number
SPN2054T252RG
※
Week Code : A ~ Z( 1 ~ 26 ) ; a ~ z( 27 ~ 52 )
※
SPN2054T252RG : Tape Reel ; Pb – Free
Package
TO-252-2L
Part
Marking
SPN2054
ABSOULTE MAXIMUM RATINGS
(T
A
=25
℃
Unless otherwise noted)
Parameter
Drain-Source Voltage
Gate –Source Voltage
Continuous Drain Current(T
J
=150
℃
)
Pulsed Drain Current
Continuous Source Current(Diode Conduction)
Power Dissipation
Operating Junction Temperature
Storage Temperature Range
Thermal Resistance-Junction to Ambient
T
A
=25℃
T
A
=70℃
T
A
=25℃
T
A
=70℃
Symbol
V
DSS
V
GSS
I
D
I
DM
I
S
P
D
T
J
T
STG
R
θJA
Typical
20
±12
Unit
V
V
A
A
A
W
℃
℃
℃/W
12
8
20
12
40
20
-55/150
-55/150
105
2006/08/16
Ver.3
Page 2
SPN2054
N-Channel Enhancement Mode MOSFET
ELECTRICAL CHARACTERISTICS
(T
A
=25
℃
Unless otherwise noted)
Parameter
Static
Drain-Source Breakdown Voltage
Gate Threshold Voltage
Gate Leakage Current
Zero Gate Voltage Drain Current
Symbol
Conditions
Min.
Typ
Max.
Unit
V
(BR)DSS
V
GS
=0V,I
D
=250uA
V
GS(th)
V
DS
=V
GS
,I
D
=250uA
I
GSS
I
DSS
V
DS
=0V,V
GS
=±12V
V
DS
=20V,V
GS
=0V
V
DS
=20V,V
GS
=0V
T
J
=55℃
V
GS
=10V,I
D
=12A
V
GS
=4.5V,I
D
=7A
V
GS
=2.5V,I
D
=4A
V
GS
=1.8V,I
D
=2A
V
DS
=5V,I
D
=-3.6A
I
S
=7A,V
GS
=0V
20
0.36
1.0
±100
1
5
0.031
0.035
0.040
0.048
10
0.95
4.8
1.0
1.0
485
85
40
8
14
18
35
16
0.040
0.045
0.050
0.060
1.2
8
V
nA
uA
Drain-Source On-Resistance
Forward Transconductance
Diode Forward Voltage
Dynamic
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-On Time
Turn-Off Time
R
DS(on)
gfs
V
SD
Q
g
Q
gs
Q
gd
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Ω
S
V
V
DS
=10V,V
GS
=4.5V
I
D
≡12A
nC
V
DS
=10V,V
GS
=0V
f=1MHz
pF
V
DD
=10V,R
L
=6Ω
I
D
≡1.0A,V
GEN
=4.5V
R
G
=6Ω
12
30
12
ns
2006/08/16
Ver.3
Page 3
SPN2054
N-Channel Enhancement Mode MOSFET
TYPICAL CHARACTERISTICS
2006/08/16
Ver.3
Page 4
SPN2054
N-Channel Enhancement Mode MOSFET
TYPICAL CHARACTERISTICS
2006/08/16
Ver.3
Page 5
微控制器 MCU
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
