19-4445; Rev 0; 2/09
KIT
ATION
EVALU
E
BL
AVAILA
DC-DC Converter with Integrated Scan Driver,
VGL Controller, Op Amp, and LDO for TFT LCD
General Description
The MAX17103 includes a high-performance step-up
regulator, a 350mA low-dropout linear regulator, a high-
speed operational amplifier, a negative linear regulator
controller, and a high-voltage, level-shifting scan driver.
The device is optimized for thin-film transistor (TFT) liq-
uid-crystal display (LCD) applications.
The step-up DC-DC converter provides the regulated
supply voltage for panel source driver ICs. The high
1.2MHz switching frequency allows the use of ultra-
small inductors and ceramic capacitors. The current-
mode control architecture provides fast-transient
response to pulsed loads typical of source driver loads.
The step-up regulator features an adjustable soft-start
and an adjustable cycle-by-cycle current limit.
The high-current operational amplifier is designed to
drive the LCD backplane (VCOM). The amplifier fea-
tures high output current (±200mA), fast slew rate
(50V/µs), wide bandwidth (12MHz), and rail-to-rail
inputs and outputs.
The low-voltage LDO linear regulator has an integrated
0.8Ω pass element and can provide at least 350mA.
The output voltage is accurate within ±1%.
The high-voltage, level-shifting scan driver is designed to
drive the TFT panel gate drivers. Its three outputs can
swing up to 40V (max) to swiftly drive capacitive loads. To
save power, the two complementary outputs are designed
to allow charge sharing during state changes.
The MAX17103 is available in a 32-pin, 5mm x 5mm,
thin QFN package with a maximum thickness of 0.8mm
for thin LCD panels.
Features
o
2.3V to 5.5V IN Supply Voltage Range
o
1.2MHz Current-Mode Step-Up Regulator
Fast-Transient Response
High-Accuracy Reference (1%)
Integrated 16V, 2A, 200mΩ MOSFET
High Efficiency (> 85%)
Adjustable Cycle-by-Cycle Current Limit
o
High-Performance Operational Amplifier
200mA Output Short-Circuit Current
50V/µs Slew Rate
12MHz, -3dB Bandwidth
o
Low-Dropout Linear Regulator
High-Accuracy Output Voltage (1.0%)
o
High-Voltage Drivers with Scan Logic
+35V to -15V Outputs
40V (Max) Swing
o
Linear Regulator Controller for Gate-Off Supply
o
Thermal-Overload Protection
o
32-Pin, 5mm x 5mm, Thin QFN Package
MAX17103/AUO-P1721.14
Simplified Operating Circuit
V
VGL
V
GHON
V
IN
V
MAIN
DRVN
FBN
REF
VGL
CONTROLLER
IN
LX
PGND
STEP-UP
CONTROLLER
FB
COMP
SS
ENA
LDOADJ
LINEAR
REGULATOR
LDOO
Applications
Notebook Computer Displays
V
LOGIC
VDET
CD
MAX17103
AUO-P1721.14
AGND
OPAS
Ordering Information
RST
VOLTAGE
DETECTOR
OP
OUT
To VCOM
BACKPLANE
PART
MAX17103ETJ+
TEMP RANGE
-40°C to +85°C
PIN-PACKAGE
32 Thin QFN-EP*
V
GHON
GHON
CK
CS
SYSTEM
XCK
ST
SCAN
DRIVER
LOGIC
POS
CKH
AUO-P1721.14
-40°C to +85°C
32 Thin QFN-EP*
+Denotes
lead(Pb)-free/RoHS-compliant package.
*EP
= Exposed pad.
QS
XCKH
STH
PANEL
VGLC
GD
V
VGL
VGL
V
GHON
Pin Configuration appears at end of data sheet.
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
DC-DC Converter with Integrated Scan Driver,
VGL Controller, Op Amp, and LDO for TFT LCD
MAX17103/AUO-P1721.14
ABSOLUTE MAXIMUM RATINGS
IN,
RST
to AGND ...................................................-0.3V to +7.5V
FB, FBN, CD, ENA, VDET, SS, CS, ST,
CK, XCK to AGND...................................-0.3V to (V
IN
+ 0.3V)
LDOADJ, LDOO, COMP, REF to AGND ......-0.3V to (V
IN
+ 0.3V)
PGND to AGND .....................................................-0.3V to +0.3V
LX, OPAS to PGND.................................................-0.3V to +18V
DRVN to AGND.............................................-20V to (V
IN
+ 0.3V)
GHON to PGND......................................................-0.3V to +40V
VGL to PGND ........................................................ -20V to +0.3V
GHON to VGL…………………………………………-0.3V to +45V
GD to PGND ..........................................-0.3V to (V
GHON
+ 0.3V)
GD to VGHON ........................................................-15V to +0.3V
VGLC, STH, CKH, XCKH ........(-0.3V + V
VGL
) to (V
GHON
+ 0.3V)
OUT, POS to PGND ................................-0.3V to (V
OPAS
+ 0.3V)
POS to OUT ...........................................................-7.5V to +7.5V
OUT Maximum Continuous Output Current......................±75mA
GHON, STH, VGL, CKH, and XCKH RMS Current Rating 120mA
LX, PGND RMS Current Rating.............................................1.6A
Continuous Power Dissipation (T
A
= +70°C)
32-Pin TQFN (derate 24.9mW/°C above +70°C).......1990mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +160°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
IN
= +3V, Circuit of Figure 1, V
OPAS
= +8.5V,
T
A
= 0°C to +85°C,
unless otherwise noted. Typical values are at T
A
= +25°C.)
PARAMETER
IN Input-Voltage Range
IN Undervoltage Lockout
IN Standby Current
GHON Standby Current
OPAS Shutdown Current
IN Quiescent Current
Duration to Trigger Fault Condition
Thermal Shutdown
REFERENCE
REF Output Voltage
REF Load Regulation
REF Sink Current
STEP-UP REGULATOR
Output-Voltage Range
Frequency
Oscillator Maximum Duty Cycle
FB Regulation Voltage
FB Fault Trip Level
Overvoltage Protection
FB Load Regulation
FB Line Regulation
FB Input Bias Current
FB Transconductance
FB Voltage Gain
LX Current Limit
No load
Falling edge
OPAS rising (Note 1)
0 < I
LOAD
< full load, transient only
V
IN
= 2.5V to 5.5V, T
A
= +25°C
V
IN
= 2.5V to 5.5V, T
A
= 0°C to +85°C
V
FB
= 1.3V, T
A
= +25°C
I = ±2.5μA at COMP, FB = COMP
FB to COMP
V
FB
= 1.2V, duty cycle = 60%, R
ENA
= 10k , V
LDOO
= 2.5V
1.6
65
75
160
700
2
2.4
V
IN
1000
91
1.227
1.05
16.5
1200
94
1.240
1.10
17
-0.5
0.1
0.15
0.2
200
280
15
1400
97
1.252
1.15
18
V
kHz
%
V
V
V
%
%/V
nA
μS
V/V
A
No external load
0 < I
LOAD
< 50μA
In regulation
1.227
-20
1.240
1.252
+10
V
mV
μA
Temperature rising
CONDITIONS
V
IN
rising, typical hysteresis = 150mV
V
ENA
= 0, V
IN
= 5.5V, V
GHON
= 4V, V
GL
= 0
V
ENA
= 0, V
IN
= 5.5V, V
GHON
= 4V, V
GL
= 0
V
ENA
= 0, V
IN
= 5.5V, V
GHON
= 4V, V
GL
= 0
V
FB
= 1.3V, LX not switching
V
FB
= 1.2V, LX switching
MIN
2.3
1.80
2.00
0.7
100
10
1
2
160
+160
TYP
MAX
5.5
2.20
2
200
30
2.5
4
UNITS
V
V
mA
μA
μA
mA
ms
°C
2
_______________________________________________________________________________________
DC-DC Converter with Integrated Scan Driver,
VGL Controller, Op Amp, and LDO for TFT LCD
ELECTRICAL CHARACTERISTICS (continued)
(V
IN
= +3V, Circuit of Figure 1, V
OPAS
= +8.5V,
T
A
= 0°C to +85°C,
unless otherwise noted. Typical values are at T
A
= +25°C.)
PARAMETER
CONDITIONS
MIN
TYP
0.200
10
0.20
4
420
0
MAX
0.500
20
0.30
6
470
+20
+6
+200
25
10
20
UNITS
μA
V/A
μA
mV
mV
mV
nA
mV
mA
μA
ms
ms
100
100
V
GHON
V
GHON
V
GHON
- 12
- 11
-8
V
GHON
6
-50
3
V
OPAS
- 20
V
OPAS
- 1.5
V
OPAS
-5
V
OPAS
- 1.3
2
1.5
12
115
-15
8
1.6
T
A
= +25°C, VDET = 1.3V
VDET falling, hysteresis = 50mV
T = 120k
V
RST
= 0.4V
-1
1.078
80
1
1.1
120
8
5.5
+1
1.122
160
50
12
200
+15
20
1.8
15
+50
5
V
V
V
nA
mA
mV
V
mV
V
V/μs
MHz
mA
mV
MHz
V
μA
V
k
mA
LX On-Resistance
I
LX
= 1A
LX Leakage Current
V
LX
= 13.5V, T
A
= +25°C
Current-Sense Transresistance
Soft-Start Pullup Current
GATE-OFF LINEAR REGULATOR CONTROLLER
FBN Fault Trip Level
V
FBN
rising
FBN Regulation Voltage
I
DRVN
= 100μA
FBN Line-Regulation Error
V
IN
= 2.5V to 5.5V, I
DRVN
= 100μA
FBN Input Bias Current
V
FBN
= 0, T
A
= +25°C
FBN Effective Load Regulation Error
(Transconductance)
DRVN Source Current
DRVN Off-Leakage Current
Startup Delay from V
FB
= 90%
Soft-Start Period
GD SWITCH CONTROL
GD Pulldown Resistor
GD Pullup Resistor
GD Low Voltage Level
GD High Voltage Level
VCOM BUFFER
Supply Voltage (V
OPAS
)
Input Bias Current
OPAS Supply Current
UVLO or
RST
asserted
UVLO and
RST
unasserted
UVLO or
RST
asserted, V
GHON
> 11V
UVLO and
RST
unasserted, V
GHON
> 8V
V
DRVN
= -10V, I
DRVN
= 50μA to 1mA
V
FBN
= 300mV, V
DRVN
= -10V
V
FBN
= 0, V
DRVN
= -15V, T
A
= +25°C
1
MAX17103/AUO-P1721.14
0.10
2
370
-20
-6
-200
11
4
10
32
3
V
POS
= V
OPAS
/2, T
A
= +25°C
V
POS
= V
OPAS
/2, no load
I
OUT
= 100μA
Output-Voltage Swing High
I
OUT
= 75mA
Output-Voltage Swing Low
Slew Rate
-3dB Bandwidth
Short-Circuit Current
Input Offset Voltage
Gain-Bandwidth Product
VOLTAGE DETECTOR
Minimum V
IN
Operating Voltage
VDET Input Bias Current
VDET Threshold
Adjustable Delay Time Coefficient (K)
RST
Sink Current
I
OUT
= 100μA
I
OUT
= 75mA
5V pulse at POS; both rising and falling edges
R
L
= 10k , C
L
= 10pF
Short to V
OPAS
/2, sourcing and sinking
_______________________________________________________________________________________
3
DC-DC Converter with Integrated Scan Driver,
VGL Controller, Op Amp, and LDO for TFT LCD
MAX17103/AUO-P1721.14
ELECTRICAL CHARACTERISTICS (continued)
(V
IN
= +3V, Circuit of Figure 1, V
OPAS
= +8.5V,
T
A
= 0°C to +85°C,
unless otherwise noted. Typical values are at T
A
= +25°C.)
PARAMETER
LEVEL SHIFTERS
GHON-to-VGL Voltage Range
GHON Input-Voltage Range
VGL Input-Voltage Range
GHON Supply Current
VGL Supply Current
CKH, XCKH, STH Output-Voltage
Low
CKH, XCKH, STH Output-Voltage
High
CKH, XCKH, STH Rise Time
CKH, XCKH, STH Fall Time
CK-to-CKH, XCK-to-XCKH, ST-to-STH,
Rising Edge Propagation Delay
V
GHON
= 23V, CK, XCK, ST are low
V
VGL
= -6V, CK, XCK, ST are low
I
OUT
= 10mA (5
I
OUT
= 10mA (20
typ)
typ)
V
GHON
- 0.5
V
GHON
- V
VGL
12
-15
1
1
V
VGL
+ 0.05
V
GHON
- 0.2
0.75
0.25
2
0.5
60
60
100
I
OUT
= 10mA
I
OUT
= 10mA
V
GHON
- 0.5
V
VGL
+ 0.07
V
GHON
- 0.2
V
VGL
+ 0.25
1
μs
ns
ns
kHz
V
V
40
35
-3
2.1
2
V
VGL
+ 0.25
V
V
V
mA
mA
V
V
CONDITIONS
MIN
TYP
MAX
UNITS
C
LOAD
= 5nF, CS = high, V
GHON
= 25V, V
VGL
= -15V,
T
A
= +25°C
T
A
= 0°C to +85°C
C
LOAD
= 5nF, CS = high, V
GHON
= 25V, V
VGL
= -15V
C
LOAD
= 100pF
μs
CK-to -CKH, XCK-to-XCKH, ST to STH,
C
LOAD
= 100pF
Falling Edge Propagation Delay
CKH, XCKH Maximum Operating
Frequency
VGLC Output-Voltage Low
VGLC Output-Voltage High
CHARGE-SHARING FUNCTION
QS-to-CKH On-Resistance
CS-to-CKH/QS Propagation Delay
GHON - QS Switch Leakage Current
Dropout Voltage
LDOADJ Feedback Voltage
Current Limit
LDOADJ Line Regulation
LDOADJ Load Regulation
LDOADJ Input Bias Current
DIGITAL INPUTS
ENA, CS, CK, XCK, ST Input High
ENA, CS, CK, XCK, ST Input Low
CS, ST, CK, XCK Input Current
CK, XCK, ST = V
IN
, T
A
= +25°C
-1
V
IN
= 3.3V, V
LDOADJ
= 1.0V
V
IN
= 2.8V to 5.5V, I
OUT
= 100mA; V
LDOO
= 2.5V
I
OUT
= 1mA to 300mA, V
LDOO
= 2.5V
V
LDOADJ
= 1.3V, T
A
= +25°C
1.5
CS = low, T
A
= +25°C
V
IN
= 3.3V, V
LDOADJ
= 1.1V, I
OUT
= 0.35A
1.227
0.4
LOW-DROPOUT LINEAR REGULATOR
V
GHON
= 24V, V
VGL
= -6V; V
CKH
= V
XCKH
= 10V,
CS = low
200
100
400
ns
1
mA
mV
V
A
%/V
%/V
nA
V
0.6
+1
V
μA
300
1.24
0.55
0.1
0.2
100
500
1.252
0.7
0.3
0.5
200
4
_______________________________________________________________________________________
DC-DC Converter with Integrated Scan Driver,
VGL Controller, Op Amp, and LDO for TFT LCD
ELECTRICAL CHARACTERISTICS
(V
IN
= +3V, Circuit of Figure 1, V
OPAS
= +8.5V,
TA = -40°C to +85°C,
unless otherwise noted.) (Note 2)
PARAMETER
IN Input-Voltage Range
IN Standby Current
IN Quiescent Current
GHON Standby Current
OPAS Shutdown Current
REFERENCE
REF Output Voltage
REF Load Regulation
REF Sink Current
STEP-UP REGULATOR
Output-Voltage Range
Frequency
Oscillator Maximum Duty Cycle
FB Regulation Voltage
FB Fault Trip Level
FB Line Regulation
FB Transconductance
LX Current Limit
LX On-Resistance
Current-Sense Transresistance
Soft-Start Pullup Current
GATE-OFF LINEAR-REGULATOR CONTROLLER
FBN Fault Trip Level
FBN Regulation Voltage
FBN Line-Regulation Error
FBN Effective Load-Regulation Error
(Transconductance)
DRVN Source Current
GD SWITCH CONTROL
GD Pulldown Resistor
GD Pullup Resistor
GD Low-Voltage Level
GD High-Voltage Level
UVLO or
RST
asserted
UVLO and
RST
unasserted
UVLO or
RST
asserted, V
GHON
> 11V
UVLO and
RST
unasserted, V
GHON
> 8V
V
GHON
- 13.5
100
100
V
GHON
-8
V
GHON
V
V
V
FBN
rising (Note 2)
I
DRVN
= 100μA
V
IN
= 2.5V to 5.5V, I
DRVN
= 100μA
V
DRVN
= -10V, I
DRVN
= 50μA to 1mA
V
FBN
= 300mV, V
DRVN
= -10V
1
370
-20
-6
470
+20
+6
25
10
mV
mV
mV
mV
mA
No load, T
A
= +25°C to +85°C
Falling edge (Note 2)
V
IN
= 2.5V to 5.5V
I = ±2.5μA at COMP, FB = COMP
V
FB
= 1.2V, duty cycle = 60%, R
ENA
= 10k ,
V
LDOO
= 2.5V
I
LX
= 1A
0.10
2
75
1.6
V
IN
1000
91
1.227
1.05
15
1400
97
1.252
1.15
0.2
280
2.4
0.5
0.30
6
V/A
μA
V
kHz
%
V
V
%/V
μS
A
No external load
0 < I
LOAD
< 50μA
In regulation
1.227
1.252
20
10
V
mV
μA
(Note 1)
V
ENA
= 0, V
IN
= 5.5V, V
GHON
= 4V, V
GL
= 0
V
FB
= 1.3V, LX not switching
V
FB
= 1.2V, LX switching
V
ENA
= 0, V
IN
= 5.5V, V
GHON
= 4V, V
GL
= 0
V
ENA
= 0, V
IN
= 5.5V, V
GHON
= 4V, V
GL
= 0
CONDITIONS
MIN
2.3
1.80
TYP
MAX
5.5
2.20
2
2.5
4
200
30
UNITS
V
V
mA
mA
μA
μA
MAX17103/AUO-P1721.14
IN Undervoltage-Lockout Threshold V
IN
rising, typical hysteresis = 150mV
_______________________________________________________________________________________
5
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