MM74HC4316 Quad Analog Switch with Level Translator
February 1984
Revised March 2001
MM74HC4316
Quad Analog Switch with Level Translator
General Description
The MM74HC4316 devices are digitally controlled analog
switches implemented in advanced silicon-gate CMOS
technology. These switches have low “ON” resistance and
low “OFF” leakages. They are bidirectional switches, thus
any analog input may be used as an output and vice-versa.
Three supply pins are provided on the MM74HC4316 to
implement a level translator which enables this circuit to
operate with 0–6V logic levels and up to
±
6V analog switch
levels. The MM74HC4316 also has a common enable input
in addition to each switch's control which when HIGH will
disable all switches to their OFF state. All analog inputs
and outputs and digital inputs are protected from electro-
static damage by diodes to V
CC
and ground.
Features
s
Typical switch enable time: 20 ns
s
Wide analog input voltage range:
±
6V
s
Low “ON” resistance:
50 typ. (V
CC
−
V
EE
=
4.5V) 30 typ. (V
CC
−
V
EE
=
9V)
s
Low quiescent current: 80
µ
A maximum (74HC)
s
Matched switch characteristics
s
Individual switch controls plus a common enable
Ordering Code:
Order Number
MM74HC4316M
MM74HC4316SJ
MM74HC4316MTC
MM74HC4316N
Package Number
M16A
M16D
MTC16
N16E
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Diagram
Connection Diagram
Top View
Truth Table
Inputs
En
H
L
L
CTL
X
L
H
Switch
I/O–O/I
“OFF”
“OFF”
“ON”
© 2001 Fairchild Semiconductor Corporation
DS005369
www.fairchildsemi.com
MM74HC4316
Absolute Maximum Ratings
(Note 1)
(Note 2)
Supply Voltage (V
CC
)
Supply Voltage (V
EE
)
DC Control Input Voltage (V
IN
)
DC Switch I/O Voltage (V
IO
)
Clamp Diode Current (I
IK
, I
OK
)
DC Output Current, per pin (I
OUT
)
DC V
CC
or GND Current, per pin (I
CC
)
Storage Temperature Range (T
STG
)
Power Dissipation (P
D
)
(Note 3)
S.O. Package only
Lead Temperature (T
L
)
(Soldering 10 seconds)
260
°
C
600 mW
500 mW
Recommended Operating
Conditions
Min
2
0
0
Max
6
Units
V
V
V
−
0.5 to
+
7.5V
+
0.5 to
−
7.5V Supply Voltage (V )
CC
−
1.5 to V
CC
+
1.5V Supply Voltage (V )
V
EE
−
0.5 to V
CC
+
0.5V DC Input or Output Voltage
±
20 mA
)
(V , V
EE
−
6
V
CC
±
25 mA Operating Temperature Range (T )
A
±
50 mA Input Rise or Fall Times
−
65
°
C to
+
150
°
C
(t
r
, t
f
) V
CC
=
2.0V
V
CC
=
4.5V
V
CC
=
6.0V
V
CC
=
12.0V
IN
OUT
−
40
+
85
1000
500
400
250
°
C
ns
ns
ns
ns
Note 1:
Absolute Maximum Ratings are those values beyond which dam-
age to the device may occur.
Note 2:
Unless otherwise specified all voltages are referenced to ground.
Note 3:
Power Dissipation temperature derating — plastic “N” package:
−
12 mW/°C from 65°C to 85°C.
DC Electrical Characteristics
Symbol
V
IH
Parameter
Minimum HIGH Level
Input Voltage
V
IL
Maximum LOW Level
Input Voltage
R
ON
Conditions
(Note 4)
V
EE
V
CC
2.0V
4.5V
6.0V
2.0V
4.5V
6.0V
GND
−4.5V
−6.0V
GND
GND
−4.5V
−6.0V
GND
−4.5V
−6.0V
GND
GND
−6.0V
GND
−6.0V
GND
−6.0V
4.5V
4.5V
6.0V
2.0V
4.5V
4.5V
6.0V
4.5V
4.5V
6.0V
6.0V
6.0V
6.0V
6.0V
6.0V
6.0V
6.0V
100
40
30
100
40
50
20
10
5
5
T
A
=
25°C
Typ
1.5
3.15
4.2
0.5
1.35
1.8
170
85
70
180
80
60
40
15
10
10
±0.1
±60
±100
±40
±60
2.0
8.0
T
A
= −40
to 85°C T
A
= −55
to 125°C
Guaranteed Limits
1.5
3.15
4.2
0.5
1.35
1.8
200
105
85
215
100
75
60
20
15
15
±1.0
±600
±1000
±150
±300
20
80
1.5
3.15
4.2
0.5
1.35
1.8
220
110
90
240
120
80
70
20
15
15
±1.0
±600
±1000
±150
±300
40
160
V
V
V
V
V
V
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
µA
nA
nA
nA
nA
µA
µA
Units
Minimum “ON” Resistance V
CTL
=
V
IH
, I
S
=
2.0 mA
(Note 5)
V
IS
=
V
CC
to V
EE
(Figure 1)
V
CTL
=
V
IH
, I
S
=
2.0 mA
V
IS
=
V
CC
or V
EE
(Figure 1)
R
ON
Maximum “ON” Resistance V
CTL
=
V
IH
Matching
V
IS
=
V
CC
to V
EE
V
IN
=
V
CC
or GND
V
OS
=
V
CC
or V
EE
V
IS
=
V
EE
or V
CC
V
CTL
=
V
IL
(Figure 2)
V
IS
=
V
CC
to V
EE
V
CTL
=
V
IH
, V
OS
=
OPEN
(Figure 3)
V
IN
=
V
CC
or GND
I
OUT
=
0
µA
I
IN
I
IZ
Maximum Control
Input Current
Maximum Switch “OFF”
Leakage Current
I
IZ
Maximum Switch “ON”
Leakage Current
I
CC
Maximum Quiescent
Supply Current
Note 4:
For a power supply of 5V
±10%
the worst case on resistances (R
ON
) occurs for HC at 4.5V. Thus the 4.5V values should be used when designing
with this supply. Worst case V
IH
and V
IL
occur at V
CC
=
5.5V and 4.5V respectively. (The V
IH
value at 5.5V is 3.85V.) The worst case leakage current occurs
for CMOS at the higher voltage and so the 5.5V values should be used.
Note 5:
At supply voltages (V
CC
–V
EE
) approaching 2V the analog switch on resistance becomes extremely non-linear. Therefore it is recommended that
these devices be used to transmit digital only when using these supply voltages.
www.fairchildsemi.com
2
MM74HC4316
AC Electrical Characteristics
V
CC
=
2.0V
−
6.0V, V
EE
=
0V
−
6V, C
L
=
50 pF (unless otherwise specified)
Symbol
t
PHL
,
t
PLH
Parameter
Maximum Propagation
Delay Switch
In to Out
t
PZL
,
t
PZH
Maximum Switch
Turn “ON” Delay
(Control)
t
PHZ
,
t
PLZ
Maximum Switch
Turn “OFF” Delay
(Control)
t
PZL
,
t
PZH
Maximum Switch
Turn “ON” Delay
(Enable)
t
PLZ
,
t
PHZ
Maximum Switch
Turn “OFF” Delay
(Enable)
f
MAX
Minimum Frequency
Response (Figure 7)
Control to Switch
Feedthrough Noise
(Figure 8)
Crosstalk Between
any Two Switches
(Figure 9)
Switch OFF Signal
Feedthrough Isolation
(Figure 10)
THD
Sinewave Harmonic
Distortion
(Figure 11)
C
IN
C
IN
C
IN
C
PD
Maximum Control
Input Capacitance
Maximum Switch
Input Capacitance
Maximum Feedthrough
Capacitance
Power Dissipation
Capacitance
Note 6:
Adjust 0 dBm for F
=
1 KHz (Null R
L
/Ron Attenuation).
Note 7:
V
IS
is centered at V
CC
–V
EE
/2.
Note 8:
Adjust for 0 dBm.
Conditions
V
EE
V
CC
T
A
= +25°C
Typ
25
5
4
3
30
20
15
14
45
25
20
20
35
20
19
18
58
28
23
21
40
100
100
250
50
10
8
7
165
35
32
30
250
50
44
44
205
41
38
36
265
53
47
47
T
A
= −40°C
to
+85°C
T
A
= −55°C
to
+125°C
Guaranteed Limits
63
13
12
11
206
43
39
37
312
63
55
55
256
52
48
45
330
67
59
59
75
15
14
13
250
53
48
45
375
75
66
66
308
62
57
54
400
79
70
70
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
mV
mV
GND 2.0V
GND 4.5V
−4.5V
4.5V
−6.0V
6.0V
R
L
=
1 kΩ
GND 2.0V
GND 4.5V
−4.5V
4.5V
−6.0V
6.0V
R
L
=
1 kΩ
GND 2.0V
GND 4.5V
−4.5V
4.5V
−6.0V
6.0V
GND 2.0V
GND 4.5V
−4.5V
4.5V
−6.0V
6.0V
GND 2.0V
GND 4.5V
−4.5V
4.5V
−6.0V
6.0V
R
L
=
600Ω, V
IS
=
2V
PP
at (V
CC
−V
EE
/2)
R
L
=
600Ω, F
=
1 MHz
C
L
=
50 pF
(Note 7) (Note 8)
R
L
=
600Ω, F
=
1 MHz
0V
R
L
=
600Ω, F
=
1 MHz
V
CTL
=
V
IL
,
(Note 7) (Note 8)
R
L
=
10 KΩ, C
L
=
50 pF,
F
=
1 KHz
V
IS
=
4V
PP
0V
4.5V
0V
4.5V
4.5V
0V
4.5
−4.5V
4.5V
0V
4.5V
20 log (V
OS
/V
IS
)=
−3
dB (Note 6) (Note 7)
−4.5V
4.5V
−52
−50
−42
−44
dB
dB
dB
dB
−4.5V
4.5V
−4.5V
4.5V
0.013
0.008
5
35
%
%
pF
pF
pF
pF
V
IS
=
8V
PP
−4.5V
4.5V
V
CTL
=
GND
0.5
15
3
www.fairchildsemi.com
MM74HC4316
AC Test Circuits and Switching Time Waveforms
FIGURE 1. “ON” Resistance
FIGURE 2. “OFF” Channel Leakage Current
FIGURE 3. “ON” Channel Leakage Current
FIGURE 4. t
PHL
, t
PLH
Propagation Delay Time Signal Input to Signal Output
FIGURE 5. t
PZL
, t
PLZ
Propagation Delay Time Control to Signal Output
FIGURE 6. t
PZH
, t
PHZ
Propagation Delay Time Control to Signal Output
www.fairchildsemi.com
4
MM74HC4316
AC Test Circuits and Switching Time Waveforms
(Continued)
FIGURE 7. Frequency Response
FIGURE 8. Crosstalk: Control Input to Signal Output
FIGURE 9. : Crosstalk Between Any Two Switches
FIGURE 10. Switch OFF Signal Feedthrough Isolation
FIGURE 11. Sinewave Distortion
5
www.fairchildsemi.com
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
