DATASHEET
ISL22424
Dual Digitally Controlled Potentiometer (XDCP™) Low Noise, Low Power, SPI®
Bus, 256 Taps
The ISL22424 integrates two digitally controlled
potentiometers (DCP), control logic and non-volatile memory
on a monolithic CMOS integrated circuit.
The digitally controlled potentiometers are implemented with
a combination of resistor elements and CMOS switches. The
position of the wiper is controlled by the user through the SPI
serial interface. Each potentiometer has an associated
volatile Wiper Register (WRi) and a non-volatile Initial Value
Register (IVRi) that can be directly written to and read by the
user. The contents of the WRi control the position of the
wiper. At power-up the device recalls the contents of the
DCP’s IVRi to the corresponding WRi.
The ISL22424 also has 13 General Purpose non-volatile
registers that can be used as storage of lookup table for
multiple wiper position or any other valuable information.
The ISL22424 features a dual supply, that is beneficial for
applications requiring a bipolar range for DCP terminals
between V- and V
CC
.
Each DCP can be used as three-terminal potentiometer or
as two-terminal variable resistor in a wide variety of
applications including control, parameter adjustments, and
signal processing.
FN6425
Rev 1.00
September 9, 2015
Features
• Two potentiometers in one package
• 256 resistor taps
• SPI serial interface with write/read capability
• Daisy Chain Configuration
• Shutdown mode
• Non-volatile EEPROM storage of wiper position
• 13 General Purpose non-volatile registers
• High reliability
- Endurance: 1,000,000 data changes per bit per register
- Register data retention: 50 years @ T
55°C
• Wiper resistance: 70 typical @ 1mA
• Standby current <4µA max
• Shutdown current <4µA max
• Dual power supply
- V
CC
= 2.25V to 5.5V
- V- = -2.25V to -5.5V
• 10k 50kor 100k total resistance
• Extended industrial temperature range: -40ºC to +125ºC
• 14 Ld TSSOP or 16 Ld QFN
• Pb-free plus anneal product (RoHS compliant)
FN6425 Rev 1.00
September 9, 2015
Page 1 of 20
ISL22424
Ordering Information
PART NUMBER
(NOTES 1, 2)
ISL22424TFV14Z
(No
longer available,
recommended
replacement:
ISL22424WFR16Z-TK)
ISL22424TFR16Z
(No
longer available,
recommended
replacement:
ISL22424WFR16Z-TK)
ISL22424UFV14Z
(No
longer available,
recommended
replacement:
ISL22424WFR16Z-TK)
ISL22424UFR16Z
(No
longer available,
recommended
replacement:
ISL22424WFR16Z-TK)
ISL22424WFV14Z
ISL22424WFR16Z
NOTES:
1. Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are
MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
2. Add “-TK” suffix for 1,000 Tape and Reel option
PART MARKING
22424TFVZ
RESISTANCE
OPTION (k)
100
TEMPERATURE
RANGE (°C)
-40 to +125
PACKAGE
(Pb-Free)
14 Ld TSSOP
PKG. DWG. #
M14.173
22424TFRZ
100
-40 to +125
16 Ld QFN
L16.4x4A
22424UFVZ
50
-40 to +125
14 Ld TSSOP
M14.173
22424UFRZ
50
-40 to +125
16 Ld QFN
L16.4x4A
22424WFVZ
22424WFRZ
10
10
-40 to +125
-40 to +125
14 Ld TSSOP
16 Ld QFN
M14.173
L16.4x4A
FN6425 Rev 1.00
September 9, 2015
Page 2 of 20
ISL22424
Block Diagram
VCC
V-
RH0
RH1
SCK
SDI
SDO
CS
SPI
INTERFACE
POWER UP,
CONTROL
AND
STATUS
LOGIC
WR0
VOLATILE
REGISTER
AND
WIPER
CONTROL
CIRCUITRY
WR0
VOLATILE
REGISTER
AND
WIPER
CONTROL
CIRCUITRY
NON-VOLATILE
REGISTERS
GND
RW0
RL0
RW1
RL1
Pinouts
ISL22424
(14 LD TSSOP)
TOP VIEW
RW1
RH0
RL0
RW0
RH1
RL1
RW1
NC
1
2
3
4
5
6
7
14 VCC
13 CS
12 SDI
11 GND
10 SCK
9
8
SDO
V-
NC
NC
NC
V-
1
2
3
4
5
SDO
6
SCK
7
GND
8
SDI
ISL22424
(16 LD QFN)
TOP VIEW
RW0
13
12 RL0
11 RH0
10 V
CC
9 CS
RH1
14
RL1
15
16
FN6425 Rev 1.00
September 9, 2015
Page 3 of 20
ISL22424
Pin Descriptions
TSSOP PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
QFN PIN
11
12
13
14
15
16
1, 2, 3
4
5
6
7
8
9
10
EPAD*
SYMBOL
RH0
RL0
RW0
RH1
RL1
RW1
NC
V-
SDO
SCK
GND
SDI
CS
VCC
“High” terminal of DCP0
“Low” terminal of DCP0
“Wiper” terminal of DCP0
“High” terminal of DCP1
“Low” terminal of DCP1
“Wiper” terminal of DCP1
No connection
Negative power supply pin
Data Output of the SPI serial interface
SPI interface clock input
Device ground pin
Data Input of the SPI serial interface
Chip Select active low input
Positive power supply pin
Exposed Die Pad internally connected to V-
DESCRIPTION
* Note: PCB thermal land for QFN EPAD should be connected to V- plane or left floating. For more information refer to
http://www.intersil.com/data/tb/TB389.pdf
FN6425 Rev 1.00
September 9, 2015
Page 4 of 20
ISL22424
Absolute Maximum Ratings
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Voltage at any Digital Interface Pin
with Respect to GND . . . . . . . . . . . . . . . . . . . . -0.3V to V
CC
+0.3
V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6V
V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -6V to 0.3V
Voltage at any DCP pin with Respect to GND . . . . . . . . . . V- to V
CC
I
W
(10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±6mA
Latchup . . . . . . . . . . . . . . . . . . . . . . . . . Class II, Level A @ +125°C
ESD
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.5kV
Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .350V
Thermal Information
Thermal Resistance (Typical, Note 3)
JA
(°C/W)
14 Lead TSSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .105
16 Lead QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Maximum Junction Temperature (Plastic Package). . . . . . . +150°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Temperature Range (Full Industrial) . . . . . . . . . . . .-40°C to +125°C
Power Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15mW
V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.25V to 5.5V
V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -2.25V to -5.5V
Max Wiper Current Iw . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±3.0mA
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
3.
JA
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Analog Specifications
SYMBOL
R
TOTAL
Over recommended operating conditions unless otherwise stated.
TEST CONDITIONS
W option
U option
T option
MIN
TYP
(NOTE 4)
10
50
100
-20
W option
U, T option
V
RHi
and V
RLi
to GND
RH - floating, V
RL
= V-, force Iw current to the
wiper, I
W
= (V
CC
- V
RL
)/R
TOTAL
See Macro Model below.
Voltage at pin from V- to V
CC
W option
U, T option
-1.5
-1.0
-1.0
-0.5
0
0
-5
-2
-2
V-
70
10/10/25
0.1
±0.5
±0.2
±0.4
±0.15
1
0.5
-1
-1
1
1.5
1.0
1.0
0.5
5
2
0
0
2
±85
±45
V
CC
250
+20
MAX
UNIT
k
k
k
%
ppm/°C
ppm/°C
V
pF
µA
LSB
(Note 5)
LSB
(Note 5)
LSB
(Note 5)
LSB
(Note 5)
LSB
(Note 5)
LSB
(Note 5)
LSB
(Note 5)
ppm/°C
PARAMETER
RHi to RLi resistance
RHi to RLi resistance tolerance
End-to-End Temperature Coefficient
V
RH
, V
RL
R
W
C
H
/C
L
/C
W
(Note 20)
I
LkgDCP
INL
(Note 9)
DCP terminal voltage
Wiper resistance
Potentiometer capacitance
Leakage on DCP pins
Integral non-linearity
VOLTAGE DIVIDER MODE
(V- @ RLi; V
CC
@ RHi; measured at RWi, unloaded)
DNL
(Note 8)
Differential non-linearity
Monotonic over all tap positions
W option
U, T option
ZSerror
(Note 6)
FSerror
(Note 7)
V
MATCH
(Note 10)
Zero-scale error
Full-scale error
DCP to DCP matching
W option
U, T option
W option
U, T option
Wipers at the same tap position, the same
voltage at all RH terminals and the same
voltage at all RL terminals
DCP register set to 80 hex
TC
V
Ratiometric temperature coefficient
(Note 11, 20)
±4
FN6425 Rev 1.00
September 9, 2015
Page 5 of 20
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