a
FEATURES
Excellent Speed: 8 V/ s Typ
Low Noise: 11 nV/÷Hz @ 1 kHz Max
Unity-Gain Stable
High Gain Bandwidth: 6.5 MHz Typ
Low Input Offset Voltage: 0.8 mV Max
Low Offset Voltage Drift: 4 V/ C Max
High Gain: 500 V/mV Min
Outstanding CMR: 105 dB Min
Industry Standard Quad Pinouts
GENERAL DESCRIPTION
High Speed, Low Noise Quad
Operational Amplifier
OP471
PIN CONFIGURATIONS
14-Lead
Hermetic Dip
(Y-Suffix)
14
OUT D
13
–IN D
12
+IN D
14-Lead
Plastic Dip
(P-Suffix)
14
OUT D
13
–IN D
12
+IN D
OUT A
–IN A
+IN A
V+
+IN B
–IN B
OUT B
1
2
3
4
5
6
7
OUT A
–IN A
+IN A
V+
+IN B
–IN B
OUT B
1
2
3
4
5
6
7
OP471
11
V–
10
+IN C
9
8
OP471
11
V–
10
+IN C
9
8
The OP471 is a monolithic quad op amp featuring low noise,
11 nV/÷Hz Max @ 1 kHz, excellent speed, 8 V/ms typical, a
gain bandwidth of 6.5 MHz, and unity-gain stability.
The OP471 has an input offset voltage under 0.8 mV and an
input offset voltage drift below 4
mV/∞C,
guaranteed over the full
military temperature range. Open-loop gain of the OP471 is over
500,000 into a 10 kW load ensuring outstanding gain accuracy
and linearity. The input bias current is under 25 nA limiting
errors due to signal source resistance. The OP471’s CMR of
over 105 dB and PSRR of under 5.6
mV/V
significantly reduce
errors caused by ground noise and power supply fluctuations.
The OP471 offers excellent amplifier matching which is important
for applications such as multiple gain blocks, low-noise instru-
mentation amplifiers, quad buffers and low-noise active filters.
The OP471 conforms to the industry standard 14-lead DIP
pinout. It is pin-compatible with the LM148/LM149, HA4741,
RM4156, MC33074, TL084 and TL074 quad op amps and can
be used to upgrade systems using these devices.
For applications requiring even lower voltage noise the OP470
with a voltage density of 5 nV/÷Hz Max @ 1 kHz is recommended.
–IN C
OUT C
–IN C
OUT C
16-Lead SOIC
(S-Suffix)
OUT A
1
–IN A
2
+IN A
3
V+
4
+IN B
5
–IN B
6
OUT B
7
NC
8
16
OUT D
15
–IN D
14
+IN D
OP471
13
V–
12
+IN C
11
–IN C
10
OUT C
9
NC
NC = NO CONNECT
V+
BIAS
OUT
–IN
+IN
V–
Figure 1. Simplified Schematic
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2002
OP471* PRODUCT PAGE QUICK LINKS
Last Content Update: 02/23/2017
COMPARABLE PARTS
View a parametric search of comparable parts.
DISCUSSIONS
View all OP471 EngineerZone Discussions.
DOCUMENTATION
Application Notes
•
AN-357: Operational Integrators
•
AN-649: Using the Analog Devices Active Filter Design
Tool
Data Sheet
•
OP471: High Speed, Low Noise Quad Operational
Amplifier Data Sheet
•
OP471: Military Data Sheet
SAMPLE AND BUY
Visit the product page to see pricing options.
TECHNICAL SUPPORT
Submit a technical question or find your regional support
number.
DOCUMENT FEEDBACK
Submit feedback for this data sheet.
DESIGN RESOURCES
•
OP471 Material Declaration
•
PCN-PDN Information
•
Quality And Reliability
•
Symbols and Footprints
This page is dynamically generated by Analog Devices, Inc., and inserted into this data sheet. A dynamic change to the content on this page will not
trigger a change to either the revision number or the content of the product data sheet. This dynamic page may be frequently modified.
OP471–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
(@ V =
S
15 V, T
A
= 25 C, unless otherwise noted.)
OP471E
Min Typ Max
0.25 0.8
OP471F
Min Typ Max
0.5
7
15
1.5
20
50
OP471G
Min Typ Max
1.0
12
25
1.8
30
60
Unit
mV
nA
nA
nV p–p
nV/÷Hz
nV/÷Hz
nV/÷Hz
pA÷Hz
pA÷Hz
pA÷Hz
V/mV
V/mV
V
V
dB
17.8
mV/V
V/ms
11
mA
MHz
dB
pF
MW
GW
Parameter
Input Offset Voltage
Input Offset Current
Input Bias Current
Input Noise Voltage
1
Input Noise
Voltage Density
2
Input Noise
Current Density
Large-Signal
Voltage Gain
Input Voltage Range
3
Output Voltage Swing
Common-Mode
Rejection
Power Supply
Rejection Ratio
Slew Rate
Supply Current
(All Amplifiers)
Gain Bandwidth
Product
Channel Separation
1
Input Capacitance
Input Resistance
Differential-Mode
Input Resistance
Common-Mode
Settling Time
Symbol
V
OS
I
OS
I
B
e
n
p-p
e
n
Conditions
V
CM
= 0 V
V
CM
= 0 V
0.1 Hz to 10 Hz
f
O
= 10 Hz
f
O
= 100 Hz
f
O
= 1 kHz
f
O
= 10 Hz
f
O
= 100 Hz
f
O
= 1 kHz
V =
±
10 V
R
L
= 10 kW
R
L
= 2 kW
R
L
≥
2 kW
V
CM
=
±
11 V
V
S
= 4.5 V to 18 V
6.5
No Load
Av = 10
V
O
= 20 V p-p
f
O
= 10 Hz
125
500
350
±
11
±
12
105
4
7
10
25
250 500
9
7
6.5
1.7
0.7
0.4
700
550
±
12
±
13
120
1
8
9.2
6.5
150
2.6
1.1
11
11
5.6
6.5
16
12
11
250 500
9
7
6.5
1.7
0.7
0.4
300 500
175 275
±
11
±
12
±
12
±
13
95
115
5.6
8
9.2
6.5
125 150
2.6
1.1
11
11
17.8
6.5
16
12
11
250 500
9
7
6.5
1.7
07
0.4
300 500
175 275
±
11
±
12
±
12
±
13
95
115
5.6
8
9.2
6.5
125 150
2.6
1.1
11
16
12
11
i
n
A
VO
IVR
V
O
CMR
PSRR
SR
I
SY
GBW
CS
C
IN
R
IN
R
INCM
t
S
A
V
= 1
To 0.1%
To 0.01 %
4.5
7.5
4.5
7.5
4.5
7.5
ms
ms
NOTES
1
Guaranteed but not 100% tested.
2
Sample tested.
3
Guaranteed by CMR test.
–2–
REV. A
OP471
ELECTRICAL CHARACTERISTICS
Parameter
Input Offset Voltage
Average Input
Offset Voltage Drift
Input Offset Current
Input Bias Current
Large-Signal
Voltage Gain
Input Voltage Range*
Output Voltage Swing
Common-Mode
Rejection
Power Supply
Rejection Ratio
Supply Current
(All Amplifiers)
*Guaranteed
by CMR test.
(V
s
=
±15
V, –25 C
£
T
A
£
85 C for OP471E/F, –40 C
£
T
A
£
85 for OP471G,
unless otherwise noted.)
OP471E
Min Typ Max
0.3
1
1.1
4
20
50
OP471F
Min Typ Max
0.6
2
8
25
200 400
125 200
±
11
±
12
±
12
±
13
90
10
110
18
31.6
2.0
7
40
70
OP471G
Min Typ Max
1.2
4
20
40
200 400
125 200
±
11
±
12
±
12
±
13
90
110
18
31.6
50
75
2.5
Unit
mV
mV/∞C
nA
nA
V/mV
V
V
dB
mV/V
Symbol
V
OS
TCV
OS
los
I
B
Avo
IVR
V
O
CMR
PSRR
Conditions
V
CM
= 0 V
V
CM
= 0 V
V
O
=
±
10 V
R
L
= 10 kW
R
L
= 2 kW
R
L
≥
2 kW
V
CM
=
±
11 V
V
S
=
±
4.5 V to
±
18 V
375
250
±
11
±
12
100
5
13
600
400
±
12
±
13
115
3.2
I
SY
No Load
9.3
11
9.3
11
9.3
11
mA
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
18 V
Differential Input Voltage
2
. . . . . . . . . . . . . . . . . . . . . .
±
1.0 V
Differential Input Current
2
. . . . . . . . . . . . . . . . . . . .
±
25 mW
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . Supply Voltage
Output Short-Circuit Duration . . . . . . . . . . . . . . . Continuous
Storage Temperature Range
P, Y-Package . . . . . . . . . . . . . . . . . . . . . . –65∞C to +150∞C
Lead Temperature Range (Soldering, 60 sec) . . . . . . . . 300∞C
Junction Temperature (T
i
) . . . . . . . . . . . . . –65∞C to +150∞C
Operating Temperature Range
OP471E, OP471F . . . . . . . . . . . . . . . . . . . –25∞C to +85∞C
OP471G . . . . . . . . . . . . . . . . . . . . . . . . . . . –40∞C to +85∞C
NOTES
1
Absolute Maximum Ratings apply to packaged parts, unless otherwise noted.
2
The OP471’s inputs are protected by back-to-back diodes. Current limiting
resistors are not used in order to achieve low noise performance. If differential
voltage exceeds
±
1.0 V, the input current should be limited to
±
25 mA.
ABSOLUTE MAXIMUM RATINGS
1
Package Type
14-Lead Hermetic DIP(Y)
14-Lead Plastic DIP(P)
16-Lead SOIC (S)
*
JA
*
JC
Unit
∞C/W
∞C/W
∞C/W
94
76
88
10
33
23
JA
is specified for worst-case mounting conditions, i.e.,
JA
is specified for device
in socket for TO, CERDIP, PDIP packages;
JA
is specified for device soldered to
printed circuit board for SO packages.
ORDERING GUIDE
T
A
= 25∞C
V
OS
MAX
(mV)
800
1,500
1,800
1,800
Package Options
14-Lead CERDIP Plastic
OP471EY
OP471FY*
OP471GP
OP471GS
Operating
Temperature
Range
IND
IND
XIND
XIND
*Not
for new design. Obsolete April 2002.
For military processed devices, please refer to the standard
microcircuit drawing (SMD) available at
www.dscc.dla.mil/programs/milspec/default.asp
5962-88565022A - OP471ARCMDA
5962-88565023A - OP471ATCMDA
5962-8856502CA - OP471AYMDA
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the OP471 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions
are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. A
–3–
OP471–Typical Performance Characteristics
100
T
A
= 25 C
V
S
= 15V
10
T
A
= 25 C
VOLTAGE NOISE – nV/ Hz
AT 10Hz
NOISE VOLTAGE – 100nV/DIV
100
90
5mV
1s
VOLTAGE NOISE – nV/ Hz
40
30
20
10
5
4
3
2
8
AT 1kHz
6
10
0%
I/F CORNER = 5Hz
4
T
A
= 25 C
V
S
= 15V
2
4
6
TIME – Seconds
8
10
0
1
1
10
100
FREQUENCY – Hz
1k
2
0
5
10
15
20
SUPPLY VOLTAGE – V
TPC 1. Voltage Noise Density
vs. Frequency
100
T
A
= 25 C
V
S
= 15V
400
TPC 2. Voltage Noise Density
vs. Supply Voltage
V
S
=
15V
TPC 3. 0.1 Hz to 10 Hz Noise
20
CHANGE IN OFFSET VOLTAGE – V
18
16
14
12
10
8
6
4
2
0
0
VOLTAGE NOISE – nV/ Hz
40
30
20
10
5
4
3
2
1
1
10
100
FREQUENCY – Hz
1k
INPUT OFFSET VOLTAGE – V
T
A
= 25 C
V
S
= 15V
300
200
I/F CORNER = 5Hz
100
0
–75 –50
–25 0
25
50 75
TEMPERATURE – C
100
125
1
2
3
TIME – Minutes
4
5
TPC 4. Current Noise Density
vs. Frequency
20
INPUT OFFSET CURRENT – nA
V
S
= 15V
V
CM
= 0V
TPC 5. Input Offset Voltage vs.
Temperature
10
9
8
7
6
5
4
3
2
1
V
S
= 15V
V
CM
= 0V
INPUT BIAS CURRENT – nA
9
10
TPC 6. Warm-Up Offset
Voltage Drift
T
A
= 25 C
V
S
= 15V
INPUT BIAS CURRENT – nA
15
8
10
7
5
6
0
–75 –50
–25 0
25
50 75
TEMPERATURE – C
100
125
0
–75 –50
–25 0
25 50
75
TEMPERATURE – C
100 125
5
–12.5
–7.5
–2.5
2.5
7.5
12.5
COMMON-MODE VOLTAGE – V
TPC 7. Input Bias Current vs.
Temperature
TPC 8. Input Offset Current vs.
Temperature
TPC 9. Input Bias Current vs.
Common-Mode Voltage
–4–
REV. A
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