19-2543; Rev 0; 7/02
Dual 1:5 Differential Clock Drivers with LVPECL
Inputs and LVDS Outputs
General Description
The MAX9317/MAX9317A/MAX9317B/MAX9317C low-
skew, dual 1-to-5 differential drivers are designed for
clock and data distribution. The differential input is
reproduced at five LVDS outputs with a low output-to-
output skew of 5ps.
The MAX9317/MAX9317A are designed for low-voltage
operation from a 2.375V to 2.625V power supply for use
in 2.5V systems. The MAX9317B/MAX9317C operate
from a 3.0V to 3.6V power supply for use in 3.3V sys-
tems. The MAX9317A/MAX9317C feature 50Ω input ter-
mination resistors to reduce component count.
The MAX9317 family is available in 32-pin 7mm
✕
7mm
TQFP and space-saving 5mm
✕
5mm QFN packages
and operate across the extended temperature range of
-40°C to +85°C. The MAX9317A is pin compatible with
ON Semiconductor’s MC100EP210S.
o
145ps (max) Part-to-Part Skew
o
5ps Output-to-Output Skew
o
330ps Propagation Delay from CLK_ to Q_
o
2.375V to 2.625V Operation (MAX9317/MAX9317A)
o
3.0V to 3.6V Operation (MAX9317B/MAX9317C)
o
ESD Protection: ±2kV (Human Body Model)
o
Internal 50Ω Input Termination Resistors
(MAX9317A/MAX9317C)
Features
o
Guaranteed 1.0GHz Operating Frequency
MAX9317/MAX9317A/MAX9317B/MAX9317C
Ordering Information
PART
TEMP RANGE
PIN-
PACKAGE
NOMINAL
SUPPLY
VOLTAGE
(V)
2.5
2.5
2.5
2.5
3.3
3.3
3.3
3.3
Applications
Precision Clock Distribution
Low-Jitter Data Repeaters
Data and Clock Drivers and Buffers
Central-Office Backplane Clock Distribution
DSLAM Backplanes
Base Stations
ATE
Pin Configurations appear at end of data sheet.
MAX9317ETJ*
-40°C to +85°C 32 Thin QFN
MAX9317ECJ
-40°C to +85°C 32 TQFP
MAX9317AETJ*
-40°C to +85°C 32 Thin QFN
MAX9317AECJ -40°C to +85°C 32 TQFP
MAX9317BETJ*
-40°C to +85°C 32 Thin QFN
MAX9317BECJ -40°C to +85°C 32 TQFP
MAX9317CETJ*
-40°C to +85°C 32 Thin QFN
MAX9317CECJ -40°C to +85°C 32 TQFP
*Future
product—contact factory for availability.
Functional Diagram
QA0
QA0
QA1
QA1
QA2
27
31
30
29
28
26
QA2
MAX9317
MAX9317A
MAX9317B
MAX9317C
24
23
CLKA
CLKA
CLKB
CLKB
3
4
6
7
22
21
20
19
18
R
IN
50Ω
V
TB
GND
5
1, 8
10
11
12
13
14
15
R
IN
50Ω
17
QA3
QA3
QA4
QA4
QB0
QB0
QB1
QB1
QB2
V
CC
V
TA
9, 16
25, 32
2
R
IN
50Ω
R
IN
50Ω
QB4
QB4
QB3
QB3
MAX9317A/MAX9317C ONLY.
________________________________________________________________
Maxim Integrated Products
QB2
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Dual 1:5 Differential Clock Drivers with LVPECL
Inputs and LVDS Outputs
MAX9317/MAX9317A/MAX9317B/MAX9317C
ABSOLUTE MAXIMUM RATINGS
V
CC
to GND ...........................................................-0.3V to +4.1V
Input Pins to GND.......................................-0.3V to (V
CC
+ 0.3V)
Differential Input Voltage .............V
CC
or 3.0V, whichever is less
Continuous Output Current .................................................28mA
Surge Output Current..........................................................50mA
Continuous Power Dissipation (T
A
= +70°C)
32-Pin, 7mm
✕
7mm TQFP
(derate 20.7mW/°C above +70°C) .................................1.65W
32-Pin 5mm
✕
5mm QFN
(derate 21.3mW/°C above +70°C) ...................................1.7W
Junction-to-Ambient Thermal Resistance in Still Air
32-Pin, 7mm
✕
7mm TQFP......................................+48.4°C/W
32-Pin, 5mm
✕
5mm QFN ..........................................+47°C/W
Junction-to-Case Thermal Resistance
32-Pin, 7mm
✕
7mm TQFP.........................................+12°C/W
32-Pin, 5mm
✕
5mm QFN ............................................+2°C/W
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
ESD Protection
Human Body Model (CLK_,
CLK_,
Q_,
Q_,
V
T
_) .............±2kV
Soldering Temperature (10s) ...........................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(V
CC
= 2.375V to 2.625V (MAX9317/MAX9317A), V
CC
= 3.0V to 3.6V (MAX9317B/MAX9317C), all outputs loaded 100Ω ±1%
between Q_ and
Q_,
unless otherwise noted. Typical values are at V
CC
= 2.5V (MAX9317/MAX9317A), V
CC
= 3.3V
(MAX9317B/MAX9317C), V
IHD
= V
CC
- 1.0V, V
ILD
= V
CC
- 1.5V, unless otherwise noted.) (Notes 1, 2, and 3)
PARAMETER
SYMBOL
CONDITIONS
-40°C
MIN
TYP
MAX
MIN
+25°C
TYP
MAX
MIN
+85°C
TYP
MAX
UNITS
INPUTS (CLK_,
CLK
_
)
Differential Input
High Voltage
Differential Input
Low Voltage
V
IHD
V
ILD
Figure 1
Figure 1
MAX9317/
MAX9317A
MAX9317B/
MAX9317C
1.2
0
0.1
0.1
V
CC
V
CC
- 0.1
V
CC
3.0
1.2
0
0.1
0.1
V
CC
V
CC
- 0.1
V
CC
3.0
1.2
0
0.1
0.1
V
CC
V
CC
- 0.1
V
CC
V
3.0
V
V
Differential Input
Voltage
V
ID
V
IHD
-
V
ILD
Input Current
Input Termination
Resistance
OUTPUTS (Q_,
Q
_
)
Output High
Voltage
Output Low
Voltage
I
IH
, I
IL
CLK_, or
CLK_
=
V
IHD
or V
ILD
,
MAX9317/MAX9317B
MAX9317A/MAX9317C,
Figure 2 (Note 4)
-60
+60
-60
+60
-60
+60
µA
R
IN
43
50
57
43
50
57
43
50
57
Ω
V
OH
V
OL
Figure 1
Figure 1
0.9
1.6
0.9
1.6
0.9
1.6
V
V
2
_______________________________________________________________________________________
Dual 1:5 Differential Clock Drivers with LVPECL
Inputs and LVDS Outputs
DC ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= 2.375V to 2.625V (MAX9317/MAX9317A), V
CC
= 3.0V to 3.6V (MAX9317B/MAX9317C), all outputs loaded 100Ω ±1%
between Q_ and
Q_,
unless otherwise noted. Typical values are at V
CC
= 2.5V (MAX9317/MAX9317A), V
CC
= 3.3V
(MAX9317B/MAX9317C), V
IHD
= V
CC
- 1.0V, V
ILD
= V
CC
- 1.5V, unless otherwise noted.) (Notes 1, 2, and 3)
PARAMETER
Differential
Output Voltage
Change in V
OD
Between
Complementary
Output States
Output Offset
Voltage
Change in V
OS
Between
Complementary
Output States
Output Short-
Circuit Current
POWER SUPPLY
Power-Supply
Current (Note 5)
I
CC
MAX9317/9317A
MAX9317B/9317C
69
75
107
107
75
81
107
107
80
86
107
107
mA
SYMBOL
V
OD
CONDITIONS
Figure 1
-40°C
MIN
250
TYP
350
MAX
450
MIN
250
+25°C
TYP
350
MAX
450
MIN
250
+85°C
TYP
350
MAX
450
UNITS
mV
MAX9317/MAX9317A/MAX9317B/MAX9317C
∆V
OD
7
50
6
50
6
50
mV
V
OS
1.125 1.25 1.375 1.125 1.25 1.375 1.125 1.25 1.375
V
∆V
OS
Q_ shorted to
Q_
I
OSC
Q_ or
Q_
shorted to
GND
25
25
25
mV
12
28
12
28
12
28
mA
AC ELECTRICAL CHARACTERISTICS
(V
CC
= 2.375V to 2.625V (MAX9317/MAX9317A) or V
CC
= 3.0V to 3.6V (MAX9317B/MAX9317C), all outputs loaded with 100Ω ±1%,
between Q_ and
Q_,
f
IN
≤
1.0GHz, input transition time = 125ps (20% to 80%), V
IHD
- V
ILD
= 0.15V to V
CC
, unless otherwise noted.
Typical values are at V
CC
= 2.5V (MAX9317/MAX9317A), V
CC
= 3.3V (MAX9317B/MAX9317C), f
IN
= 1.0GHz, V
IHD
= V
CC
- 1.0V,
V
ILD
= V
CC
- 1.5V, unless otherwise noted.) (Notes 1 and 4)
PARAMETER
Propagation
Delay CLK_,
CLK_
to Q_,
Q_
Output-to-Output
Skew
Part-to-Part Skew
Added Random
Jitter
Added
Deterministic Jitter
Operating
Frequency
SYMBOL
t
PHL
t
PLH
t
SKEW1
t
SKEW2
t
RJ
t
DJ
f
MAX
CONDITIONS
-40°C
MIN
250
TYP
310
MAX
600
MIN
250
+25°C
TYP
330
MAX
600
MIN
250
+85°C
TYP
335
MAX
600
UNITS
Figure 1
ps
(Note 6)
(Note 7)
f
IN
= 1.0GHz, clock
pattern (Note 8)
f
IN
= 1.0GHz, 2
23
- 1
PRBS pattern (Note 8)
V
OD
≥
250mV
1.0
9
55
145
5
45
145
4
25
145
ps
ps
ps
(RMS)
ps
(P-P)
GHz
0.8
80
2.0
105
1.0
0.8
80
2.0
105
1.0
0.8
80
2.0
105
_______________________________________________________________________________________
3
Dual 1:5 Differential Clock Drivers with LVPECL
Inputs and LVDS Outputs
MAX9317/MAX9317A/MAX9317B/MAX9317C
AC ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= 2.375V to 2.625V (MAX9317/MAX9317A) or V
CC
= 3.0V to 3.6V (MAX9317B/MAX9317C), all outputs loaded with 100Ω ±1%,
between Q_ and
Q_,
f
IN
≤
1.0GHz, input transition time = 125ps (20% to 80%), V
IHD
- V
ILD
= 0.15V to V
CC
, unless otherwise noted.
Typical values are at V
CC
= 2.5V (MAX9317/MAX9317A), V
CC
= 3.3V (MAX9317B/MAX9317C), f
IN
= 1.0GHz, V
IHD
= V
CC
- 1.0V,
V
ILD
= V
CC
- 1.5V, unless otherwise noted.) (Notes 1 and 4)
PARAMETER
Differential
Output Rise/Fall
Time
SYMBOL
CONDITIONS
-40°C
MIN
140
TYP
200
MAX
300
MIN
140
+25°C
TYP
205
MAX
300
MIN
140
+85°C
TYP
205
MAX
300
UNITS
t
R
/t
F
20% to 80%, Figure 1
ps
Note 1:
Measurements are made with the device in thermal equilibrium.
Note 2:
Current into a pin is defined as positive. Current out of a pin is defined as negative.
Note 3:
DC parameters are production tested at +25°C. DC limits are guaranteed by design and characterization over the full oper-
ating temperature range.
Note 4:
Guaranteed by design and characterization, and are not production tested. Limits are set to ±6 sigma.
Note 5:
All outputs loaded with 100Ω differential, all inputs biased differential high or low except V
T_
.
Note 6:
Measured between outputs of the same device at the signal crossing points for a same-edge transition.
Note 7:
Measured between outputs on different devices for identical transitions and V
CC
levels.
Note 8:
Device jitter added to the input signal.
Typical Operating Characteristics
(MAX9317, V
CC
= 2.5V, all outputs loaded with 100Ω ±1%, between Q_ and
Q_,
f
IN
= 1.0GHz, input transition time = 125ps (20% to
80%), V
IHD
= V
CC
- 1.0V, V
ILD
= V
CC
- 1.5V, unless otherwise noted.)
SUPPLY CURRENT vs. TEMPERATURE
MAX9317 toc01
OUTPUT AMPLITUDE (V
OH
- V
OL
)
vs. CLK_ FREQUENCY
MAX9317 toc02
OUTPUT RISE/FALL TIME
vs. TEMPERATURE
MAX9317 toc03
90
INPUTS OPEN, OUTPUTS TERMINATED
WITH 100Ω DIFFERENTIAL
85
SUPPLY CURRENT (mA)
400
230
300
OUTPUT RISE/FALL TIME (ps)
OUTPUT AMPLITUDE (mV)
220
FALL TIME
80
210
200
75
200
RISE TIME
190
70
100
65
-40
-15
10
35
TEMPERATURE (°C)
60
85
0
0
0.5
1.0
1.5
CLK_ FREQUENCY (GHz)
2.0
180
-40
-15
10
35
TEMPERATURE (°C)
60
85
CLK-TO-Q PROPAGATION DELAY
vs. TEMPERATURE
MAX9317 toc04
CLK-TO-Q PROPAGATION DELAY vs. HIGH
VOLTAGE OF DIFFERENTIAL INPUT (V
IHD
)
CLK-TO-Q PROPAGATION DELAY (ps)
MAX9317 toc05
340
CLK-TO-Q PROPAGATION DELAY (ps)
335
330
325
320
315
310
-40
-15
t
PHL
324.0
323.5
t
PHL
323.0
t
PLH
322.5
t
PLH
322.0
10
35
TEMPERATURE (°C)
60
85
1.2
1.5
1.8
2.1
2.4
HIGH VOLTAGE OF DIFFERENTIAL INPUT (V)
4
_______________________________________________________________________________________
Dual 1:5 Differential Clock Drivers with LVPECL
Inputs and LVDS Outputs
Pin Description
NAME
PIN
1, 8
MAX9317
MAX9317B
GND
N.C.
2
—
CLKA
CLKA
N.C.
5
—
CLKB
CLKB
V
CC
QB4
QB4
QB3
QB3
QB2
QB2
QB1
QB1
QB0
QB0
QA4
QA4
QA3
QA3
QA2
QA2
QA1
QA1
QA0
QA0
EP
MAX9317A
MAX9317C
GND
—
V
TA
CLKA
CLKA
—
V
TB
CLKB
CLKB
V
CC
QB4
QB4
QB3
QB3
QB2
QB2
QB1
QB1
QB0
QB0
QA4
QA4
QA3
QA3
QA2
QA2
QA1
QA1
QA0
QA0
EP
FUNCTION
Ground
No Connection. Connect this pin to ground or leave floating.
CLKA Input Termination Voltage. This pin is connected to CLKA and
CLKA
through 50Ω
termination resistors. Connect this pin to V
CC
- 2V for an LVPECL input signal on CLKA or
leave floating for an LVDS input signal.
Noninverting Differential Clock Input A
Inverting Differential Clock Input A
No Connection. Connect this pin to ground or leave floating.
CLKB Input Termination Voltage. This pin is connected to CLKB and
CLKB
through 50Ω
termination resistors. Connect this pin to V
CC
- 2V for an LVPECL input signal on CLKB or
leave floating for an LVDS input signal.
Noninverting Differential Clock Input B
Inverting Differential Clock Input B
Positive Supply Voltage. Bypass each V
CC
pin to ground with 0.1µF and 0.01µF ceramic
capacitors. Place the capacitors as close to the device as possible with the 0.01µF
capacitor closest to the device.
CLKB Inverting Differential Output 4. Terminate with 100Ω to QB4.
CLKB Noninverting Differential Output 4. Terminate with 100Ω to
QB4.
CLKB Inverting Differential Output 3. Terminate with 100Ω to QB3.
CLKB Noninverting Differential Output 3. Terminate with 100Ω to
QB3.
CLKB Inverting Differential Output 2. Terminate with 100Ω to QB2.
CLKB Noninverting Differential Output 2. Terminate with 100Ω to
QB2.
CLKB Inverting Differential Output 1. Terminate with 100Ω to QB1.
CLKB Noninverting Differential Output 1. Terminate with 100Ω to
QB1.
CLKB Inverting Differential Output 0. Terminate with 100Ω to QB0.
CLKB Noninverting Differential Output 0. Terminate with 100Ω to
QB0.
CLKA Inverting Differential Output 4. Terminate with 100Ω to QA4.
CLKA Noninverting Differential Output 4. Terminate with 100Ω to
QA4.
CLKA Inverting Differential Output 3. Terminate with 100Ω to QA3.
CLKA Noninverting Differential Output 3. Terminate with 100Ω to
QA3.
CLKA Inverting Differential Output 2. Terminate with 100Ω to QA2.
CLKA Noninverting Differential Output 2. Terminate with 100Ω to
QA2.
CLKA Inverting Differential Output 1. Terminate with 100Ω to QA1.
CLKA Noninverting Differential Output 1. Terminate with 100Ω to
QA1.
CLKA Inverting Differential Output 0. Terminate with 100Ω to QA0.
CLKA Noninverting Differential Output 0. Terminate with 100Ω to
QA0.
Exposed Pad. QFN package only. Internally connected to ground.
MAX9317/MAX9317A/MAX9317B/MAX9317C
3
4
6
7
9, 16,
25, 32
10
11
12
13
14
15
17
18
19
20
21
22
23
24
26
27
28
29
30
31
—
_______________________________________________________________________________________
5
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