Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to
www.maximintegrated.com/thermal-tutorial.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(V
CC
= +12V, V
EE
= -7V, V
L
= +3.3V, T
A
= +25°C, unless otherwise noted. Specifications at T
A
= T
MIN
and T
A
= T
MAX
are guaranteed
by design and characterization. Typical values are at T
A
= +25°C, unless otherwise noted.) (Note 2)
PARAMETER
FORCE VOLTAGE
Force Input Voltage
Range
Forced Voltage
Input Bias Current
Forced-Voltage Offset
Forced-Voltage-Offset
Temperature Coefficient
Forced-Voltage Gain
Error
Forced-Voltage-Gain
Temperature Coefficient
Forced-Voltage Linearity
Error
MEASURE CURRENT
Measure-Current Offset
Measure-Current-Offset
Temperature Coefficient
Measure-Current Gain
Error
Measure-Current-Gain
Temperature Coefficient
Linearity Error
2
SYMBOL
V
IN0_
,
V
IN1_
V
DUT
CONDITIONS
MIN
TYP
MAX
UNITS
V
EE
+ 2.5
DUT current at full scale
DUT current = 0A
V
CC
= +12V, V
EE
= -7V
V
CC
= +18V, V
EE
= -12V
-2
-7
V
EE
+ 2.5
±1
-25
±100
V
CC
- 2.5
+7
+13
V
CC
- 2.5
V
V
µA
V
FOS
+25
mV
µV/°C
V
FGE
Nominal gain of +1
-1
0.005
±10
+1
%
ppm/°C
V
FLER
Gain and offset errors calibrated out (Notes 3, 4)
-0.02
+0.02
%FSR
I
MOS
(Note 3)
-1
±20
+1
%FSR
ppm/°C
I
MGE
(Note 5)
-1
±20
+1
%
ppm/°C
I
MLER
Gain and offset errors calibrated out
(Notes 3, 4, 6)
-0.02
+0.02
%FSR
Maxim Integrated
MAX9951/MAX9952
Dual Per-Pin Parametric
Measurement Units
DC ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= +12V, V
EE
= -7V, V
L
= +3.3V, T
A
= +25°C, unless otherwise noted. Specifications at T
A
= T
MIN
and T
A
= T
MAX
are guaranteed
by design and characterization. Typical values are at T
A
= +25°C, unless otherwise noted.) (Note 2)
PARAMETER
Measure-Output-Voltage
Range Over Full-Current
Range
Current-Sense Amp
Offset-Voltage Input
Rejection of Output-
Measure Error Due to
Common-Mode Sense
Voltage
SYMBOL
V
IOS
= V
DUTGND
V
MSR_
V
IOS
= 4V + V
DUTGND
V
IOS
Relative to V
DUTGND
0
-0.2
+8
+4.4
V
CONDITIONS
MIN
-4
TYP
MAX
+4
V
UNITS
CMVR
LER
(Notes 5 and 7)
+0.001
+0.007
%FSR/V
Range E, R_E = 500kΩ
Range D, R_D = 50kΩ
Measure-Current Range
Range C, R_C = 5kΩ
Range B, R_B = 500Ω
Range A, R_A = 15.6Ω
FORCE CURRENT
Input Voltage Range for
Setting Forced Current
Over Full Range
Current-Sense Amp
Offset-Voltage Input
IOS_ Input Bias Current
Forced-Current Offset
Forced-Current-Offset
Temperature Coefficient
Forced-Current Gain
Error
Forced-Current-Gain
Temperature Coefficient
Forced-Current Linearity
Error
Rejection of Output Error
Due to Common-Mode
Load Voltage
I
FLER
Gain and offset errors calibrated out
(Notes 3, 4, 6)
(Note 5)
(Note 3)
V
IN0_,
V
IN1_
V
IOS
V
IOS
= V
DUTGND
V
IOS
= 4V + V
DUTGND
Relative to V
DUTGND
-2
-20
-200
-2
-64
+2
+20
+200
+2
+64
mA
µA
-4
0
-0.2
±1
-1
±20
-1
±20
-0.02
+4
V
+8
+4.4
V
µA
+1
%FSR
ppm/°C
+1
%
ppm/°C
+0.02
%FSR
CMRI
OER
(Notes 5 and 7)
Range E, R_E = 500kΩ
Range D, R_D = 50kΩ
-2
-20
-200
-2
-64
+0.001
+0.007
+2
+20
+200
+2
+64
%FSR/V
µA
Forced-Current Range
Range C, R_C = 5kΩ
Range B, R_B = 500Ω
Range A, R_A = 15.6Ω
mA
Maxim Integrated
3
MAX9951/MAX9952
Dual Per-Pin Parametric
Measurement Units
DC ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= +12V, V
EE
= -7V, V
L
= +3.3V, T
A
= +25°C, unless otherwise noted. Specifications at T
A
= T
MIN
and T
A
= T
MAX
are guaranteed
by design and characterization. Typical values are at T
A
= +25°C, unless otherwise noted.) (Note 2)
PARAMETER
MEASURE VOLTAGE
Measure-Voltage-Offset
Measure-Voltage-Offset
Temperature Coefficient
Gain Error
Measure-Voltage-Gain
Temperature Coefficient
Measure-Voltage
Linearity Error
Measure-Output-Voltage
Range Over Full DUT
Voltage
FORCE OUTPUT
Off-State Leakage
Current
Short-Circuit Current
Limit
Force-to-Sense Resistor
SENSE INPUT
Input Voltage Range
Leakage Current
COMPARATOR INPUTS
Input Voltage Range
Offset Voltage
Input Bias Current
VOLTAGE CLAMPS
Input Control Voltage
Clamp Voltage
Accuracy
DIGITAL INPUTS
Input High Voltage
(Note 9)
Input Low Voltage
(Note 9)
Input Current
Input Capacitance
V
L
= 5V
V
IH
V
L
= 3.3V
V
L
= 2.5V
V
IL
I
IN
C
IN
V
L
= 5V or 3.3V
V
L
= 2.5V
±1
3.0
+3.5
+2.0
+1.7
+0.8
+0.7
V
µA
pF
V
V
CLLO_
,
V
CLHI_
(Note 8)
V
EE
+ 2.4
-100
V
CC
- 2.4
+100
V
mV
V
EE
+ 2.5
-25
±1
V
CC
- 2.5
+25
V
mV
µA
F option only
V
EE
+ 2.5
-1
V
CC
- 2.5
+1
V
nA
I
LIM-
I
LIM+
R
FS
D option only
-1
-92
+65
8
10
+1
-65
+92
12
nA
mA
kΩ
V
MLER
Gain and offset errors calibrated out
(Notes 3, 4, 6)
DUT current at full scale
DUT current = 0A
V
CC
= +12V, V
EE
= -7V
V
CC
= +18V, V
EE
= -12V
-0.02
-2
-7
V
EE
+ 2.5
V
MGER
Nominal gain of +1
-1
V
MOS
-25
±100
±0.005
±10
+0.02
+7
+13
V
CC
- 2.5
V
+1
+25
mV
µV/°C
%
ppm/°C
%FSR
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
V
MSR
4
Maxim Integrated
MAX9951/MAX9952
Dual Per-Pin Parametric
Measurement Units
DC ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= +12V, V
EE
= -7V, V
L
= +3.3V, T
A
= +25°C, unless otherwise noted. Specifications at T
A
= T
MIN
and T
A
= T
MAX
are guaranteed
by design and characterization. Typical values are at T
LED 是light emitting diode (发光二极管)的缩写,是一种由半导体技术制成的电光源。LED的核心部分是由P型半导体和N型半导体组成的晶片,在P型半导体和N型半导体之间有一个过渡层,称为P2N结。在正向导通时,半导体中的多数载流子和少数载流子复合,释放出的能量以光子或部分以光子的形式发射出来,大量的光子形成光子流,即发光。P2N结加反向电压时,少数载流子难以注入,故不发...[详细]
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