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74LX1G125STR

产品描述Buffers & Line Drivers Single Bus Buffer
产品类别逻辑    逻辑   
文件大小164KB,共13页
制造商ST(意法半导体)
官网地址http://www.st.com/
标准
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74LX1G125STR概述

Buffers & Line Drivers Single Bus Buffer

74LX1G125STR规格参数

参数名称属性值
是否Rohs认证符合
厂商名称ST(意法半导体)
零件包装代码SOT-23
包装说明SOT-23, 5 PIN
针数5
Reach Compliance Codecompliant
控制类型ENABLE LOW
系列TTL/H/L
JESD-30 代码R-PDSO-G5
JESD-609代码e3
长度2.9 mm
负载电容(CL)50 pF
逻辑集成电路类型BUS DRIVER
最大I(ol)0.024 A
位数1
功能数量1
端口数量2
端子数量5
最高工作温度125 °C
最低工作温度-55 °C
输出特性3-STATE
输出极性TRUE
封装主体材料PLASTIC/EPOXY
封装代码LSSOP
封装等效代码TSOP5/6,.11,37
封装形状RECTANGULAR
封装形式SMALL OUTLINE, LOW PROFILE, SHRINK PITCH
峰值回流温度(摄氏度)NOT SPECIFIED
电源3.3 V
Prop。Delay @ Nom-Sup6.2 ns
传播延迟(tpd)12 ns
认证状态Not Qualified
座面最大高度1.45 mm
最大供电电压 (Vsup)5.5 V
最小供电电压 (Vsup)1.65 V
标称供电电压 (Vsup)1.8 V
表面贴装YES
技术CMOS
温度等级MILITARY
端子面层TIN
端子形式GULL WING
端子节距0.95 mm
端子位置DUAL
处于峰值回流温度下的最长时间NOT SPECIFIED
宽度1.625 mm
Base Number Matches1

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74LX1G125
SINGLE BUS BUFFER (3-STATE)
s
s
s
s
s
s
s
s
s
5V TOLERANT INPUTS
HIGH SPEED: t
PD
= 4.7ns (MAX.) at V
CC
= 3V
LOW POWER DISSIPATION:
I
CC
= 1µA (MAX.) at T
A
= 25°C
POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 24mA (MIN) at V
CC
= 3V
BALANCED PROPAGATION DELAYS:
t
PLH
t
PHL
WIDE OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 1.65V to 5.5V
(1.2V Data Retention)
LATCH-UP PERFORMANCE EXCEED
300mA
RoHS FLIP-CHIP AND SOT PACKAGES
SOT23-5L
)-
(s
so
b
ct
u
d
-O
ro
s)
P
t(
te
uc
le
o
od
r
s
P
b
O
te
le
so
b
O
DESCRIPTION
The 74LX1G125 is a low voltage CMOS SINGLE
BUS BUFFER fabricated with sub-micron silicon
gate and double-layer metal wiring C
2
MOS
technology.
3-STATE control input G has to be set HIGH to
place the output into the high impedance state.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V or lower power supply
systems. The sub-micron CMOS technology used
b
O
ORDER CODES
so
te
le
Flip-Chip5
(Max dim = 1.3x1.3mm)
ro
P
uc
d
SOT323-5L
s)
t(
PACKAGE
SOT23-5L
SOT323-5L
Flip-Chip5
P
te
le
od
r
s)
t(
uc
T&R
74LX1G125STR
74LX1G125CTR
74LX1G125BJR
allow ultra low power consumption and guarantee
optimized operations between 2.8V and 1.8V
system, as Smart Phone, Digital Still Camera,
PDA, Notebook, or each other battery powered
equipment.
All inputs and outputs are equipped with
protection circuits against ESD discharge.
PIN CONNECTION AND IEC LOGIC SYMBOLS
(top view for SOT, top through view for Flip-Chip)
April 2004
1/13

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