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CAT5112VI-50-G

产品描述Digital Potentiometer ICs DPP NV 32 taps Up/Down w/Buf
产品类别模拟混合信号IC    转换器   
文件大小166KB,共10页
制造商ON Semiconductor(安森美)
官网地址http://www.onsemi.cn
标准
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CAT5112VI-50-G概述

Digital Potentiometer ICs DPP NV 32 taps Up/Down w/Buf

CAT5112VI-50-G规格参数

参数名称属性值
Brand NameON Semiconductor
是否无铅不含铅
是否Rohs认证符合
厂商名称ON Semiconductor(安森美)
零件包装代码SOIC
包装说明SOP, SOP8,.25
针数8
制造商包装代码751BD
Reach Compliance Codecompliant
ECCN代码EAR99
其他特性NONVOLATILE MEMORY
控制接口INCREMENT/DECREMENT
转换器类型DIGITAL POTENTIOMETER
JESD-30 代码R-PDSO-G8
JESD-609代码e4
长度4.9 mm
湿度敏感等级1
功能数量1
位置数32
端子数量8
最高工作温度85 °C
最低工作温度-40 °C
封装主体材料PLASTIC/EPOXY
封装代码SOP
封装等效代码SOP8,.25
封装形状RECTANGULAR
封装形式SMALL OUTLINE
峰值回流温度(摄氏度)260
电源3/5 V
认证状态Not Qualified
电阻定律LINEAR
最大电阻容差20%
最大电阻器端电压3 V
最小电阻器端电压
座面最大高度1.75 mm
标称供电电压3 V
表面贴装YES
技术CMOS
标称温度系数300 ppm/°C
温度等级INDUSTRIAL
端子面层Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式GULL WING
端子节距1.27 mm
端子位置DUAL
处于峰值回流温度下的最长时间40
标称总电阻50000 Ω
宽度3.9 mm

文档预览

下载PDF文档
CAT5112
32‐tap Digital
Potentiometer (POT)
with Buffered Wiper
Description
The CAT5112 is a single digital POT designed as an electronic
replacement for mechanical potentiometers. Ideal for automated
adjustments on high volume production lines, they are also well suited
for applications where equipment requiring periodic adjustment is
either difficult to access or located in a hazardous or remote
environment.
The CAT5112 contains a 32-tap series resistor array connected
between two terminals R
H
and R
L
. An up/down counter and decoder
that are controlled by three input pins, determines which tap is
connected to the wiper, R
WB
. The CAT5112 wiper is buffered by an op
amp that operates rail to rail. The wiper setting, stored in non-volatile
memory, is not lost when the device is powered down and is
automatically recalled when power is returned. The wiper can be
adjusted to test new system values without effecting the stored setting.
Wiper-control of the CAT5112 is accomplished with three input
control pins, CS, U/D, and INC. The INC input increments the wiper
in the direction which is determined by the logic state of the U/D input.
The CS input is used to select the device and also store the wiper
position prior to power down.
The digital POT can be used as a buffered voltage divider. For
applications where the potentiometer is used as a 2-terminal variable
resistor, please refer to the CAT5114. The buffered wiper of the
CAT5112 is not compatible with that application.
Features
http://onsemi.com
SOIC−8
V SUFFIX
CASE 751BD
MSOP−8
Z SUFFIX
CASE 846AD
PDIP−8
L SUFFIX
CASE 646AA
TSSOP−8
Y SUFFIX
CASE 948AL
PIN CONFIGURATIONS
INC
U/D
R
H
GND
1
V
CC
CS
R
L
R
WB
PDIP (L), SOIC (V), MSOP (Z)
CS
V
CC
INC
U/D
1
R
L
R
WB
GND
R
H
TSSOP (Y)
(Top Views)
32-position Linear Taper Potentiometer
Non-volatile EEPROM Wiper Storage; Buffered Wiper
Low Power CMOS Technology
Single Supply Operation: 2.5 V
6.0 V
Increment Up/Down Serial Interface
Resistance Values: 10 kW, 50 kW and 100 kW
Available in PDIP, SOIC, TSSOP and MSOP Packages
These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS
Compliant
Automated Product Calibration
Remote Control Adjustments
Offset, Gain and Zero Control
Tamper-proof Calibrations
Contrast, Brightness and Volume Controls
Motor Controls and Feedback Systems
Programmable Analog Functions
PIN FUNCTION
Pin Name
INC
U/D
R
H
GND
R
WB
R
L
CS
V
CC
Function
Increment Control
Up/Down Control
Potentiometer High Terminal
Ground
Buffered Wiper Terminal
Potentiometer Low Terminal
Chip Select
Supply Voltage
Applications
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
Semiconductor Components Industries, LLC, 2013
June, 2013
Rev. 16
1
Publication Order Number:
CAT5112/D
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