IS66WV51216ALL
IS66WV51216BLL
8Mb LOW VOLTAGE,
ULTRA LOW POWER PSEUDO CMOS STATIC RAM
JANUARY 2010
FEATURES
• High-speed access time: 55ns
• CMOS low power operation
– mW (typical) operating
– µW (typical) CMOS standby
• Single power supply
– 1.7V--1.95V V
dd
(66WV51216ALL)
(70ns)
– 2.5V--3.6V V
dd
(66WV51216BLL) (55ns)
• Three state outputs
• Data control for upper and lower bytes
• Industrial temperature available
• Lead-free available
bit static RAMs organized as 512K words by 16 bits. It is
fabricated using
ISSI
's high-performance CMOS technology.
This highly reliable process coupled with innovative circuit
design techniques, yields high-performance and low power
consumption devices.
When
CS1
is HIGH (deselected) or when CS2 is LOW
(deselected) or when
CS1
is
LOW,
CS2 is
HIGH
and both
LB
and
UB are HIGH, the device assumes a standby mode
at which the power dissipation can be reduced down with
CMOS input levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs. The active LOW Write Enable
(WE)
controls both writing and reading of the memory. A
data byte allows Upper Byte (UB) and Lower Byte (LB)
access.
The IS66WV51216ALL/BLL is packaged in the JEDEC
standard 48-pin mini BGA (6mm x 8mm) and 44-Pin TSOP
(TYPE II). The device is aslo available for die sales.
DESCRIPTION
The
ISSI
IS66WV51216ALL/BLL is a high-speed, 8M
FUNCTIONAL BLOCK DIAGRAM
A0-A18
DECODER
512K x 16
MEMORY ARRAY
V
DD
GND
I/O0-I/O7
Lower Byte
I/O8-I/O15
Upper Byte
I/O
DATA
CIRCUIT
COLUMN I/O
CS2
CS1
OE
WE
UB
LB
CONTROL
CIRCUIT
Copyright © 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no
liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on
any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com
Rev. A
12/02/09
1
IS66WV51216ALL
IS66WV51216BLL
PIN CONFIGURATIONS: 512K x 16
48-Pin mini BGA (6mm x 8mm)
1
2
3
4
5
6
A4
A3
A2
A1
A0
CS1
I/O0
I/O1
I/O2
I/O3
V
DD
GND
I/O4
I/O5
I/O6
I/O7
WE
A16
A15
A14
A13
A12
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
OE
UB
LB
I/O15
I/O14
I/O13
I/O12
GND
V
DD
I/O11
I/O10
I/O9
I/O8
A18
A8
A9
A10
A11
A17
44-Pin TSOP (Type II)
A
B
C
D
E
F
G
H
LB
I/O
8
I/O
9
GND
V
DD
I/O
14
I/O
15
A18
OE
UB
I/O
10
I/O
11
I/O
12
I/O
13
NC
A8
A0
A3
A5
A17
NC
A14
A12
A9
A1
A4
A6
A7
A16
A15
A13
A10
A2
CS1
I/O
1
I/O
3
I/O
4
I/O
5
WE
A11
CS2
I/O
0
I/O
2
V
DD`
GND
I/O
6
I/O
7
NC
PIN DESCRIPTIONS
A0-A18 Address Inputs
I/O0-I/O15
Data Inputs/Outputs
CS1,
CS2
Chip Enable Input
OE
Output Enable Input
WE
Write Enable Input
LB
Lower-byte Control (I/O0-I/O7)
UB
Upper-byte Control (I/O8-I/O15)
NC
No Connection
Power
V
dd
GND
Ground
2
Integrated Silicon Solution, Inc. — www.issi.com
Rev. A
12/02/09
IS66WV51216ALL
IS66WV51216BLL
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
term
t
BIAs
V
dd
t
stg
P
t
Parameter
Terminal Voltage with Respect to GND
Temperature Under Bias
V
dd
Related to GND
Storage Temperature
Power Dissipation
Value
–0.2 to V
dd
+0.3
–40 to +85
–0.2 to +3.8
–65 to +150
1.0
Unit
V
°C
V
°C
W
Note:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at these or any other conditions above
those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rat-
ing conditions for extended periods may affect reliability.
DC ELECTRICAL CHARACTERISTICS
(Over Operating Range)
Symbol
V
oH
V
oL
V
IH
V
IL
(1)
I
LI
I
Lo
Parameter
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
Input Leakage
Output Leakage
Test Conditions
I
oH
=
-0.1 mA
I
oH
=
-1 mA
I
oL
=
0.1 mA
I
oL
=
2.1 mA
V
dd
1.7-1.95V
2.5-3.6V
1.7-1.95V
2.5-3.6V
1.7-1.95V
2.5-3.6V
1.7-1.95V
2.5-3.6V
Min.
1.4
2.2
—
—
1.4
2.2
–0.2
–0.2
–1
–1
Max.
—
—
0.2
0.4
V
dd
+ 0.2
V
dd
+ 0.3
0.4
0.6
1
1
Unit
V
V
V
V
V
V
V
V
µA
µA
GND ≤
V
In
≤
V
dd
GND ≤
V
out
≤
V
dd
,
Outputs Disabled
Notes:
1.
V
IL
(min.) = –1.0V
for pulse width less than 10 ns.
4
Integrated Silicon Solution, Inc. — www.issi.com
Rev. A
12/02/09
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