19-2827; Rev 1; 4/04
670MHz LVDS-to-LVDS and Anything-to-LVDS
1:2 Splitters
General Description
The MAX9174/MAX9175 are 670MHz, low-jitter, low-
skew 1:2 splitters ideal for protection switching, loop-
back, and clock and signal distribution. The devices
feature ultra-low 1.0ps
(RMS)
random jitter (max) that
ensures reliable operation in high-speed links that are
highly sensitive to timing errors.
The MAX9174 has a fail-safe LVDS input and LVDS out-
puts. The MAX9175 has an anything differential input
(CML/LVDS/LVPECL) and LVDS outputs. The outputs
can be put into high impedance using the power-down
inputs. The MAX9174 features a fail-safe circuit that dri-
ves the outputs high when the input is open, undriven
and shorted, or undriven and terminated. The MAX9175
has a bias circuit that forces the outputs high when the
input is open. The power-down inputs are compatible
with standard LVTTL/LVCMOS logic. The power-down
inputs tolerate undershoot of -1V and overshoot of V
CC
+ 1V. The MAX9174/MAX9175 are available in 10-pin
µMAX and 10-lead thin QFN with exposed pad pack-
ages, and operate from a single +3.3V supply over the
-40°C to +85°C temperature range.
♦
1.0ps
(RMS)
Jitter (max) at 670MHz
♦
80ps
(P-P)
Jitter (max) at 800Mbps Data Rate
♦
+3.3V Supply
♦
LVDS Fail-Safe Inputs (MAX9174)
♦
Anything Input (MAX9175) Accepts Differential
CML/LVDS/LVPECL
♦
Power-Down Inputs Tolerate -1.0V and V
CC
+ 1.0V
♦
Low-Power CMOS Design
♦
10-Lead µMAX and Thin QFN Packages
♦
-40°C to +85°C Operating Temperature Range
♦
Conform to ANSI TIA/EIA-644 LVDS Standard
♦
IEC 61000-4-2 Level 4 ESD Rating
Features
MAX9174/MAX9175
Ordering Information
PART
MAX9174EUB
MAX9174ETB*
MAX9175EUB
MAX9175ETB*
TEMP RANGE
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
10 µMAX
10 Thin QFN-EP**
10 µMAX
10 Thin QFN-EP**
Applications
Protection Switching
Loopback
Clock Distribution
Functional Diagram and Pin Configurations appear at end
of data sheet.
*Future
product—contact factory for availability.
**EP
= Exposed paddle.
Typical Application Circuit
CLOCK DISTRIBUTION
ASIC
MAX9174
MAX9176
CLK IN
CLK1
ASIC
MAX9174
MAX9176
CLK IN
CLK2
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
670MHz LVDS-to-LVDS and Anything-to-LVDS
1:2 Splitters
MAX9174/MAX9175
ABSOLUTE MAXIMUM RATINGS
V
CC
to GND ..………………………………………...-0.3V to +4.0V
IN+, IN- to GND...........................................……...-0.3V to +4.0V
OUT_+, OUT_- to GND..........................................-0.3V to +4.0V
PD0, PD1
to GND .......................................-1.4V to (V
CC
+ 1.4V)
Single-Ended and Differential Output
Short-Circuit Duration (OUT_+, OUT_-) .....................Continuous
Continuous Power Dissipation (T
A
= +70°C)
10-Pin µMAX (derate 5.6mW/°C above +70°C) ...........444mW
10-Lead QFN (derate 24.4mW/°C above +70°C) ......1951mW
Maximum Junction Temperature .....................................+150°C
Storage Temperature Range .............................-65°C to +150°C
ESD Protection
Human Body Model (R
D
= 1.5kΩ, C
S
= 100pF)
IN+, IN-, OUT_+, OUT_-...............................................…±2kV
Other Pins (V
CC
,
PD0, PD1)
...............................................2kV
IEC 61000-4-2 Level 4 (R
D
= 330Ω, C
S
= 150pF)
Contact Discharge IN+, IN-, OUT_+, OUT_- ...................±8kV
Air-Gap Discharge IN+, IN-, OUT_+, OUT_- .................±15kV
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(V
CC
= +3.0V to +3.6V, R
L
= 100Ω ±1%,
PD_
= high, differential input voltage |V
ID
| = 0.05V to 1.2V, MAX9174 input common-mode
voltage V
CM
= |V
ID
/2| to (2.4V - |V
ID
/2|), MAX9175 input common-mode voltage V
CM
= |V
ID
/2| to (V
CC
- | V
ID
/2|), T
A
= -40°C to
+85°C, unless otherwise noted. Typical values are at V
CC
= +3.3V, |V
ID
| = 0.2V, V
CM
= +1.25V, T
A
= +25°C.) (Notes 1, 2, 3)
PARAMETER
DIFFERENTIAL INPUT (IN+, IN-)
Differential Input High Threshold
Differential Input Low Threshold
Input Current
VTH
VTL
I
IN
+, I
IN
-
I
IN
+,
I
IN
-
R
IN1
R
IN2
RIN3
Figure 1
MAX9174
Power-Off Input Current
MAX9175
V
CC
= 0V or open, Figure 1
V
IN
+ = 3.6V or 0V, V
IN
- = 3.6V
or 0V, V
CC
= 0V or open,
Figure 1
-20
+20
µA
-50
-20
+20
+50
mV
mV
µA
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Fail-Safe Input Resistors
(MAX9174)
Input Resistors
(MAX9175)
V
CC
= 3.6V, 0V or open, Figure 1
V
CC
= 3.6V, 0V or open, Figure 1
IN+ or IN- to GND (Note 4)
60
200
212
108
394
450
4.5
V
CC
+
1
+0.8
+20
+1.5
kΩ
kΩ
pF
Input Capacitance
C
IN
P
LVTTL/LVCMOS INPUTS (P
D 0
,
P D 1
)
Input High Voltage
Input Low Voltage
Input Current
LVDS OUTPUTS (OUT_+, OUT_-)
Differential Output Voltage
Change in Differential Output
Voltage Between Logic States
Offset Voltage
V
OD
∆V
OD
V
OS
V
IH
V
IL
2.0
-1.0
-1.0V
≤
PD_
≤
0V
-1.5
-20
0V
≤
PD_
≤
V
CC
V
CC
≤
PD_
≤
V
CC
+ 1.0V
Figure 2
Figure 2
Figure 3
1.125
250
393
1.0
1.29
V
V
mA
µA
mA
mV
mV
V
I
IN
475
15
1.375
2
_______________________________________________________________________________________
670MHz LVDS-to-LVDS and Anything-to-LVDS
1:2 Splitters
DC ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= +3.0V to +3.6V, R
L
= 100Ω ±1%,
PD_
= high, differential input voltage |V
ID
| = 0.05V to 1.2V, MAX9174 input common-mode
voltage V
CM
= |V
ID
/2| to (2.4V - |V
ID
/2|), MAX9175 input common-mode voltage V
CM
= |V
ID
/2| to (V
CC
- | V
ID
/2|), T
A
= -40°C to
+85°C, unless otherwise noted. Typical values are at V
CC
= +3.3V, |V
ID
| = 0.2V, V
CM
= +1.25V, T
A
= +25°C.) (Notes 1, 2, 3)
PARAMETER
Change in Offset Voltage
Between Logic States
Fail-Safe Differential Output
Voltage (MAX9174)
Differential Output Resistance
Power-Down Single-Ended
Output Current
SYMBOL
∆V
OS
V
OD
R
DIFF
Figure 3
Figure 2
V
CC
= 3.6V or 0V
V
OUT
_+ = open,
V
OUT
_- = 3.6V or 0V
V
OUT
_- = open,
V
OUT
_+ = 3.6V or 0V
PD0, PD1
= low,
V
CC
= 0V or open
V
OUT
_+ = open,
V
OUT
_- = 3.6V or 0V
V
OUT
_- = open,
V
OUT
_+ = 3.6V or 0V
-15
250
86
CONDITIONS
MIN
TYP
1.0
393
119
MAX
15
475
160
UNITS
mV
mV
Ω
MAX9174/MAX9175
I
PD
PD_
= low
-1.0
±0.03
+1.0
µA
Power-Off Single-Ended Output
Current
I
OFF
-1.0
±0.03
+1.0
µA
Output Short-Circuit Current
Differential Output Short-Circuit
Current Magnitude
Supply Current
Power-Down Supply Current
Output Capacitance
I
OS
V
ID
= +50mV or -50mV, V
OUT
_+ = 0V or
V
CC
V
ID
= +50mV or -50mV, V
OUT
_- = 0V or V
CC
+15
mA
I
OSD
V
ID
= +50mV or -50mV, V
OD
= 0V (Note 4)
PD0
= V
CC
,
PD1
= 0V or
PD0
= 0V,
PD1
= V
CC
PD0
= Vcc,
PD1
= Vcc
PD1, PD0
= 0V
OUT_+ or OUT_- to GND (Note 4)
17
25
0.5
15
26
35
20
5.2
mA
I
CC
I
CCPD
C
O
mA
µA
pF
_______________________________________________________________________________________
3
670MHz LVDS-to-LVDS and Anything-to-LVDS
1:2 Splitters
MAX9174/MAX9175
AC ELECTRICAL CHARACTERISTICS
(V
CC
= +3.0V to +3.6V, R
L
= 100Ω±1%, C
L
= 5pF, differential input voltage |V
ID
| = 0.15V to 1.2V, MAX9174 input common-mode volt-
age, V
CM
= |V
ID
/2| to (2.4V - |V
ID
/2|), MAX9175 input common-mode voltage V
CM
= |V
ID
/2| to (V
CC
- |V
ID
/2|),
PD_
= high, T
A
= -40°C
to +85°C, unless otherwise noted. Typical values are at V
CC
= +3.3V, |V
ID
| = 0.2V, V
CM
= +1.25V, T
A
= +25°C.) (Notes 5, 6, 7)
PARAMETER
High-to-Low Propagation Delay
Low-to-High Propagation Delay
Added Deterministic Jitter
Added Random Jitter
Pulse Skew
t
PLH
- t
PHL
Output-to-Output Skew
Part-to-Part Skew
Rise Time
Fall Time
Power-Down Time
Power-Up Time
SYMBOL
t
PHL
t
PLH
t
DJ
t
RJ
t
SKP
t
SKOO
t
SKPP1
t
SKPP2
t
R
t
F
t
PD
t
PU
Figures 4, 5
Figures 4, 5
Figures 4, 5 (Note 8)
Figures 4, 5
Figures 4, 5
Figure 6
Figures 4, 5 (Note 9)
Figures 4, 5 (Note 10)
Figures 4, 5
Figures 4, 5
Figures 7, 8
PD0, PD1
= L
→
H, Figures 7, 8
PD0
= H,
PD1
= L
→
H, Figures 7, 8
PD1
= H,
PD0
L
→
H, Figures 7, 8
Maximum Data Rate
Maximum Switching Frequency
Switching Supply Current
PRBS Supply Current
D
RMAX
f
MAX
I
CCSW
I
CCPR
Figures 4, 5,
V
OD
≥
250mV
(Note 11)
Figures 4, 5,
V
OD
≥
250mV (Note 11)
f
IN
= 670MHz
f
IN
= 155MHz
D
R
= 800Mbps, 2
23
- 1 PRBS input
800
670
55
35
37
65
44
46
110
110
257
252
10
18
92
92
10
14
0.4
CONDITIONS
MIN
1.33
1.33
TYP
2.38
2.39
MAX
3.23
3.23
80
1.0
141
45
1.3
1.9
365
365
13
35
103
103
UNITS
ns
ns
ps
(P-P)
ps
(RMS)
ps
ps
ns
ps
ps
ns
µs
ns
Mbps
MHz
mA
mA
Note 1:
Current into a pin is defined as positive. Current out of a pin is defined as negative. All voltages are referenced to ground
except V
TH
, V
TL
, V
ID
, V
OD
, and
∆V
OD
.
Note 2:
Maximum and minimum limits over temperature are guaranteed by design and characterization. Devices are 100% tested at
T
A
= +25°C.
Note 3:
Tolerance on all external resistors (including figures) is ±1%.
Note 4:
Guaranteed by design.
Note 5:
AC parameters are guaranteed by design and characterization and are not production tested. Limits are set at ±6 sigma.
Note 6:
C
L
includes scope probe and test jig capacitance.
Note 7:
Pulse-generator output for differential inputs IN+, IN- (unless otherwise noted): f = 670MHz, 50% duty cycle, R
O
= 50Ω, t
R
=
700ps, and t
F
= 700ps (0% to 100%). Pulse-generator output for single-ended inputs
PD0, PD1:
t
R
= t
F
= 1.5ns (0.2V
CC
to
0.8V
CC
), 50% duty cycle, V
OH
= V
CC
+ 1.0V settling to V
CC
, V
OL
= -1.0V settling to zero, f = 10kHz.
Note 8:
Pulse-generator output for t
DJ
: |V
OD
| = 0.15V, V
OS
= 1.25V, data rate 800Mbps, 2
23
- 1 PRBS, R
O
= 50Ω, t
R
= 700ps, and t
F
= 700ps (0% to 100%).
Note 9:
t
SKPP1
is the magnitude of the difference of any differential propagation delays between devices operating under identical
conditions.
Note 10:
t
SKPP2
is the magnitude of the difference of any differential propagation delays between devices operating over rated con-
ditions.
Note 11:
Meets all AC specifications.
4
_______________________________________________________________________________________
670MHz LVDS-to-LVDS and Anything-to-LVDS
1:2 Splitters
MAX9174/MAX9175
Typical Operating Characteristics
((MAX9174) V
CC
= +3.3V, |V
ID
| = 0.15V, V
CM
= 1.25V, T
A
= +25°C, R
L
= 100Ω ±1%, C
L
= 5pf,
PD_
= V
CC
, unless otherwise noted.)
DIFFERENTIAL OUTPUT VOLTAGE
vs. FREQUENCY
MAX9174 toc01
MAX9174 toc02
SUPPLY CURRENT vs. TEMPERATURE
38
f
IN
= 155MHz
37
SUPPLY CURRENT (mA)
36
35
34
33
32
-40
-15
10
35
60
85
TEMPERATURE (°C)
410
DIFFERENTIAL OUTPUT VOLTAGE (mV)
400
390
380
370
360
350
340
330
320
310
300
0
OUTPUT RISE/FALL TIME
vs. TEMPERATURE
290
280
RISE/FALL TIME (ps)
270
260
250
240
230
220
210
t
F
t
R
f
IN
= 155MHz
MAX9174 toc03
300
100 200 300 400 500 600 700 800
FREQUENCY (MHz)
-40
-15
10
35
60
85
TEMPERATURE (°C)
DIFFERENTIAL PROPAGATION DELAY
vs. TEMPERATURE
MAX9174 toc04
OUTPUT-TO-OUTPUT SKEW
vs. TEMPERATURE
MAX9174 toc05
SUPPLY CURRENT vs. FREQUENCY
55
SUPPLY CURRENT (mA)
50
45
40
35
30
25
20
MAX9174 toc06
3.0
DIFFERENTIAL PROPAGATION DELAY (ns)
2.9
2.8
2.7
2.6
2.5
2.4
2.3
2.2
2.1
2.0
-40
-15
10
35
60
t
PLH
t
PHL
f
IN
= 155MHz
20
18
OUTPUT-TO-OUTPUT SKEW (ps)
16
14
12
10
8
6
4
2
0
f
IN
= 155MHz
60
85
-40
-15
10
35
60
85
0
100 200 300 400 500 600 700 800
FREQUENCY (MHz)
TEMPERATURE (°C)
TEMPERATURE (°C)
SUPPLY CURRENT vs. DATA RATE
MAX9174 toc07
SUPPLY CURRENT vs. SUPPLY VOLTAGE
39
38
SUPPLY CURRENT (mA)
37
36
35
34
33
32
31
f
IN
= 155MHz
MAX9174 toc08
OUTPUT RISE/FALL TIME
vs. SUPPLY VOLTAGE
290
280
RISE/FALL TIME (ps)
270
260
250
240
230
220
210
200
t
F
t
R
f
IN
= 155MHz
MAX9174 toc09
45
40
SUPPLY CURRENT (mA)
35
30
25
20
15
0
PRBS 2
23
- 1
40
300
30
100 200 300 400 500 600 700 800
DATA RATE (Mbps)
3.0
3.1
3.2
3.3
3.4
3.5
3.6
SUPPLY VOLTAGE (V)
3.0
3.1
3.2
3.3
3.4
3.5
3.6
SUPPLY VOLTAGE (V)
_______________________________________________________________________________________
5
ARM技术
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
