NCP5007
Compact Backlight LED
Boost Driver
The NCP5007 is a high efficiency boost converter operating in a
current control loop, based on a PFM mode, to drive White LEDs. The
current mode regulation allows a uniform brightness of the LEDs. The
chip has been optimized for small ceramic capacitors and is capable of
supplying up to 1.0 W output power.
Features
http://onsemi.com
MARKING
DIAGRAM
TSOP−5
(SOT23−5, SCR59−5)
SN SUFFIX
CASE 483
1
5
DCLAYWG
G
1
•
•
•
•
•
•
•
•
•
•
•
•
Inductor Based Converter brings High Efficiency
Constant Output Current Regulation
2.7 to 5.5 V Input Voltage Range
V
out
to 22 V Output Compliance Allows up to 5 LEDs to be Driven
in Series which Provides Automatic LED Current Matching
Built−in Output Overvoltage Protection
0.3
mA
Standby Quiescent Current
Includes Dimming Function (PWM)
Enable Function Driven Directly from Low Battery Voltage Source
Thermal Shutdown Protection
All Pins are Fully ESD Protected
Low EMI Radiation
Pb−Free Package is Available
5
DCL = Device Code
A
= Assembly Location
Y
= Year
W = Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
PIN CONNECTIONS
FB
GND
EN
1
2
3
(Top View)
4
V
out
5
V
bat
Typical Applications
•
LED Display Back Light Control
•
High Efficiency Step Up Converter
V
bat
U1
3
EN
V
bat
5
V
bat
C1
4.7
mF
L1
22
mH
2
1
V
out
4
D1
MBR0530
C2
1.0
mF
GND
ORDERING INFORMATION
Device
NCP5007SNT1
NCP5007SNT1G
Package
TSOP−5
TSOP−5
(Pb−Free)
Shipping
†
3000/Tape & Reel
3000/Tape & Reel
GND
GND
FB
NCP5007
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
R1
GND
5.6
W
D6
D5
D4
D3
D2
GND
Figure 1. Typical Application
©
Semiconductor Components Industries, LLC, 2006
1
March, 2006 − Rev. 4
Publication Order Number:
NCP5007/D
NCP5007
Thermal
Shutdown
Current Sense
V
bat
Vsense
5
V
bat
4
EN
3
100 k
V
out
CONTROLLER
GND
Q1
FB
1
300 k
+200 mV
−
+
GND
2
GND
Band Gap
Figure 2. Block Diagram
http://onsemi.com
2
NCP5007
PIN FUNCTION DESCRIPTION
Pin
1
Symbol
FB
Type
ANALOG
INPUT
Description
This pin provides the output current range adjustment by means of a sense resistor connected
to the analog control or with a PWM control. The dimming function can be achieved by applying
a PWM voltage technique to this pin (see Figure 29). The current output tolerance depends
upon the accuracy of this resistor. Using a
"5%
metal film resistor, or better, yields good output
current accuracy. Note: A built−in comparator switches OFF the DC−DC converter if the voltage
sensed across this pin and ground is higher than 700 mV typical.
This pin is the system ground for the NCP5007 and carries both the power and the analog
signals. High quality ground must be provided to avoid spikes and/or uncontrolled operation.
Care must be observed to avoid high−density current flow in a limited PCB copper track so a
robust ground plane connection is recommended.
This is an Active−High logic input which enables the boost converter. The built−in pulldown
resistor disables the device when the EN pin is left open. Note the logic switching level of this
input has been optimized to allow it to be driven from standard or 1.8 V CMOS logic levels.
The LED brightness can be controlled by applying a pulse width modulated signal to the enable
pin (see Figure 30).
This pin is the power side of the external inductor and must be connected to the external
Schottky diode. It provides the output current to the load. Since the boost converter operates in
a current loop mode, the output voltage can range up to +22 V but shall not exceed this limit.
However, if the voltage on this pin is higher than the OVP threshold (Over Voltage Protection)
the device enters a shutdown mode. To restart the chip, one must either apply a low to high logic
signal to the EN pin, or switch off the V
bat
supply.
A capacitor must be used on V
out
to avoid false triggering of the OVP (Overvoltage Protect)
circuit. This capacitor filters the noise created by the fast switching transients. In order to limit
the inrush current and still have acceptable startup time the capacitor value should range
between 1.0
mF
and 8.2
mF
max. To achieve high efficiency this capacitor should be ceramic
(ESR
t
100 mW).
Care must be observed to avoid EMI through the PCB copper tracks connected to this pin.
5
V
bat
POWER
The external voltage supply is connected to this pin. A high quality reservoir capacitor must be
connected across pin 5 and Ground to achieve the specified output voltage parameters. A
4.7
mF/6.3
V, low ESR capacitor must be connected as close as possible across pin 5 and
ground pin 2. The X5R or X7R ceramic MURATA types are recommended.
The return side of the external inductor shall be connected to this pin. Typical application will
use a 22
mH,
size 1210, to handle the 10 to 100 mA output current range. When the desired
output current is above 20 mA, the inductor shall have an ESR
v1.5
W
to achieve good
efficiency over the V
bat
range. The output current tolerance can be improved by using a larger
inductor value.
2
GND
POWER
3
EN
DIGITAL
INPUT
4
V
out
POWER
http://onsemi.com
3
NCP5007
MAXIMUM RATINGS
Rating
Power Supply
Output Power Supply Voltage Compliance
Digital Input Voltage
Digital Input Current
ESD Capability (Note 1)
Human Body Model (HBM)
Machine Model (MM)
TSOP5 Package
Power Dissipation @ T
A
= +85°C (Note 2)
Thermal Resistance, Junction−to−Air
Operating Ambient Temperature Range
Operating Junction Temperature Range
Maximum Junction Temperature
Storage Temperature Range
Symbol
V
bat
V
out
EN
V
ESD
2.0
200
P
D
R
qJA
T
A
T
J
T
Jmax
T
stg
160
250
−25 to +85
−25 to +125
+150
−65 to +150
kV
V
mW
°C/W
°C
°C
°C
°C
Value
6.0
28
−0.3
v
V
in
v
V
bat
+0.3
1.0
Unit
V
V
V
mA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. This device series contains ESD protection and exceeds the following tests:
Human Body Model (HBM)
"2.0
kV per JEDEC standard: JESD22−A114
Machine Model (MM)
"200
V per JEDEC standard: JESD22−A115
2. The maximum package power dissipation limit must not be exceeded.
3. Latchup current maximum rating:
"100
mA per JEDEC standard: JESD78.
4. Moisture Sensivity Level (MSL): 1 per IPC/JEDEC standard: J−STD−020A.
POWER SUPPLY SECTION
(Typical values are referenced to T
a
= +25°C, Min & Max values are referenced −25°C to +85°C ambient
temperature, unless otherwise noted.)
Rating
Power Supply
Output Load Voltage Compliance
Continuous DC Current in the Load
@ V
out
= 3
LED, L = 22
mH,
ESR < 1.5
W,
V
bat
= 3.6 V
Standby Current @ I
out
= 0 mA, EN = L, V
bat
= 3.6 V
Standby Current @ I
out
= 0 mA, EN = L, V
bat
= 5.5 V
Inductor Discharging Time @ V
bat
= 3.6 V, L = 22
mH,
3
I
out
= 10 mA
Thermal Shutdown Protection
Thermal Shutdown Protection Hysteresis
LED,
Pin
4
5
5
4
4
4
−
−
Symbol
V
bat
V
out
I
out
I
stdb
I
stdb
Toffmax
T
SD
T
SDH
Min
2.7
22
50
−
−
−
−
−
Typ
−
24.5
−
0.45
1.0
320
160
30
Max
5.5
−
−
−
3.0
−
−
−
Unit
V
V
mA
mA
mA
ns
°C
°C
http://onsemi.com
4
NCP5007
ANALOG SECTION
(Typical values are referenced to T
a
= +25°C, Min & Max values are referenced −25°C to +85°C ambient
temperature, unless otherwise noted.)
Rating
High Level Input Voltage
Low Level Input Voltage
EN Pull Down Resistor
Feedback Voltage Threshold
Output Current Stabilizes @ 5% time delay following a
DC−DC startup @ V
bat
= 3.6 V, L = 22
mH,
I
out
= 20 mA
Internal Switch ON Resistor @ T
amb
= +25°C
Pin
1
1
4
5
5
Symbol
EN
R
EN
FB
I
outdly
QR
DSON
Min
1.3
−
−
170
−
−
Typ
−
−
100
200
100
1.7
Max
−
0.4
−
230
−
−
Unit
V
kW
mV
ms
W
5. The overall tolerance depends upon the accuracy of the external resistor.
THEORY OF OPERATION
The DC−DC converter is designed to supply a constant
current to the external load, the circuit being powered from
a standard battery supply. Since the regulation is made by
means of a current loop, the output voltage will vary
depending upon the dynamic impedance presented by the
load.
Considering a high intensity LED, the output voltage can
range from a low of 6.4 V (two LED in series biased with a
low current), up to 22 V, the maximum the chip can sustain
continuously. The basic DC−DC structure is depicted in
Figure 3.
With a 22 V operating voltage capability, the power
device Q1 can accommodate a high voltage source without
any leakage current degradation.
V
bat
L1
22
mH
POR
Vdsense
4
D1
Q1
Vds
1.0
mF
C2
GND
1
TIME_OUT
ZERO_CROSSING
RESET
GND
LOGIC
CONTROL
Vdsense
+
−
V(Ipeak)
−
+
C2
R1
R2
xR
D5
Vs
GND
Vref
GND
Figure 3. Basic DC−DC Converter Structure
http://onsemi.com
5
D4
D3
D2
嵌入式系统
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
