19-2153; Rev 3; 12/08
KIT
ATION
EVALU
BLE
AVAILA
3.125Gbps XAUI Quad Equalizer
General Description
Features
♦
Four Differential Digital Data “Lanes” at
3.125Gbps
♦
Spans 40in (1.0m) of FR-4 PC Board
♦
Receiver Equalization Reduces Intersymbol
Interference (ISI)
♦
Low-Power, 175mW per Channel
♦
Standby Mode—Power-Down State
♦
Single +3.3V Supply
♦
Signal Detect
MAX3980
The MAX3980 quad equalizer provides compensation
for transmission medium losses for four “lanes” of digi-
tal NRZ data at a 3.125Gbps data rate in one package.
It is tailor-made for 10-Gigabit Ethernet (10GbE) back-
plane applications requiring attenuation of noise and jit-
ter that occur in communicating from MAC to PMD or
from MAC to Switch. In support of the IEEE-802.3ae for
the XAUI interface, the MAX3980 adaptively allows
XAUI lanes to reach up to 40in (1.0m) on FR-4 board
material.
The equalizer has 100Ω differential CML data inputs
and outputs.
The MAX3980 is available in a 44-pin exposed-pad
QFN package. The MAX3980 consumes only 700mW at
+3.3V or 175mW per channel.
Ordering Information
PART
TEMP RANGE
0°C to +85°C
0°C to +85°C
PIN-PACKAGE
44 QFN-EP*
44 TQFN-EP*
MAX3980UGH
MAX3980UTH+
Applications
IEEE-802.3ae XAUI Interface (3.125Gbps)
InfiniBand
SM
(2.5Gbps)
+Denotes
a lead-free/RoHS-compliant package.
*EP
= Exposed pad.
Pin Configuration appears at end of data sheet.
Typical Application Circuit
LINE CARD
PC BOARD
BACKPLANE
PMD
MAC
≤
40in (1.0m)
Rx
Tx
4
Rx
Tx
4 x 3.125Gbps
10GbE
4x
3.125Gbps
4
4
+3.3V
SUPPLY
4
IN
OUT
4
Rx
SWITCH
SWITCH CARD
MAX3980
+3.3V
SUPPLY
Tx
Rx
Tx
Rx
OUT
MAX3980
IN
≤
40in (1.0m)
4
Tx
InfiniBand is a trademark and service mark of the InfiniBand Trade Association.
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
3.125Gbps XAUI Quad Equalizer
MAX3980
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, V
CC
..............................................-0.5V to +4.0V
Voltage at SDET, IN_±................................-0.5V to (V
CC
+ 0.5V)
Current Out of OUT_±.......................................-25mA to +25mA
Continuous Power Dissipation (T
A
= +85°C)
44-Pin QFN-EP (derate 26.3mW/°C above +85°C)...2105mW
Operating Ambient Temperature Range ................0°C to +85°C
Storage Temperature Range .............................-55°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
CC
= +3.0V to +3.6V, input data rate = 3.125Gbps, T
A
= 0°C to +85°C. Typical values are at V
CC
= +3.3V and T
A
= +25°C, unless
otherwise noted.)
PARAMETER
Supply Power
SYMBOL
EN = TTL low
EN = TTL high
10Hz < f < 100Hz
Supply Noise Tolerance
Signal Detect Assert
Signal Detect Deassert
Signal Detect Delay
Latency
CML RECEIVER INPUT
Input Voltage Swing
Return Loss
Input Resistance
EQUALIZATION
Residual Jitter
Random Jitter
CML TRANSMITTER OUTPUT
(into 100Ω
±1Ω)
Output Voltage Swing
Common-Mode Voltage
Transition Time
Differential Skew
Output Resistance
t
f
, t
r
20% to 80% (Note 3)
Difference in 50% crossing between OUT_+
and OUT_-
Single ended
40
50
Differential swing
550
V
CC
- 0.3
60
130
12
60
850
mVp-p
V
ps
ps
Ω
Total jitter (Note 2)
Deterministic jitter
(Note 2)
1.5
0.3
0.2
UIp-p
ps
RMS
XAUI transmitter output measured
differentially at point A, Figure 1, using
K28.5 pattern
100MHz to 2.5GHz
Differential
80
200
12
100
120
800
mVp-p
dB
Ω
From input to output
0.32
100Hz < f < 1MHz
1MHz < f < 2.5GHz
Input signal level to assert SDET (Note 1)
Input signal level to deassert SDET (Note 1)
100
30
10
0.7
100
40
10
mVp-p
mVp-p
μs
ns
mVp-p
CONDITIONS
MIN
TYP
MAX
0.25
0.9
UNITS
W
2
_______________________________________________________________________________________
3.125Gbps XAUI Quad Equalizer
ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= +3.0V to +3.6V, input data rate = 3.125Gbps, T
A
= 0°C to +85°C. Typical values are at V
CC
= +3.3V and T
A
= +25°C, unless
otherwise noted.)
PARAMETER
TTL CONTROL PINS
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
Output High Voltage
Output Low Voltage
Internal 10kΩ pullup
Internal 10kΩ pullup
2.4
0.4
2.0
0.8
250
500
V
V
μA
μA
V
V
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
MAX3980
Note 1:
K28.7 pattern is applied differentially at point A as shown in Figure 1.
Note 2:
Total jitter does not include the signal source jitter. Total jitter (TJ) = [14.1 x RJ + DJ] where RJ is random RMS jitter and DJ
is maximum deterministic jitter. Signal source is a K28.5± pattern (00
1111 1010 11 0000 0101)
for the deterministic jitter
test and K28.7 (0011111000) or equivalent for the random jitter test. Residual jitter is that which remains after equalizing
media-induced losses of the environment of Figure 1 or its equivalent. The deterministic jitter at point B must be from media-
induced loss and not from clock-source modulation. Jitter is measured at 0 at point C of Figure 1.
Note 3:
Using K28.7 (0011111000) pattern.
A
FR-4 STRIPLINE
≤
40in (1m)
B
C
MAX3980
SMA
CONNECTOR
SMA
CONNECTOR
IN
OUT
Figure 1. Test Conditions Referenced in the Electrical Characteristics Table
_______________________________________________________________________________________
3
3.125Gbps XAUI Quad Equalizer
MAX3980
Typical Operating Characteristics
(V
CC
= +3.3V, 3.125Gbps, 500mVp-p board input with 2
7
- 1 PRBS, T
A
= +25°C, unless otherwise noted.)
EQUALIZER INPUT EYE DIAGRAM
BEFORE EQUALIZATION
(40in FR-4 6mil STRIPLINE)
MAX3980 toc01
EQUALIZER OUTPUT EYE DIAGRAM
AFTER EQUALIZATION
(40in FR-4 6mil STRIPLINE)
MAX3980 toc02
EQUALIZER OUTPUT EYE DIAGRAM
(20in BACKPLANE WITH TWO TERADYNE HSD
CONNECTORS AND 3in DAUGHTERBOARD)
MAX3980 toc03
50mV/
div
100mV/
div
100mV/
div
50ps/div
50ps/div
50ps/div
INPUT RETURN GAIN (S11, DIFFERENTIAL,
INPUT SIGNAL = -60dBm,
DEVICE POWERED OFF)
MAX3980 toc04
EQUALIZER DETERMINISTIC JITTER
vs. LENGTH
(FR-4 6mil STRIPLINE, K28.5 PATTERN)
35
30
MAX3980 toc05
EQUALIZER LATENCY
vs. TEMPERATURE
MAX3980 toc06
10
0
-10
40
500
450
400
DELAY (ps)
350
300
250
200
-20
-30
-40
-50
50
1050
2050
3050
4050
5050
FREQUENCY (MHz)
JITTER (ps)
GAIN (dB)
25
20
15
10
5
0
0
10
20
30
40
50
LENGTH (in)
0
10
20
30
40
50
60
70
80
90
TEMPERATURE (°C)
EQUALIZER OPERATING
CURRENT vs. TEMPERATURE
210
190
CURRENT (mA)
170
150
130
110
90
70
50
0
10
20
30
40
50
60
70
80
TEMPERATURE (°C)
STANDBY POWER
(EN = TTL LOW)
MAX3980 toc07
NORMAL OPERATION
(EN = TTL HIGH)
4
_______________________________________________________________________________________
3.125Gbps XAUI Quad Equalizer
Pin Description
PIN
1, 5, 9, 13,
23, 27, 31,
35
2
3
4, 8, 12, 16,
26, 30, 34,
38
6
7
10
11
14
15
17–22, 39–42
24
25
28
29
32
33
36
37
43
44
—
NAME
V
CC
IN1+
IN1-
GND
IN2+
IN2-
IN3+
IN3-
IN4+
IN4-
N.C.
OUT4-
OUT4+
OUT3-
OUT3+
OUT2-
OUT2+
OUT1-
OUT1+
EN
SDET
EP
+3.3V Supply Voltage
Positive Equalizer Input Channel 1, CML
Negative Equalizer Input Channel 1, CML
Supply Ground
Positive Equalizer Input Channel 2, CML
Negative Equalizer Input Channel 2, CML
Positive Equalizer Input Channel 3, CML
Negative Equalizer Input Channel 3, CML
Positive Equalizer Input Channel 4, CML
Negative Equalizer Input Channel 4, CML
No Connection. Leave unconnected.
Negative Equalizer Output Channel 4, CML
Positive Equalizer Output Channel 4, CML
Negative Equalizer Output Channel 3, CML
Positive Equalizer Output Channel 3, CML
Negative Equalizer Output Channel 2, CML
Positive Equalizer Output Channel 2, CML
Negative Equalizer Output Channel 1, CML
Positive Equalizer Output Channel 1, CML
Enable Equalizer Input. A TTL high selects normal operation. A TTL low selects low-power
standby mode.
Signal Detect Output for Channel 1. Produces a TTL high output when a signal is detected.
Exposed Pad. The exposed pad must be soldered to the circuit board ground plane for proper
thermal and electrical performance.
FUNCTION
MAX3980
_______________________________________________________________________________________
5
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