Operating Temperature Range (Industrial) . . . . . . . .-40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTE:
3.
JA
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications
Over the recommended operating conditions, unless otherwise specified. Parameters with MIN and/or MAX
limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
PARAMETER
TEST CONDITIONS
MIN
2.0
V
DD
= 5.0V
V2MON = 3.3V
V3MON, V4MON, V5MON = 1.0V
14
5.5
19
TYP
MAX UNITS
5.5
19
7
100
V
µA
µA
nA
SYMBOL
V
DD
I
DD1
I
DD2
I
DDA
Supply Voltage Range
V
DD
Supply Current
V2MON Input Current
V3MON, V4MON, V5MON Input Current
VOLTAGE THRESHOLDS
V
TH1
ISL88031IU8HxZ Fixed Voltage Trip Point for V
DD
+25°C
0°C to +70°C
-40°C to +85°C
ISL88031IU8ExZ Fixed Voltage Trip Point for V
DD
+25°C
0°C to +70°C
40°C to +85°C
V
TH1HYST
Hysteresis of V
TH1
V
TH1
= 4.64V
V
TH1
= 2.90V
V
TH2
ISL88031IU8xFZ Fixed Voltage Trip Point for V2MON
+25°C
0°C to +70°C
-40°C to +85°C
ISL88031IU8xEZ Fixed Voltage Trip Point for V2MON
+25°C
0°C to +70°C
-40°C to +85°C
ISL88031IU8xCZ Fixed Voltage Trip Point for V2MON
+25°C
0°C to +70°C
-40°C to +85°C
ISL88031IU8xAZ Fixed Voltage Trip Point for V2MON
+25°C
0°C to +70°C
-40°C to +85°C
3.022
2.963
2.958
2.901
2.845
2.840
2.291
2.246
2.242
1.652
1.620
1.617
4.550
4.461
4.453
2.814
2.759
2.754
4.634 4.717
4.634 4.807
4.634 4.815
2.866 2.917
2.866 2.973
2.866 2.978
46
29
3.078 3.133
3.078 3.193
3.078 3.198
2.955 3.008
2.955 3.065
2.955 3.070
2.333 2.375
2.333 2.420
2.333 2.424
1.683 1.713
1.683 1.746
1.683 1.749
V
V
V
V
V
V
mV
mV
V
V
V
V
V
V
V
V
V
V
V
V
FN8227 Rev 2.00
June 9, 2009
Page 3 of 8
ISL88031
Electrical Specifications
Over the recommended operating conditions, unless otherwise specified. Parameters with MIN and/or MAX
limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
(Continued)
PARAMETER
Hysteresis of V
TH2
TEST CONDITIONS
V
TH2
= 3.09V
V
TH2
= 2.92V
V
TH2
= 2.32V
V
TH2
= 1.69V
V
REF
V
TH
for V3MON, V4MON, V5MON Adj. Reset Threshold
Voltage
+25°C
0°C to +70°C
-40°C to +85°C
V
REFHYST
RESET
V
OL
Reset Output Voltage Low
V
DD
3.3V, Sinking 2.5mA
V
DD
< 3.3V, Sinking 1.5mA
t
RPD
t
POR
C
LOAD
V
TH
to Reset Asserted Delay
POR Timeout Delay
Load Capacitance on Reset Pins
80
0.05
0.05
6
120
5
180
0.40
0.40
V
V
µs
ms
pF
Hysteresis Voltage
0.589
0.578
0.577
MIN
TYP
37
29
23
17
0.600 0.611
0.600 0.622
0.600 0.623
3
MAX UNITS
mV
mV
mV
mV
V
V
V
mV
SYMBOL
V
TH2HYST
MANUAL RESET
V
MRL
V
MRH
t
MR
R
PU
MR Input Voltage Low
MR Input Voltage High
MR Minimum Pulse Width
Internal Pull-Up Resistor
V
DD
- 0.6
550
10
0.8
V
V
ns
k
Pin Descriptions
RST
The RST output is an open drain output, which is asserted low
whenever:
1. the device is initially powered up to 1V or,
2. V
DD
, V2MON, V3MON, V4MON, or V5MON fall below their
minimum voltage sense level.
V2MON
The V2MON input is the second preset monitored voltage that
causes the RST output to go low when the voltage on V2MON
falls below V
TH2
.
V3MON, V4MON, and V5MON
The VxMON inputs provide monitoring and UV compliance of
three additional voltages through resistor dividers. A reset is
issued on the ISL88031 if the voltage on any VxMON falls
below the internal V
REF
of 0.6V.
MR
The MR input is an active low debounced input to which a user
can connect a push-button to add manual reset capability or use
a signal to pull low. MR has an internal pull-up resistor.
Principles of Operation
The ISL88031 device provides those functions needed for
monitoring critical voltages, such as power-supply and battery
functions in microprocessor systems. It provides such features as
Power-On Reset control, Supply Voltage Supervision, and
Manual Reset Assertion. The integration of all these features
along with competitive reset threshold accuracy and low power
consumption, makes the ISL88031 device suitable for a wide
V
DD
The V
DD
pin is the IC power supply terminal. The voltage at
this pin is compared against an internal factory-programmed
voltage trip point, V
TH1
. RST is first asserted low when the
device is initially powered and V
DD
< 1V and then at any time
thereafter when V
DD
falls below V
TH1
. The device is designed
with hysteresis to help prevent chattering due to noise and is
immune to brief power-supply transients.
FN8227 Rev 2.00
June 9, 2009
Page 4 of 8
ISL88031
variety of applications needing multi-voltage monitoring.
See Figure 1 for the typical application diagram..
V
DD
V2MON
V3MON
RST
Manual Reset
The manual-reset input (MR) allows the user to trigger a reset
by using a push-button switch or by signaling the input low. The
MR input is an active low debounced input. Reset is asserted if
the MR pin is pulled low to less than 100mV for the minimum
MR pulse width or longer while the push-button is closed. After
MR is released, the reset output remains asserted low for t
POR
(200ms) and then is released.
Figures 2 and 3 illustrate the ISL88031’s operation. Figure 4
shows the ISL88031EVAL1, the evaluation platform for this
family of voltage monitors. Figures 5 and 6 illustrate the RST
output response times.
ISL88031
MR
RESET
SIGNAL
V4MON
PB
V5MON
GND
The ISL88031EVAL1 and Applications
FIGURE 1. TYPICAL APPLICATION DIAGRAM
Low Voltage Monitoring
During normal operation, the ISL88031 monitors the voltage
levels of V
DD
, V2MON, V3MON, V4MON, and V5MON. If the
voltage on any of these five inputs falls below their respective
voltage trip points, a reset is asserted (RST = low) to prevent
the microprocessor from operating during a power failure or
brownout condition. This reset signal remains low until the
voltages exceeds the voltage threshold settings for the reset
time delay period t
POR
.
The ISL88031 allows users to customize the minimum voltage
sense level for three of the five monitored voltages. For
example, the user can adjust the voltage input trip point (V
TRIP
)
for V3MON, V4MON and V5MON inputs. To do this, connect
an external resistor divider network to the VxMON pin in order
to set the trip point to some other voltage above 600mV
according to Equation 1:
V
TRIP
=
0.6V
R
1
+
R
2
/ R
2
(EQ. 1)
The ISL88031EVAL1 supports all variants of the ISL88031
devices, enabling evaluation of basic functional operation
and common application implementations. Figure 4
illustrates the ISL88031EVAL1 in schematic and
photographic forms. The ISL88031EVAL1 has two isolated
circuits; the left circuit is populated with the
ISL88031IU8HFZ (V
DD
V
TH1
= 4.64V, V2MON
V
TH2
= 3.08V). The right circuit is unpopulated for the user
to customize to provide a specific voltage monitoring solution
with the accompanying loose packed variants.
With adequate bias on the two preset and the three
adjustable monitor inputs, the RST output will release to pull
high indicating that all supplies are compliant for a minimum
of t
POR
. For the ISL88031EVAL1 as shipped, the V
DD
and
V2MON nominal thresholds are as previously noted with the
voltage thresholds being monitored by V3MON, V4MON and
V5MON being nominally 1.990V, 1.44V and 0.95V
respectively.
Special Application Considerations
Using good decoupling practices on bias and other
monitoring inputs will prevent transients (i.e. due to switching
noises and short duration droops in the supply voltage) from
causing unwanted resets.
In unusually noisy environments or situations where
unwanted signals may be injected into adjustable VMONx
pins, lowering the node impedance and/or positioning a
small valued filter capacitor as close to the pin as possible
can increase noise immunity.
Although the internal ISL88031 threshold references are
guaranteed over the full temp range, accuracy errors due to
external component tolerances and distribution losses will
occur. High tolerance resistors and layout for extreme
accuracy and critical performance must be considered.
Power-On Reset (POR)
Applying power to the ISL88031 activates a POR circuit, which
makes the reset pin(s) active (i.e. RST goes high while RST
goes low). These signals provide several benefits:
• It prevents the system microprocessor from starting to
operate with insufficient voltage.
• It prevents the processor from operating prior to stabilization
of the oscillator.
• It ensures that the monitored device is held out of operation
until internal registers are properly loaded.
• It allows time for an FPGA to download its configuration prior
to initialization of the circuit.
The reset signal remains active until V
DD
rises above the
minimum voltage sense level for time period t
POR
. This
ensures that the supply voltage has stabilized to sufficient
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