TH7110
315/433MHz
FSK/FM/ASK Receiver
Features
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Double superhet architecture for high degree of image rejection
FSK for digital data and FM reception for analog signal transmission
FM/FSK demodulation either with phase-coincidence or PLL demodulator
Low current consumption in active mode and very low standby current
Switchable LNA gain for improved dynamic range
AFC feature allows wide carrier frequency acceptance range
RSSI allows signal strength indication and ASK detection
Surface mount package LQFP44
Ordering Information
Part No.
TH7110
Temperature Range
-40 °C to 85 °C
Package
LQFP44
Application Examples
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General digital and analog 315 MHz or 433 MHz ISM band usage
Low-power telemetry
Alarm and security systems
Keyless car and central locking
Pagers
Technical Data Overview
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Input frequency range: 300 MHz to 450 MHz
Power supply range: 2.5 V to 5.5 V for double conversion and 2.7 V to 5.5 V for single conversion
Temperature range: -40 °C to +85 °C
Operating current: 6.5 mA at low gain and 8.2 mA at high gain mode
Standby current: < 100 nA
1)
with 40 kHz second IF filter BW (incl. SAW front-end filter loss)
Sensitivity: -111 dBm
2)
Sensitivity: -104 dBm with 150 kHz second IF filter BW (incl. SAW front-end filter loss)
Range of first IF: 10 MHz to 80 MHz
Range of second IF: 455 kHz to 21.4 MHz
Maximum input level: –10 dBm at ASK and 0 dBm at FSK
nd
Image rejection: > 65 dB (e.g. with SAW front-end filter and at 10.7 MHz 2 IF)
Spurious emission: < -70 dBm
Input frequency acceptance:
±50
kHz (with AFC option)
RSSI range: 70 dB
Frequency deviation range:
±5
kHz to
±120
kHz
Maximum data rate: 80 kbit/s NRZ
Maximum analog modulation frequency: 15 kHz
at
±
8 kHz FSK deviation, BER = 3⋅10 and phase-coincidence demodulation
2)
-3
at
±
50 kHz FSK deviation, BER = 3⋅10 and phase-coincidence demodulation
1)
-3
TH7110 Data Sheet
3901007110
Page 1 of 20
Nov. 2001
Rev. 005
TH7110
315/433MHz
FSK/FM/ASK Receiver
General Description
The TH7110 receiver IC consists of the following building blocks:
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PLL synthesizer (PLL SYNTH) for generation of the first and second local oscillator signals LO1 and LO2
Parts of the PLL SYNTH are the high-frequency VCO1, the feedback dividers DIV_8 and DIV_2,
a phase-frequency detector (PFD) with charge pump (CP) and a crystal-based reference oscillator (RO)
Low-noise amplifier (LNA) for high-sensitivity RF signal reception
First mixer (MIX1) for down-conversion of the RF signal to the first IF (IF1)
second mixer (MIX2) for down-conversion of the IF1 to the second IF (IF2)
IF amplifier (IFA) to amplify and limit the IF2 signal and for RSSI generation
Phase coincidence demodulator (DEMOD) with third mixer (MIX3) to demodulate the IF signal
Operational amplifier (OA) for data slicing, filtering, ASK detection and automatic-frequency control (AFC)
Bias circuitry for bandgap biasing and circuit shutdown
With the TH7110 receiver chip, various circuit configurations can be arranged in order to meet a number of
different customer requirements. For FM/FSK reception the IF tank used in the phase coincidence demodu-
lator can be constituted either by a ceramic resonator or an LC tank (optionally with varactor to create an AFC
circuit). In PLL demodulator configuration, the multiplier MIX3 forms a phase comparator. In ASK configurati-
on, the RSSI signal is feed to an ASK detector, which is constituted by the operational amplifier. The second
VCO (VCO2) can be used either as the VCO of a PLL demodulator or as the LO2 source of a second exter-
nal PLL in a multi-channel system. The following table briefly summarizes the various configurations.
Single-conversion configuration
FM/FSK
FM/FSK
FM/FSK
FM/FSK
ASK
ASK
RX with RSSI-based demodulation
narrow-band RX with ceramic demodulation
tank
wide-band RX with LC demod. tank and AFC
Double-conversion configuration
narrow-band RX with ceramic demodulation
tank
wide-band RX with LC demod. tank and AFC
multi-channel RX with ceramic demodulation
tank and external channel synthesizer
RX with RSSI-based demodulation
RX with RSSI-based demodulation and exter-
nal channel synthesizer
extended sensitivity RX with PLL demodulator extended sensitivity RX with PLL demodulator
The preferred superheterodyne configuration is
double conversion
where MIX1 and MIX2 are driven by the
internal local oscillator signals LO1 and LO2, respectively. This allows a
high degree of image rejection,
achieved in conjunction with an RF front-end filter. Efficient RF front-end filtering is realized by using a SAW,
ceramic or helix filter in front of the LNA and by adding a LC filter at the LNA output.
It is also possible to use the TH7110 in
single-conversion
configuration. This can be achieved by switching
the LO2 input of MIX2 from the on-chip PLL synthesizer to the pin IN_MIX2 by means of an internal switch
(done via pin SW_MIX2). Now MIX2 operates as an amplifier for the IF1 signal if an external pull-down re-
sistor at pin IN_MIX2 is added.
The same setting of MIX2 can be used for
multi-channel applications.
In this situation IN_MIX2 must be
driven by an external LO2 signal. This signal can be generated by the VCO2, which is mainly a bipolar tran-
sistor that can be configured as a varactor-tuned VCO. Furthermore, a second external PLL for channel
selection via LO2 tuning is required. This may be arranged by using a PLL synthesizer chip that can be con-
trolled through a 3-wire bus serial interface. The reference signal for the external PLL synthesizer can be
directly taken from the crystal-based reference oscillator RO.
TH7110 Data Sheet
3901007110
Page 2 of 20
Nov. 2001
Rev. 005
TH7110
315/433MHz
FSK/FM/ASK Receiver
Block Diagram
OUTP
OUTN
OAN
OA
OUT_OA
VCO2
VCO2_B
VCC_BIAS
VEE_BIAS
VREF
30
25
MIX3
IN_DEM
20
VCO2_E
OAP
32
27
24
28
26
23
39
31
19
ENRX
VCC_PLL
VEE_RO
36
21
22
38
35
33
34
18
RSSI
29
IFA
VEE_PLL
RO
16
17
FBC1
VEE_IF
14
13
IF1N
10
IF1P
9
IF1
VEE_MIX1
8
switch
MIX1
LO1
IN_MIX1
6
VCO1
VEE_LNA
5
DIV_8
CAP_MIX1
7
OUT_LNA
4
GAIN_LNA
3
LNA
VCC_LNA
VEE_LNA
IN_LNA
VEE_LNAC
2
VEE_VCO1
43
Fig. 1: TH7110 block diagram
TH7110 Data Sheet
3901007110
42
Page 3 of 20
40
41
LF2
SW_MIX2
IN_MIX2
VCC_MIX1
11
MIX2
12
LO2
VCC_MIX2
DIV_2
CP
OUT_MIX2
IF2
PFD
IN_IFA
15
LF1
RO
37
44
OUT_IFA
BIAS
ENRO
1
Nov. 2001
Rev. 005
TH7110
315/433MHz
FSK/FM/ASK Receiver
Frequency Planning
Frequency planning is straightforward for single-conversion applications because there is only one IF that
might be chosen, and then the only possible choice is low-side or high-side injection of the LO1 signal (which
is now the one and only LO signal in the receiver).
The receiver’s double-conversion architecture requires careful frequency planning. Besides the desired RF
input signal, there are a number of spurious signals that may cause an undesired response at the output.
Among them are the image of the RF signal (that must be suppressed by the RF front-end filter), spurious
signals injected to the first IF (IF1) and their images which could be mixed down to the same second IF (IF2)
as the desired RF signal (they must be suppressed by the LC filter at IF1 and/or by low-crosstalk design).
By configuring the TH7110 for double conversion and using its internal PLL synthesizer with fixed feedback
divider ratios of N1 = 8 (DIV_8) and N2 = 2 (DIV_2), four types of down-conversion are possible: low-side
injection of LO1 and LO2 (low-low), LO1 low-side and LO2 high-side (low-high), LO1 high-side and LO2
low-side (high-low) or LO1 and LO2 high-side (high-high). The following table summarizes some equations
that are useful to calculate the crystal reference frequency (REF), the first IF (IF1) and the VCO1 or first LO
frequency (LO1), respectively, for a given RF and second IF (IF2).
Injection type
REF
LO1
IF1
LO2
IF2
high-high
(RF – IF2)/14
16•REF
LO1 – RF
2•REF
LO2 – IF1
low-low
(RF – IF2)/18
16•REF
RF – LO1
2•REF
IF1 – LO2
high-low
(RF + IF2)/14
16•REF
LO1 – RF
2•REF
IF1 – LO2
low-high
(RF + IF2)/18
16•REF
RF – LO1
2•REF
LO2 – IF1
The following table depicts generated, desired, possible images and some undesired signals considering the
examples of 315 MHz and 433.6 MHz RF reception at IF2 = 10.7 MHz.
Signal type
Injection type
REF / MHz
LO1 / MHz
IF1 / MHz
LO2 / MHz
RF = 315
MHz
high-high
21.73571
RF = 315
MHz
low-low
16.90556
RF = 315
MHz
high-low
23.26429
RF = 315
MHz
low-high
18.09444
RF =
RF =
RF =
RF =
433.6 MHz 433.6 MHz 433.6 MHz 433.6 MHz
high-high
30.20714
low-low
23.49444
high-low
31.73571
low-high
24.68333
347.77143 270.48889
372.22857
32.77143
43.47143
44.51111
33.81111
57.22857
46.52857
289.51111 483.31429
375.91111
507.77143 394.93333
25.48889
36.18889
49.71429
60.41429
57.68889
46.98889
74.17143
63.47143
38.66667
49.36667
RF image/MHz 380.54286 225.97778
429.45714
IF1 image/MHz
54.17143
23.11111
35.82857
264.02222 533.02857
318.22222
581.94286 356.26667
46.88889
71.11429
36.28889
52.77143
60.06667
The selection of the reference crystal frequency is based on some assumptions. As for example: the first IF
and the image frequencies should not be in a radio band where strong interfering signals might occur
(because they could represent parasitic receiving signals), the LO1 signal should be in the range of 300 MHz
to 430 MHz (because this is the optimum frequency range of the VCO1). Furthermore the first IF should be
as high as possible to achieve highest RF image rejection. The columns in bold depict the selected frequency
plans to receive at 315 MHz and 433.6 MHz, respectively.
TH7110 Data Sheet
3901007110
Page 4 of 20
Nov. 2001
Rev. 005
TH7110
315/433MHz
FSK/FM/ASK Receiver
Pin Definition and Description
Pin No.
1
Name
VREF
I/O Type
analog
output
VREF
1
60k
Functional Schematic
Description
reference voltage output,
approx. 1.23V
4
OUT_LNA
analog
output
analog
input
ground
5k
OUT_LNA
4
LNA open-collector output,
to be connected to external
LC tank that resonates at RF
LNA input,
approx. 26Ω single-ended
42
2
IN_LNA
VEE_LNAC
IN_LNA
42
VEE_LNAC
2
ground of LNA core
(cascode)
LNA gain control (CMOS
input with hysteresis)
3
GAIN_LNA
analog
input
GAIN_LNA
3
400
Ω
5
6
VEE_LNA
IN_MIX1
ground
analog
input
IN_MIX1
6
13
Ω
500µA
LNA biasing ground
MIX1 input, approx. 33Ω
single-ended
13
Ω
7
CAP_MIX1
analog I/O
CAP_MIX1
7
330
Ω
40µA
connection for MIX1
blocking capacitor
8
9
VEE_MIX1
IF1P
ground
analog I/O
IF1P
9
20p
VCC
20p
MIX1 ground
open-collector output, to be
connected to external LC
tank that resonates at first IF
open-collector output, to be
connected to external LC
tank that resonates at first IF
VEE
IF1N
10
10
IF1N
analog I/O
2x500µA
VEE
TH7110 Data Sheet
3901007110
Page 5 of 20
Nov. 2001
Rev. 005
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