IS61WV25616ALL/ALS
IS61WV25616BLL/BLS
IS64WV25616BLL/BLS
256K x 16 HIGH SPEED ASYNCHRONOUS CMOS STATIC RAM
FEBRUARY 2017
FEATURES
HIGH SPEED: (IS61/64WV25616ALL/BLL)
• High-speed access time: 8, 10, 20 ns
• Low Active Power: 85 mW (typical)
• Low Standby Power: 7 mW (typical)
CMOS standby
LOW POWER: (IS61/64WV25616ALS/BLS)
• High-speed access time: 25, 35, 45 ns
• Low Active Power: 35 mW (typical)
• Low Standby Power: 0.6 mW (typical)
CMOS standby
• Single power supply
— V
dd
1.65V to 2.2V (IS61WV25616Axx)
— V
dd
2.4V to 3.6V (IS61/64WV25616Bxx)
•
•
•
•
•
Fully static operation: no clock or refresh required
Three state outputs
Data control for upper and lower bytes
Industrial and Automotive temperature support
Lead-free available
are high-speed, 4,194,304-bit static RAMs organized as
262,144 words by 16 bits. It is fabricated using
ISSI
's high-
performance CMOS technology. This highly reliable process
coupled with innovative circuit design techniques, yields
high-performance and low power consumption devices.
When
CE
is HIGH (deselected), the device assumes a
standby mode at which the power dissipation can be re-
duced down with CMOS input levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs,
CE
and
OE. The active LOW
Write Enable (WE) controls both writing and reading of the
memory. A data byte allows Upper Byte (UB) and Lower
Byte (LB) access.
The IS61WV25616Axx/Bxx and IS64WV25616Bxx are
packaged in the JEDEC standard 44-pin 400mil SOJ,
44-pin TSOP Type II and 48-pin Mini BGA (6mm x 8mm).
DESCRIPTION
The
ISSI
IS61WV25616Axx/Bxx and IS64WV25616Bxx
FUNCTIONAL BLOCK DIAGRAM
A0-A17
DECODER
256K x 16
MEMORY ARRAY
VDD
GND
I/O0-I/O7
Lower Byte
I/O8-I/O15
Upper Byte
I/O
DATA
CIRCUIT
COLUMN I/O
CE
OE
WE
UB
LB
CONTROL
CIRCUIT
Copyright © 2017 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without
notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the lat-
est version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reason-
ably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications
unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances
Integrated Silicon Solution, Inc. — www.issi.com
Rev. H1
02/10/2017
1
IS61WV25616ALL/ALS, IS61WV25616BLL/BLS,
IS64WV25616BLL/BLS
PIN CONFIGURATIONS
44-Pin LQFP
48-Pin mini BGA (6mm x 8mm)
1
2
3
4
5
6
CE
I/O0
I/O1
I/O2
I/O3
VDD
GND
I/O4
I/O5
I/O6
I/O7
44 43 42 41 40 39 38 37 36 35 34
33
1
32
2
31
3
30
4
29
5
TOP VIEW
28
6
27
7
26
8
25
9
24
10
23
11
12 13 14 15 16 17 18 19 20 21 22
WE
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A17
A16
A15
A14
A13
A12
A11
A10
OE
UB
LB
I/O15
I/O14
I/O13
I/O12
GND
VDD
I/O11
I/O10
I/O9
I/O8
NC
A
B
C
D
E
F
G
H
LB
I/O
8
I/O
9
GND
V
DD
I/O
14
I/O
15
NC
OE
UB
I/O
10
I/O
11
I/O
12
I/O
13
NC
A8
A0
A3
A5
A17
NC
A14
A12
A9
A1
A4
A6
A7
A16
A15
A13
A10
A2
CE
I/O
1
I/O
3
I/O
4
I/O
5
WE
A11
N/C
I/O
0
I/O
2
V
DD
GND
I/O
6
I/O
7
NC
*LQFP
package under evaluation.
PIN DESCRIPTIONS
A0-A17
I/O0-I/O15
CE
OE
WE
LB
UB
NC
V
dd
GND
Address Inputs
Data Inputs/Outputs
Chip Enable Input
Output Enable Input
Write Enable Input
Lower-byte Control (I/O0-I/O7)
Upper-byte Control (I/O8-I/O15)
No Connection
Power
Ground
Integrated Silicon Solution, Inc. — www.issi.com
Rev. H1
02/10/2017
3
IS61WV25616ALL/ALS, IS61WV25616BLL/BLS,
IS64WV25616BLL/BLS
DC ELECTRICAL CHARACTERISTICS
(Over Operating Range)
V
DD
= 3.3V + 5%
Symbol
V
oH
V
oL
V
IH
V
IL
I
LI
I
Lo
Parameter
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
(1)
Input Leakage
Output Leakage
Test Conditions
V
dd
=
Min.,
I
oH
=
–4.0 mA
V
dd
=
Min.,
I
oL
=
8.0 mA
GND
≤
V
In
≤
V
dd
GND
≤
V
out
≤
V
dd
,
Outputs Disabled
Min.
2.4
—
2
–0.3
–1
–1
Max.
—
0.4
V
dd
+ 0.3
0.8
1
1
Unit
V
V
V
V
µA
µA
Note:
1.
V
IL
(min.) = –0.3V
DC; V
IL
(min.) = –2.0V AC (pulse width < 20 ns). Not 100% tested.
V
IH
(max.) = V
dd
+
0.3V dc; V
IH
(max.) = V
dd
+
2.0V Ac
(pulse width < 20 ns). Not 100% tested.
DC ELECTRICAL CHARACTERISTICS
(Over Operating Range)
V
DD
= 2.4V-3.6V
Symbol
V
oH
V
oL
V
IH
V
IL
I
LI
I
Lo
Parameter
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
(1)
Input Leakage
Output Leakage
Test Conditions
V
dd
=
Min.,
I
oH
=
–1.0 mA
V
dd
=
Min.,
I
oL
=
1.0 mA
GND
≤
V
In
≤
V
dd
GND
≤
V
out
≤
V
dd
,
Outputs Disabled
Min.
1.8
—
2.0
–0.3
–1
–1
Max.
—
0.4
V
dd
+ 0.3
0.8
1
1
Unit
V
V
V
V
µA
µA
Note:
1.
V
IL
(min.) = –0.3V
DC; V
IL
(min.) = –2.0V AC (pulse width < 20 ns). Not 100% tested.
V
IH
(max.) = V
dd
+
0.3V dc; V
IH
(max.) = V
dd
+
2.0V Ac
(pulse width < 20 ns). Not 100% tested.
DC ELECTRICAL CHARACTERISTICS
(Over Operating Range)
V
DD
= 1.65V-2.2V
Symbol
V
oH
V
oL
V
IH
V
IL
(1)
I
LI
I
Lo
Parameter
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
Input Leakage
Output Leakage
Test Conditions
I
oH
=
-0.1 mA
I
oL
=
0.1 mA
V
DD
1.65-2.2V
1.65-2.2V
1.65-2.2V
1.65-2.2V
Min.
1.4
—
1.4
–0.2
–1
–1
Max.
—
0.2
V
dd
+ 0.2
0.4
1
1
Unit
V
V
V
V
µA
µA
GND
≤
V
In
≤
V
dd
GND
≤
V
out
≤
V
dd
,
Outputs Disabled
Note:
1.
V
IL
(min.) = –0.3V
DC; V
IL
(min.) = –2.0V AC (pulse width < 20 ns). Not 100% tested.
V
IH
(max.) = V
dd
+
0.3V dc; V
IH
(max.) = V
dd
+
2.0V Ac
(pulse width < 20 ns). Not 100% tested.
4
Integrated Silicon Solution, Inc. — www.issi.com
Rev. H1
02/10/2017
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