PSMN7R8-100PSE
11 August 2014
TO
-2
20A
B
N-channel 100 V 7.8 mΩ standard level MOSFET with
improved SOA in TO220 package
Product data sheet
1. General description
Standard level N-channel MOSFET with improved SOA in a TO220 package. Part of
NXP's "NextPower Live" portfolio, the PSMN7R8-100PSE is robust enough to withstand
substantial in-rush and fault condition currents during turn on/off, whilst offering a low
RDS(on) characteristic to keep temperatures down and efficiency up in continued use.
Ideal for telecommunication systems based on 48 V backplanes / supply rails.
2. Features and benefits
•
•
Enhanced safe operating area (SOA) for superior protection during linear mode
operation
Low RDS(on) for low conduction losses
3. Applications
•
•
•
•
Electronic fuse
Hot-swap / Soft-start
Uninterruptible power supplies
Motor control
4. Quick reference data
Table 1.
Symbol
V
DS
I
D
P
tot
R
DSon
Quick reference data
Parameter
drain-source voltage
drain current
total power dissipation
Conditions
T
j
≥ 25 °C; T
j
≤ 175 °C
T
mb
= 100 °C; V
GS
= 10 V;
Fig. 2
T
mb
= 25 °C;
Fig. 1
V
GS
= 10 V; I
D
= 25 A; T
j
= 25 °C;
Fig. 12
V
GS
= 10 V; I
D
= 25 A; V
DS
= 50 V;
Fig. 14; Fig. 15
-
-
41
128
-
-
nC
nC
Min
-
-
-
Typ
-
-
-
Max
100
83
294
Unit
V
A
W
Static characteristics
drain-source on-state
resistance
-
6.7
7.8
mΩ
Dynamic characteristics
Q
GD
Q
G(tot)
gate-drain charge
total gate charge
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NXP Semiconductors
PSMN7R8-100PSE
N-channel 100 V 7.8 mΩ standard level MOSFET with improved SOA in
TO220 package
Symbol
E
DS(AL)S
Parameter
non-repetitive drain-
source avalanche
energy
Conditions
V
GS
= 10 V; T
j(init)
= 25 °C; I
D
= 100 A;
V
sup
≤ 100 V; R
GS
= 50 Ω; unclamped;
Fig. 4
Min
-
Typ
-
Max
315
Unit
mJ
Avalanche ruggedness
5. Pinning information
Table 2.
Pin
1
2
3
mb
Pinning information
Symbol Description
G
D
S
D
gate
drain
source
mounting base; connected to
drain
G
mbb076
Simplified outline
mb
Graphic symbol
D
S
1 2 3
TO-220AB (SOT78)
6. Ordering information
Table 3.
Ordering information
Package
Name
PSMN7R8-100PSE
TO-220AB
Description
plastic single-ended package; heatsink mounted; 1 mounting
hole; 3-lead TO-220AB
Version
SOT78
Type number
7. Marking
Table 4.
Marking codes
Marking code
PSMN7R8-100PSE
Type number
PSMN7R8-100PSE
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
DS
PSMN7R8-100PSE
Parameter
drain-source voltage
Conditions
T
j
≥ 25 °C; T
j
≤ 175 °C
All information provided in this document is subject to legal disclaimers.
Min
-
Max
100
Unit
V
© NXP Semiconductors N.V. 2014. All rights reserved
Product data sheet
11 August 2014
2 / 13
NXP Semiconductors
PSMN7R8-100PSE
N-channel 100 V 7.8 mΩ standard level MOSFET with improved SOA in
TO220 package
Symbol
V
DGR
V
GS
P
tot
I
D
Parameter
drain-gate voltage
gate-source voltage
total power dissipation
drain current
Conditions
T
j
≥ 25 °C; T
j
≤ 175 °C; R
GS
= 20 kΩ
Min
-
-20
Max
100
20
294
100
83
473
175
175
260
Unit
V
V
W
A
A
A
°C
°C
°C
T
mb
= 25 °C;
Fig. 1
V
GS
= 10 V; T
j
= 25 °C;
Fig. 2
V
GS
= 10 V; T
mb
= 100 °C;
Fig. 2
[1]
-
-
-
-
-55
-55
-
I
DM
T
stg
T
j
T
sld(M)
I
S
I
SM
E
DS(AL)S
peak drain current
storage temperature
junction temperature
peak soldering temperature
pulsed; t
p
≤ 10 µs; T
mb
= 25 °C;
Fig. 3
Source-drain diode
source current
peak source current
T
mb
= 25 °C
pulsed; t
p
≤ 10 µs; T
mb
= 25 °C
V
GS
= 10 V; T
j(init)
= 25 °C; I
D
= 100 A;
V
sup
≤ 100 V; R
GS
= 50 Ω; unclamped;
Fig. 4
[1]
120
P
der
(%)
80
[1]
-
-
100
473
A
A
Avalanche ruggedness
non-repetitive drain-source
avalanche energy
-
315
mJ
Continuous current limited by package
03aa16
I
D
(A)
125
150
aaa-012594
100
75
(1)
40
50
25
0
0
50
100
150
T
mb
(°C)
200
0
0
25
50
75
100
125
150 175
T
mb
(°C)
200
Fig. 1.
Normalized total power dissipation as a
function of mounting base temperature
(1) Capped at 100A due to package
Fig. 2.
Continuous drain current as a function of
mounting base temperature
PSMN7R8-100PSE
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved
Product data sheet
11 August 2014
3 / 13
NXP Semiconductors
PSMN7R8-100PSE
N-channel 100 V 7.8 mΩ standard level MOSFET with improved SOA in
TO220 package
I
D
(A)
10
3
Limit R
DSon
= V
DS
/ I
D
10
2
DC
10
1 ms
1
10 ms
100 ms
t
p
= 10 us
100 us
aaa-012596
10
-1
1
10
10
2
V
DS
(V)
10
3
Fig. 3.
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
I
AL
(A)
10
3
aaa-012595
10
2
(1)
10
(2)
1
10
-3
10
-2
10
-1
1
t
AL
(ms)
10
Fig. 4.
Single pulse avalanche rating; avalanche current as a function of avalanche time
9. Thermal characteristics
Table 6.
Symbol
R
th(j-mb)
Thermal characteristics
Parameter
thermal resistance
from junction to
mounting base
thermal resistance
from junction to
ambient
Conditions
Fig. 5
Min
-
Typ
0.42
Max
0.51
Unit
K/W
R
th(j-a)
Minimum footprint; mounted on a
printed circuit board
-
50
-
K/W
PSMN7R8-100PSE
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved
Product data sheet
11 August 2014
4 / 13
NXP Semiconductors
PSMN7R8-100PSE
N-channel 100 V 7.8 mΩ standard level MOSFET with improved SOA in
TO220 package
Z
th(j-mb)
(K/W)
1
003aak747
δ = 0.5
10
-1
0.2
0.1
0.05
10
-2
0.02
single shot
P
δ=
t
p
T
t
p
10
-3
10
-6
10
-5
10
-4
10
-3
10
-2
10
-1
t
T
t
p
(s)
1
Fig. 5.
Transient thermal impedance from junction to mounting base as a function of pulse duration
10. Characteristics
Table 7.
Symbol
V
(BR)DSS
Characteristics
Parameter
drain-source
breakdown voltage
gate-source threshold
voltage
gate-source threshold
voltage
Conditions
I
D
= 250 µA; V
GS
= 0 V; T
j
= 25 °C
I
D
= 250 µA; V
GS
= 0 V; T
j
= -55 °C
I
D
= 1 mA; V
DS
= V
GS
; T
j
= 25 °C;
Fig. 10; Fig. 11
I
D
= 1 mA; V
DS
= V
GS
; T
j
= 175 °C;
Fig. 11
I
D
= 1 mA; V
DS
= V
GS
; T
j
= -55 °C;
Fig. 11
I
DSS
drain leakage current
V
DS
= 100 V; V
GS
= 0 V; T
j
= 25 °C
V
DS
= 100 V; V
GS
= 0 V; T
j
= 175 °C
I
GSS
gate leakage current
V
GS
= -20 V; V
DS
= 0 V; T
j
= 25 °C
V
GS
= 20 V; V
DS
= 0 V; T
j
= 25 °C
R
DSon
drain-source on-state
resistance
V
GS
= 10 V; I
D
= 25 A; T
j
= 25 °C;
Fig. 12
V
GS
= 10 V; I
D
= 25 A; T
j
= 100 °C;
Fig. 12; Fig. 13
V
GS
= 10 V; I
D
= 25 A; T
j
= 175 °C;
Fig. 12; Fig. 13
R
G
gate resistance
f = 1 MHz
0.42
0.83
1.66
Ω
-
-
21
mΩ
-
-
14
mΩ
-
-
-
-
-
0.1
-
10
10
6.7
2
500
100
100
7.8
µA
µA
nA
nA
mΩ
-
-
4.6
V
1
-
-
V
Min
100
90
2
Typ
-
-
3
Max
-
-
4
Unit
V
V
V
Static characteristics
V
GS(th)
V
GSth
PSMN7R8-100PSE
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved
Product data sheet
11 August 2014
5 / 13
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