19-0551; Rev 1; 7/06
14 Programmable Gamma Reference Buffers with
Four Static References for TFT-LCD Displays
General Description
The MAX9590 provides 14 programmable voltage
references and four static voltage references for
gamma correction in TFT-LCD displays. Two register
banks are provided to store two sets of gamma refer-
ence values. Gamma values are programmed into the
banks through the I
2
C interface and the outputs can
switch between values in 0.5µs.
The 14 programmable reference voltages are divided
evenly into seven upper and seven lower voltages for the
upper and lower gamma curves of LCD column drivers.
Each gamma reference voltage has an 8-bit digital-to-
analog converter (DAC) and isolation buffer associated
with it to ensure stable operation. Therefore, the refer-
ence voltages remain stable without synchronizing to the
LCD horizontal timing. In addition, each buffer is able to
provide a high current that further ensures a stable volt-
age when critical levels and patterns are displayed.
The 14 programmable buffers wake up in the high-imped-
ance state until the registers are programmed. This pro-
tects the LCD system from high transient currents
during the startup phase.
The MAX9590 is available in a 38-pin TQFN package
and is specified for operation over the -40°C to +85°C
temperature range.
o
o
o
o
Features
14 Programmable Reference Voltages
Four Static Reference Voltages
Independent DACs with 8-Bit Resolution
MAX9590
Two Register Banks for Two Sets of
Gamma Values
o
Fast Switching between Gamma Values
o
16.5V (max) Operating Voltage
o
Output Swing within 150mV of Rails
o
Peak Current Greater than 200mA
o
Output Channels Tri-Stated During Wake-Up
Block Diagram
REFU_H
OUT_REFU_H
OUT1
AV
DD
DV
DD
OUT3
GND
BANK B
MEMORY
(HIGH)
BANK A
MEMORY
(HIGH)
OUT2
OUT4
CAP
OUT5
Applications
TFT-LCD Displays
Industrial Reference Voltage Generators
REFU_L
BANK_SEL
REFL_H
OUT6
OUT7
OUT_REFU_L
OUT_REFL_H
OUT8
Ordering Information
PART
MAX9590ETU+
TEMP RANGE
-40°C to +85°C
PIN-PACKAGE
38 TQFN-EP**
(5mm x 7mm)
PKG
CODE
T3857-1
BANK A
MEMORY
(LOW)
OUT9
OUT10
OUT11
+Denotes
lead-free package.
**EP
= Exposed paddle.
BANK B
MEMORY
(LOW)
OUT12
OUT13
OUT14
REFL_L
SCL
SDA
A0
STD_REG
OUT_REFL_L
I
2
C INTERFACE
MAX9590
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
14 Programmable Gamma Reference Buffers with
Four Static References for TFT-LCD Displays
MAX9590
ABSOLUTE MAXIMUM RATINGS
AV
DD
to GND..........................................................-0.3V to +18V
DV
DD
to GND ...........................................................-0.3V to +6V
REFU_H, REFU_L, REFL_H, REFL_L .......-0.3V to (AV
DD
+ 0.3V)
OUT1–OUT14...........................................-0.3V to (AV
DD
+ 0.3V)
OUT_REFU_H, OUT_REFU_L,
OUT_REFL_H, OUT_REFL_L ...............-0.3V to (AV
DD
+ 0.3V)
STD_REG, A0, SDA, SCL, BANK_SEL, CAP to GND....-0.3V to +6V
Continuous Current
SDA .................................................................................50mA
CAP .................................................................................20mA
OUT1–OUT14................................................................400mA
OUT_REFU_H, OUT_REFU_L,
OUT_REFL_H, OUT_REFL_L ........................................400mA
Short-Circuit Duration
Any Output to AV
DD
or GND ..................................Continuous
Continuous Power Dissipation (T
A
= +70°C)
38-Pin TQFN (derate 26.3mW/°C above +70°C) ......2195mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range ............................ -65°C to +150°C
Lead Temperature (soldering, 10s) ............................... +300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(AV
DD
= 15V, DV
DD
= 3.3V, V
REFU_H
= 14V, V
REFU_L
= 9V, V
REFL_H
= 6V, V
REFL_L
= 1V, GND = 0V, no load. T
A
= -40°C to +85°C,
unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 1)
PARAMETER
SUPPLIES
Analog Supply Voltage Range
Digital Supply Voltage Range
Analog Quiescent Current
Undervoltage Lockout Threshold
Digital Quiescent Current
AV
DD
DV
DD
I
AVDD
UVLO
I
DVDD
DV
DD
undervoltage lockout threshold
During a register mode load event
No SCL or SDA transitions
T
A
= +25°C, sinking or sourcing 4mA
T
A
= +25°C, sinking or sourcing 4mA
V
OUT
= 5V
-12mA to +12mA
9V
≤
AV
DD
≤
16.5V, outputs at 5V
To AV
DD
or GND
60
3.0
3.0
1
100
0.25
90
400
10
Guaranteed by power-supply rejection ratio
specification
9.0
2.7
21
1.5
200
46
100
AV
DD -
0.15
AV
DD
10
16.5
5.5
32
V
V
mA
V
µA
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
HIGH REFERENCE BUFFERS (REFU_H, REFL_H)
Output Voltage Range
Input Voltage Range
Offset Voltage
Input Resistance
Load Regulation
Power-Supply Rejection Ratio
Short-Circuit Current
Slew Rate
V
OUT
V
CM
V
OS
R
IN
R
EG
PSRR
I
SC
SR
V
V
mV
MΩ
mV/mA
dB
mA
V/µs
Swing 5V
P-P
at input, 10% to 90%
measurement on output
LOW REFERENCE BUFFERS (REFU_L, REFL_L)
Output-Voltage Range
Input-Voltage Range
Offset Voltage
Input Resistance
Load Regulation
Power-Supply Rejection Ratio
Short-Circuit Current
Slew Rate
V
OUT
V
CM
V
OS
R
IN
R
EG
PSRR
I
SC
SR
-12mA to +12mA
9V
≤
AV
DD
≤
16.5V, outputs at 5V
To AV
DD
or GND
Swing 5V
P-P
at input, 10% to 90%
measurement on output
60
T
A
= +25°C, sinking or sourcing 4mA
T
A
= +25°C, sinking or sourcing 4mA
V
OUT
= 5V
GND
GND + 0.15
AV
DD -
3.7
AV
DD -
3.7
1
10
V
V
mV
MΩ
mV/mA
dB
mA
V/µs
100
0.25
90
400
10
2
_______________________________________________________________________________________
14 Programmable Gamma Reference Buffers with
Four Static References for TFT-LCD Displays
ELECTRICAL CHARACTERISTICS (continued)
(AV
DD
= 15V, DV
DD
= 3.3V, V
REFU_H
= 14V, V
REFU_L
= 9V, V
REFL_H
= 6V, V
REFL_L
= 1V, GND = 0V, no load. T
A
= -40°C to +85°C,
unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 1)
PARAMETER
DAC OUTPUTS (OUT1–OUT14)
Resolution
Integral Nonlinearity Error
Differential Nonlinearity Error
Full-Scale Error
Zero-Code Error
Output-Voltage Range
Load Regulation
Power-Supply Rejection Ratio
Short-Circuit Current
Output Impedance
Slew Rate
PSRR
I
SC1
I
SC2
Z
O
SR
RES
INL
DNL
E
FS
E
ZC
V
OUT
T
A
= +25°C, sinking or sourcing 4mA
-12mA to +12mA
9V
≤
AV
DD
≤
16.5V, outputs at 5V
Outputs 1, 7, 8, 14 to AV
DD
or GND
All other outputs to AV
DD
or GND
Output resistance of voltage source when
buffer disabled
Swing 5V
P-P
at input, 10% to 90%
measurement on OUT1–OUT14
OUT1–OUT14 swing 5V
P-P
, and settled to
±0.5 LSB, switch from Bank A to Bank B or
vice versa, R
L
= 10kΩ to GND and C
L
=
50pF to GND (Note 2)
C
XTLK
E
n
Ts
Hys
f = 5MHz, all channels to all channels
RMS noise voltage at any output
(10MHz BW)
60
0.15
90
400
200
100
22
Linear
8
0.5
0.25
0.5
0.5
AV
DD -
0.15
0.50
Bits
LSB
LSB
LSB
LSB
V
mV/mA
dB
mA
kΩ
V/µs
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
MAX9590
Settling Time
0.5
µs
Channel-to-Channel Isolation
Noise
Thermal Shutdown
Thermal Shutdown Hysteresis
80
375
+160
15
dB
µV
°C
°C
LOGIC INPUTS AND OUTPUTS (SDA, SCL, BANK_SEL, STD_REG, A0)
Input High Voltage
Input Low Voltage
Input Leakage Current
Input Capacitance
Power-Down Input Current
SDA Output Low Voltage
I
IN
V
OL
V
IH
V
IL
I
IH
, I
IL
V
IN
= 0V or DV
DD
Guaranteed by design, not subject to
production testing
DV
DD
= 0V, V
IN
= 1.98V (Note 3)
I
SINK
= 6mA
-10
-1
+0.01
5
+10
0.4
2.2
0.8
+1
V
V
µA
pF
µA
V
_______________________________________________________________________________________
3
14 Programmable Gamma Reference Buffers with
Four Static References for TFT-LCD Displays
MAX9590
ELECTRICAL CHARACTERISTICS (continued)
(AV
DD
= 15V, DV
DD
= 3.3V, V
REFU_H
= 14V, V
REFU_L
= 9V, V
REFL_H
= 6V, V
REFL_L
= 1V, GND = 0V, no load. T
A
= -40°C to +85°C,
unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 1)
PARAMETER
I
2
C
Serial Clock Frequency
Bus Free Time Between STOP (P)
and START (S) Condition
Hold Time (Repeated) START (S)
Condition
SCL Pulse-Width Low
SCL Pulse-Width High
Setup Time for a Repeated START
Condition
SYMBOL
f
SCL
t
BUF
t
HD,STA
t
LOW
t
HIGH
t
SU,STA
A master device must provide a hold time of at
least 300ns for the SDA signal (referred to V
IL
of the SCL signal) to bridge the undefined
region of SCL’s falling edge
CONDITIONS
MIN
0
1.3
0.6
1.3
0.6
0.6
TYP
MAX
400
UNITS
kHz
µs
µs
µs
µs
µs
TIMING CHARACTERISTICS (Figure 1)
Data Hold Time
t
HD,DAT
0
0.9
µs
Data Setup Time
Setup Time for STOP Condition
Pulse Width of Suppressed Spike
t
SU,DAT
t
SU,STO
t
SP
Guaranteed by design, input filters on the
SDA and SCL inputs suppress noise spikes
less than 50ns
100
0.6
50
ns
µs
ns
Note 1:
All devices are 100% production tested at T
A
= +25°C. Specifications over temperature limits are guaranteed by design.
Note 2:
Reference voltages transition from Bank A to Bank B value in less than 500ns. The
Timing Diagram
shows the response at
the output pin.
Note 3:
Only SCL and SDA are high impedance.
Timing Diagram
±0.5
LSB
OUT_
< 0.5µs
BANK_SEL
4
_______________________________________________________________________________________
14 Programmable Gamma Reference Buffers with
Four Static References for TFT-LCD Displays
Typical Operating Characteristics
(AV
DD
= 15V, DV
DD
= 3.3V, V
REFU_H
= 14V, V
REFU_L
= 9V, V
REFL_H
= 6V, V
REFL_L
= 1V, GND = 0V, no load. T
A
= +25°C, unless
otherwise noted.)
INPUT OFFSET VOLTAGE DEVIATION
vs. SUPPLY VOLTAGE
MAX9590 toc01
MAX9590
INPUT OFFSET VOLTAGE DEVIATION
vs. TEMPERATURE
6
4
V
OS
(mV)
2
0
-2
-4
-6
-8
MAX9590 toc02
2.50
2.25
2.00
V
OS
(mV)
1.75
1.50
1.25
1.00
0.75
0.50
8
10
12
14
16
8
18
-50
-25
0
25
50
75
100
AV
DD
(V)
TEMPERATURE (°C)
ANALOG SUPPLY CURRENT
vs. ANALOG SUPPLY VOLTAGE
MAX9590 toc03
DIGITAL SUPPLY CURRENT
vs. DIGITAL SUPPLY VOLTAGE
LOGIC INPUTS = DV
DD
OR 0
90
80
I
DVDD
(µA)
70
60
50
40
30
20
MAX9590 toc04
24
NO LOAD
23
22
I
AVDD
(mA)
21
20
19
18
17
16
8
10
12
14
16
100
18
2
3
4
DV
DD
(V)
5
6
AV
DD
(V)
SETTLING TIME
MAX9590 toc05a
SETTLING TIME
MAX9590 toc05b
BANK_SEL
1V/div
BANK_SEL
1V/div
OUT
500mV/div
OUT
500mV/div
100ns/div
OUT IS SWITCHING FROM 2V TO 5V. OUT IS
LOADED WITH 1kΩ || 50pF TO GROUND.
100ns/div
OUT IS SWITCHING FROM 5V TO 2V. OUT IS
LOADED WITH 1kΩ || 50pF TO GROUND.
_______________________________________________________________________________________
5
测试/测量
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
